tree 729d120d5c1df0f5ce2981cb74208b8360b7cdeb
parent cfd3a95bd1c0592d1d37deabd237ec6232a67a69
author Bill Hoffa <wghoffa@us.ibm.com> 1507229207 -0500
committer Bill Hoffa <wghoffa@us.ibm.com> 1507229207 -0500

Op-build Update 10-05-2017

- Remove SBE patch for TOR Magic Header Support
  - Bringing in d5ee3e8 commit with formal change

Changes Included for package sbe, branch master:
374add4 - Yue Du - 2017-10-05 - Revert PLL unlock commits of 45102 and 46563
868a208 - Ashish - 2017-10-05 - SIBRC details
fcf4e20 - Ashish - 2017-10-05 - code bug: single step was not restoring dbcr
c6adbaf - Greg Still - 2017-10-05 - p9_ppe_commands: add -step_trap support
419151c - Ashish - 2017-10-05 - p9_ppe_commands : Enhanced single step
1878aa7 - Ashish - 2017-10-05 - PPE command line control
e98d926 - Joe McGill - 2017-10-04 - p9_thread_control -- remove threads_running check from sreset, start code paths
ee1b8b9 - Richard J. Knight - 2017-10-04 - Update default case in set_sbe_error
6f30cb1 - Joachim Fenkes - 2017-10-04 - {nest,cache}_pll_setup: Properly clear PLL unlock indication
7e0ca5f - Greg Still - 2017-10-04 - PM (Cronus): Add processor id for errors from p9_activate_stop15_cores
b31641f - Prem Shanker Jha - 2017-10-04 - PM: PPE State tool fixes.
b9a5f4e - Ashish - 2017-10-04 - SIBRC details
199ffd0 - Greg Still - 2017-10-04 - p9_ppe_commands: add -step_trap support
edaa6ae - Ashish - 2017-10-04 - p9_ppe_commands : Enhanced single step
b9568e5 - Ashish - 2017-10-04 - PPE command line control
8ab85cf - spashabk-in - 2017-10-04 - Update security testcase
ad463c9 - spashabk-in - 2017-10-04 - SIM delay align to the instruction cachline
e655bad - Thi Tran - 2017-10-04 - Remove HB incorrect setting of ATTR_DD1_SLOW_PCI_REF_CLOCK
05539c9 - Anusha Reddy Rangareddygari - 2017-10-04 - Update hardware procedure metadata
d5ee3e8 - Claus Michael Olsen - 2017-10-04 - TOR Magic header support