| From 3ac7b2ce48a25617a838b58dce149244c5f216ef Mon Sep 17 00:00:00 2001 |
| From: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> |
| Date: Wed, 22 Jul 2015 11:09:15 +1000 |
| Subject: [PATCH 04/15] powerpc/kexec: Reset HILE before kexec_sequence |
| |
| On powernv secondary cpus are returned to OPAL, and will then enter |
| the target kernel in big-endian. However if it is set the HILE bit |
| will persist, causing the first exception in the target kernel to be |
| delivered in litte-endian regardless of the current endianess. |
| |
| If running on top of OPAL make sure the HILE bit is reset once we've |
| finished waiting for all of the secondaries to be returned to OPAL. |
| |
| Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> |
| Signed-off-by: Joel Stanley <joel@jms.id.au> |
| --- |
| arch/powerpc/platforms/powernv/setup.c | 7 +++++++ |
| 1 file changed, 7 insertions(+) |
| |
| diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c |
| index 53737e019ae3..59076db194c0 100644 |
| --- a/arch/powerpc/platforms/powernv/setup.c |
| +++ b/arch/powerpc/platforms/powernv/setup.c |
| @@ -243,6 +243,13 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) |
| } else { |
| /* Primary waits for the secondaries to have reached OPAL */ |
| pnv_kexec_wait_secondaries_down(); |
| + |
| + /* |
| + * We might be running as little-endian - now that interrupts |
| + * are disabled, reset the HILE bit to big-endian so we don't |
| + * take interrupts in the wrong endian later |
| + */ |
| + opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); |
| } |
| } |
| #endif /* CONFIG_KEXEC */ |
| -- |
| 2.6.2 |
| |