tree b1fe80e2f2a239ce6a30bc7d17da53c920577d0b
parent dfc525ae28f4c3442980dcd5da32d9c7288acca4
author Nichole Wang <Nichole_Wang@wistron.com> 1598951911 +0800
committer Klaus Heinrich Kiwi <klausk@br.ibm.com> 1599243274 -0300

Modify the delay and RD_VREF register to solve the memory qual fail

Samsung 16G DIMM M393A2K40DB2-CTD on Mihawk was showing
the TC2 result could not be pass completely in the 2DPC configuration.
The IBM team suggested a new setting to increase the delay register
and decrease RD_VREF register. Wistron conducts a series of research and
optimization to achieve the best settings. The ultimate motive is to
center the eye.

Samsung 16G DIMM M393A2K40DB2-CTD & M393A2K40BB2-CTD have
been tested memory qual TC2 for 1DPC & 2DPC configuration on Mihawk to
make sure the settings are compatible. However, the new settings should
not be used on platforms other than Mihawk.

Signed-off-by: Nichole Wang <Nichole_Wang@wistron.com>