meta-xilinx: subtree update:569f52f275..b3e37df5d9
Mark Hatle (11):
meta-microblaze: Move gcc patch that was missed in the prior work
Uprev standalone toolchain bbappends
pmu-firmware: Latest toolchain always treats 'assert' as a macro
binutils: update to early gatesgarth version
gdb: update to early gatesgarth version
gcc: update to early gatesgarth version
newlib: update to early gatesgarth version
machine/aarch64-tc.conf: Fix incorrect ilp32 pkgarch
libgcc.bbappend: Clear empty lib directory
newlib: Upstream now disabled builtin symbols
gdb: Fix on-target GDB compilation
Sai Hari Chandana Kalluri (5):
linux-xlnx_2020.2: Fix previous git cherry-pick
xrt: Remove stale patch to fix endian issues with latest version of boost
opencl-clhpp, ocl-icd: Remove recipes from meta-xilinx
esw.bbclass: Remove trailing / after S
Remove recipe bbappends pointing to older versions
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I18b028388a5b55a49ef135b98290228fa797e38d
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch
index 950e0b3..0d984e4 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch
@@ -1,4 +1,4 @@
-From 4926aec8897dc574d442e5a87b2576ab80046b10 Mon Sep 17 00:00:00 2001
+From 3be7340059deb6fd74873978ee4e435c84a15b8b Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 15:27:25 +0530
Subject: [PATCH 01/11] [Patch, microblaze]: Add config/microblaze.mt for
@@ -26,7 +26,7 @@
diff --git a/libgloss/config/microblaze.mt b/libgloss/config/microblaze.mt
new file mode 100644
-index 0000000..e8fb922
+index 000000000..e8fb922dd
--- /dev/null
+++ b/libgloss/config/microblaze.mt
@@ -0,0 +1,30 @@
@@ -61,7 +61,7 @@
+write.o: ${srcdir}/../write.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $?
diff --git a/libgloss/microblaze/configure b/libgloss/microblaze/configure
-index 9b2bc7a..01f0fb2 100644
+index 9b2bc7ab4..01f0fb29d 100644
--- a/libgloss/microblaze/configure
+++ b/libgloss/microblaze/configure
@@ -2020,7 +2020,7 @@ LIB_AM_PROG_AS
@@ -74,7 +74,7 @@
host_makefile_frag_path=$host_makefile_frag
diff --git a/libgloss/microblaze/configure.in b/libgloss/microblaze/configure.in
-index 77aa769..5d179fd 100644
+index 77aa769d4..5d179fdfc 100644
--- a/libgloss/microblaze/configure.in
+++ b/libgloss/microblaze/configure.in
@@ -35,7 +35,7 @@ LIB_AM_PROG_AS
@@ -87,5 +87,5 @@
dnl We have to assign the same value to other variables because autoconf
dnl doesn't provide a mechanism to substitute a replacement keyword with
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch
index 51785d9..27f8a60 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch
@@ -1,4 +1,4 @@
-From ee559eb522edcb793e4df62f61849748445a056e Mon Sep 17 00:00:00 2001
+From f3ffd847282fa3bf676ccd05cbdcba33eea06416 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 15:30:02 +0530
Subject: [PATCH 02/11] [Patch, microblaze]: Modified _exceptional_handler
@@ -11,7 +11,7 @@
1 file changed, 1 deletion(-)
diff --git a/libgloss/microblaze/_exception_handler.S b/libgloss/microblaze/_exception_handler.S
-index 59385ad..7a91a78 100644
+index 59385ad9b..7a91a781e 100644
--- a/libgloss/microblaze/_exception_handler.S
+++ b/libgloss/microblaze/_exception_handler.S
@@ -36,5 +36,4 @@
@@ -21,5 +21,5 @@
- addi r11,r11,8
bra r11
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch
index 21c5580..aa257a4 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch
@@ -1,4 +1,4 @@
-From 829dcc7967bd2a99b583fba1129ae71dbe8335ff Mon Sep 17 00:00:00 2001
+From cf8c0c5d167386aa3f8bee6feb531b451461f99c Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 15:39:45 +0530
Subject: [PATCH 03/11] [LOCAL]: Add missing declarations for xil_printf to
@@ -10,7 +10,7 @@
1 file changed, 3 insertions(+)
diff --git a/newlib/libc/include/stdio.h b/newlib/libc/include/stdio.h
-index 164d95b..7bb729c 100644
+index 164d95bca..7bb729c11 100644
--- a/newlib/libc/include/stdio.h
+++ b/newlib/libc/include/stdio.h
@@ -245,6 +245,9 @@ int sprintf (char *__restrict, const char *__restrict, ...)
@@ -24,5 +24,5 @@
int _rename (const char *, const char *);
#endif
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch
index f56f618..9c59e4f 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch
@@ -1,17 +1,17 @@
-From 379f231f0afb5e10cd82bc6346e4a6776df3e21e Mon Sep 17 00:00:00 2001
+From b2e081bd0c00dce23a6824db050bbfca991d79ab Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 15:42:11 +0530
Subject: [PATCH 04/11] [Local]: deleting the xil_printf.c file as now it part
of BSP
---
- libgloss/microblaze/xil_printf.c | 284 ---------------------------------------
+ libgloss/microblaze/xil_printf.c | 284 -------------------------------
1 file changed, 284 deletions(-)
delete mode 100644 libgloss/microblaze/xil_printf.c
diff --git a/libgloss/microblaze/xil_printf.c b/libgloss/microblaze/xil_printf.c
deleted file mode 100644
-index f18ee84..0000000
+index f18ee8446..000000000
--- a/libgloss/microblaze/xil_printf.c
+++ /dev/null
@@ -1,284 +0,0 @@
@@ -300,5 +300,5 @@
-
-/*---------------------------------------------------*/
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch
index 6e32e17..850a614 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch
@@ -1,4 +1,4 @@
-From 96e6a596356fa605bbe00f7f69afb52f80329eb6 Mon Sep 17 00:00:00 2001
+From 5071ea41bb6a54b8205665d307876ab0130d8825 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 15:44:17 +0530
Subject: [PATCH 05/11] [Local]: deleting the xil_printf.o from MAKEFILE
@@ -8,7 +8,7 @@
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgloss/microblaze/Makefile.in b/libgloss/microblaze/Makefile.in
-index fe04a08..32aafda 100644
+index fe04a08c9..32aafda37 100644
--- a/libgloss/microblaze/Makefile.in
+++ b/libgloss/microblaze/Makefile.in
@@ -81,7 +81,7 @@ GENOBJS = fstat.o getpid.o isatty.o kill.o lseek.o print.o putnum.o stat.o unlin
@@ -21,5 +21,5 @@
# Tiny Linux BSP.
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch
index 18b78f0..a3c1f0e 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch
@@ -1,4 +1,4 @@
-From bb9e95aa1da6c1f8974702685db9b8486210ac5c Mon Sep 17 00:00:00 2001
+From f5f363cd879ea60cc8fb5507e8a01533fd0c55a9 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 27 Jul 2018 16:10:36 +0530
Subject: [PATCH 06/11] MB-X intial commit
@@ -17,7 +17,7 @@
10 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/libgloss/microblaze/crt0.S b/libgloss/microblaze/crt0.S
-index b39ea90..865a8c2 100644
+index b39ea90b3..865a8c269 100644
--- a/libgloss/microblaze/crt0.S
+++ b/libgloss/microblaze/crt0.S
@@ -84,7 +84,7 @@ _vector_hw_exception:
@@ -30,7 +30,7 @@
brlid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt1.S b/libgloss/microblaze/crt1.S
-index 20323ff..a8bf749 100644
+index 20323ff6d..a8bf74937 100644
--- a/libgloss/microblaze/crt1.S
+++ b/libgloss/microblaze/crt1.S
@@ -75,7 +75,7 @@ _vector_hw_exception:
@@ -43,7 +43,7 @@
brlid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt2.S b/libgloss/microblaze/crt2.S
-index e3fb15b..34d9f95 100644
+index e3fb15b26..34d9f951d 100644
--- a/libgloss/microblaze/crt2.S
+++ b/libgloss/microblaze/crt2.S
@@ -73,7 +73,7 @@ _vector_hw_exception:
@@ -56,7 +56,7 @@
brlid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt3.S b/libgloss/microblaze/crt3.S
-index 452ea52..ebcf207 100644
+index 452ea5265..ebcf207f5 100644
--- a/libgloss/microblaze/crt3.S
+++ b/libgloss/microblaze/crt3.S
@@ -59,7 +59,7 @@
@@ -69,7 +69,7 @@
brlid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt4.S b/libgloss/microblaze/crt4.S
-index 475acec..4cf0b01 100644
+index 475acecfd..4cf0b01a4 100644
--- a/libgloss/microblaze/crt4.S
+++ b/libgloss/microblaze/crt4.S
@@ -59,7 +59,7 @@
@@ -82,7 +82,7 @@
brlid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crtinit.S b/libgloss/microblaze/crtinit.S
-index 78eb76d..86c6dfc 100644
+index 78eb76df6..86c6dfcb0 100644
--- a/libgloss/microblaze/crtinit.S
+++ b/libgloss/microblaze/crtinit.S
@@ -33,7 +33,7 @@
@@ -103,7 +103,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/pgcrtinit.S b/libgloss/microblaze/pgcrtinit.S
-index fca1bc4..2593082 100644
+index fca1bc45e..25930821c 100644
--- a/libgloss/microblaze/pgcrtinit.S
+++ b/libgloss/microblaze/pgcrtinit.S
@@ -33,7 +33,7 @@
@@ -124,7 +124,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/sim-crtinit.S b/libgloss/microblaze/sim-crtinit.S
-index d2f59fe..74586d9 100644
+index d2f59fe6d..74586d9a7 100644
--- a/libgloss/microblaze/sim-crtinit.S
+++ b/libgloss/microblaze/sim-crtinit.S
@@ -39,7 +39,7 @@
@@ -145,7 +145,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/sim-pgcrtinit.S b/libgloss/microblaze/sim-pgcrtinit.S
-index 3c6ba83..82ebcca 100644
+index 3c6ba8371..82ebccad4 100644
--- a/libgloss/microblaze/sim-pgcrtinit.S
+++ b/libgloss/microblaze/sim-pgcrtinit.S
@@ -39,7 +39,7 @@
@@ -166,7 +166,7 @@
.end _crtinit
diff --git a/newlib/libc/machine/microblaze/strcmp.c b/newlib/libc/machine/microblaze/strcmp.c
-index 434195e..3119d82 100644
+index 434195e2c..3119d82c5 100644
--- a/newlib/libc/machine/microblaze/strcmp.c
+++ b/newlib/libc/machine/microblaze/strcmp.c
@@ -96,15 +96,15 @@ strcmp (const char *s1,
@@ -190,5 +190,5 @@
{
/* To get here, *a1 == *a2, thus if we find a null in *a1,
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch
index c62a991..55dde80 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch
@@ -1,4 +1,4 @@
-From eab8d664224d134b2c4d638d9c6bebb84ae777ad Mon Sep 17 00:00:00 2001
+From 5040f7d8abb79bf4240d0b446e2d33d26680d9fc Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 11 Sep 2018 14:32:20 +0530
Subject: [PATCH 07/11] [Patch, Microblaze]: newlib port for microblaze m64
@@ -13,23 +13,23 @@
libgloss/microblaze/_interrupt_handler.S | 7 +-
libgloss/microblaze/_program_clean.S | 6 +-
libgloss/microblaze/_program_init.S | 6 +-
- libgloss/microblaze/crt0.S | 53 ++++++++++--
- libgloss/microblaze/crt1.S | 54 +++++++++++--
- libgloss/microblaze/crt2.S | 52 ++++++++++--
- libgloss/microblaze/crt3.S | 32 +++++++-
- libgloss/microblaze/crt4.S | 37 +++++++--
- libgloss/microblaze/crtinit.S | 120 ++++++++++++++++++++--------
- libgloss/microblaze/linux-crt0.S | 60 +++++++++++---
- libgloss/microblaze/linux-syscalls.S | 15 +++-
- libgloss/microblaze/pgcrtinit.S | 59 +++++++++++++-
- libgloss/microblaze/sim-crtinit.S | 31 +++++++
- libgloss/microblaze/sim-pgcrtinit.S | 31 +++++++
- newlib/libc/machine/microblaze/longjmp.S | 45 +++++++++--
- newlib/libc/machine/microblaze/setjmp.S | 33 +++++++-
+ libgloss/microblaze/crt0.S | 53 ++++++++-
+ libgloss/microblaze/crt1.S | 54 +++++++--
+ libgloss/microblaze/crt2.S | 52 +++++++--
+ libgloss/microblaze/crt3.S | 32 +++++-
+ libgloss/microblaze/crt4.S | 37 +++++-
+ libgloss/microblaze/crtinit.S | 120 ++++++++++++++------
+ libgloss/microblaze/linux-crt0.S | 60 ++++++++--
+ libgloss/microblaze/linux-syscalls.S | 15 ++-
+ libgloss/microblaze/pgcrtinit.S | 59 +++++++++-
+ libgloss/microblaze/sim-crtinit.S | 31 +++++
+ libgloss/microblaze/sim-pgcrtinit.S | 31 +++++
+ newlib/libc/machine/microblaze/longjmp.S | 45 ++++++--
+ newlib/libc/machine/microblaze/setjmp.S | 33 +++++-
18 files changed, 563 insertions(+), 91 deletions(-)
diff --git a/libgloss/microblaze/_exception_handler.S b/libgloss/microblaze/_exception_handler.S
-index 7a91a78..0fdff3f 100644
+index 7a91a781e..0fdff3fec 100644
--- a/libgloss/microblaze/_exception_handler.S
+++ b/libgloss/microblaze/_exception_handler.S
@@ -30,7 +30,11 @@
@@ -46,7 +46,7 @@
.ent _exception_handler
.type _exception_handler, @function
diff --git a/libgloss/microblaze/_hw_exception_handler.S b/libgloss/microblaze/_hw_exception_handler.S
-index 47df945..b951a63 100644
+index 47df945c4..b951a6325 100644
--- a/libgloss/microblaze/_hw_exception_handler.S
+++ b/libgloss/microblaze/_hw_exception_handler.S
@@ -32,8 +32,11 @@
@@ -64,7 +64,7 @@
rted r17, 0
nop
diff --git a/libgloss/microblaze/_interrupt_handler.S b/libgloss/microblaze/_interrupt_handler.S
-index 5bb7329..a0ef92d 100644
+index 5bb7329cc..a0ef92df0 100644
--- a/libgloss/microblaze/_interrupt_handler.S
+++ b/libgloss/microblaze/_interrupt_handler.S
@@ -32,8 +32,11 @@
@@ -82,7 +82,7 @@
rtid r14, 0
nop
diff --git a/libgloss/microblaze/_program_clean.S b/libgloss/microblaze/_program_clean.S
-index c460594..0d55d8a 100644
+index c46059434..0d55d8ab8 100644
--- a/libgloss/microblaze/_program_clean.S
+++ b/libgloss/microblaze/_program_clean.S
@@ -33,7 +33,11 @@
@@ -99,7 +99,7 @@
.ent _program_clean
_program_clean:
diff --git a/libgloss/microblaze/_program_init.S b/libgloss/microblaze/_program_init.S
-index 0daa42e..862ef78 100644
+index 0daa42e14..862ef786b 100644
--- a/libgloss/microblaze/_program_init.S
+++ b/libgloss/microblaze/_program_init.S
@@ -32,7 +32,11 @@
@@ -116,7 +116,7 @@
.ent _program_init
_program_init:
diff --git a/libgloss/microblaze/crt0.S b/libgloss/microblaze/crt0.S
-index 865a8c2..e4df73b 100644
+index 865a8c269..e4df73b66 100644
--- a/libgloss/microblaze/crt0.S
+++ b/libgloss/microblaze/crt0.S
@@ -54,7 +54,11 @@
@@ -222,7 +222,7 @@
+#endif
.end _exit
diff --git a/libgloss/microblaze/crt1.S b/libgloss/microblaze/crt1.S
-index a8bf749..b24eeb5 100644
+index a8bf74937..b24eeb531 100644
--- a/libgloss/microblaze/crt1.S
+++ b/libgloss/microblaze/crt1.S
@@ -53,36 +53,67 @@
@@ -321,7 +321,7 @@
.end _exit
-
diff --git a/libgloss/microblaze/crt2.S b/libgloss/microblaze/crt2.S
-index 34d9f95..ae4c89e 100644
+index 34d9f951d..ae4c89ee0 100644
--- a/libgloss/microblaze/crt2.S
+++ b/libgloss/microblaze/crt2.S
@@ -51,26 +51,56 @@
@@ -415,7 +415,7 @@
+#endif
.end _exit
diff --git a/libgloss/microblaze/crt3.S b/libgloss/microblaze/crt3.S
-index ebcf207..a8bc783 100644
+index ebcf207f5..a8bc7839b 100644
--- a/libgloss/microblaze/crt3.S
+++ b/libgloss/microblaze/crt3.S
@@ -53,10 +53,26 @@
@@ -476,7 +476,7 @@
+#endif
.end _exit
diff --git a/libgloss/microblaze/crt4.S b/libgloss/microblaze/crt4.S
-index 4cf0b01..54ba473 100644
+index 4cf0b01a4..54ba473ea 100644
--- a/libgloss/microblaze/crt4.S
+++ b/libgloss/microblaze/crt4.S
@@ -53,10 +53,27 @@
@@ -542,7 +542,7 @@
+#endif
.end _exit
diff --git a/libgloss/microblaze/crtinit.S b/libgloss/microblaze/crtinit.S
-index 86c6dfc..8541175 100644
+index 86c6dfcb0..854117536 100644
--- a/libgloss/microblaze/crtinit.S
+++ b/libgloss/microblaze/crtinit.S
@@ -29,59 +29,115 @@
@@ -694,7 +694,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/linux-crt0.S b/libgloss/microblaze/linux-crt0.S
-index 8650bb5..503439b 100644
+index 8650bb5d2..503439b2e 100644
--- a/libgloss/microblaze/linux-crt0.S
+++ b/libgloss/microblaze/linux-crt0.S
@@ -18,26 +18,50 @@
@@ -789,7 +789,7 @@
sw r15, r0, r1
+#endif
diff --git a/libgloss/microblaze/linux-syscalls.S b/libgloss/microblaze/linux-syscalls.S
-index 506de78..8594f13 100644
+index 506de78fd..8594f136e 100644
--- a/libgloss/microblaze/linux-syscalls.S
+++ b/libgloss/microblaze/linux-syscalls.S
@@ -20,8 +20,9 @@
@@ -823,7 +823,7 @@
SYSCALL(exit)
SYSCALL(read)
diff --git a/libgloss/microblaze/pgcrtinit.S b/libgloss/microblaze/pgcrtinit.S
-index 2593082..638dbd3 100644
+index 25930821c..638dbd383 100644
--- a/libgloss/microblaze/pgcrtinit.S
+++ b/libgloss/microblaze/pgcrtinit.S
@@ -29,10 +29,66 @@
@@ -904,7 +904,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/sim-crtinit.S b/libgloss/microblaze/sim-crtinit.S
-index 74586d9..9892cb0 100644
+index 74586d9a7..9892cb0bd 100644
--- a/libgloss/microblaze/sim-crtinit.S
+++ b/libgloss/microblaze/sim-crtinit.S
@@ -35,10 +35,39 @@
@@ -958,7 +958,7 @@
.end _crtinit
diff --git a/libgloss/microblaze/sim-pgcrtinit.S b/libgloss/microblaze/sim-pgcrtinit.S
-index 82ebcca..939f537 100644
+index 82ebccad4..939f5372f 100644
--- a/libgloss/microblaze/sim-pgcrtinit.S
+++ b/libgloss/microblaze/sim-pgcrtinit.S
@@ -35,10 +35,40 @@
@@ -1010,7 +1010,7 @@
.end _crtinit
diff --git a/newlib/libc/machine/microblaze/longjmp.S b/newlib/libc/machine/microblaze/longjmp.S
-index f972bbd..5ed1c26 100644
+index f972bbd88..5ed1c2626 100644
--- a/newlib/libc/machine/microblaze/longjmp.S
+++ b/newlib/libc/machine/microblaze/longjmp.S
@@ -51,16 +51,46 @@
@@ -1082,7 +1082,7 @@
+#endif
.end longjmp
diff --git a/newlib/libc/machine/microblaze/setjmp.S b/newlib/libc/machine/microblaze/setjmp.S
-index cdd87c7..971862b 100644
+index cdd87c76f..971862bcb 100644
--- a/newlib/libc/machine/microblaze/setjmp.S
+++ b/newlib/libc/machine/microblaze/setjmp.S
@@ -50,9 +50,39 @@
@@ -1133,5 +1133,5 @@
+#endif
.end setjmp
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch
index 9f27cd6..437d29f 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch
@@ -1,4 +1,4 @@
-From 1c7a9150b63089baf3f63c64bf3dbb4d73c814f5 Mon Sep 17 00:00:00 2001
+From 000cfdc6f16009e62c236267ce7123a9ef2380e9 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 28 Sep 2018 12:07:43 +0530
Subject: [PATCH 08/11] fixing the bug in crt files, added addlik instead of
@@ -13,7 +13,7 @@
5 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/libgloss/microblaze/crt0.S b/libgloss/microblaze/crt0.S
-index e4df73b..25e7c4a 100644
+index e4df73b66..25e7c4af3 100644
--- a/libgloss/microblaze/crt0.S
+++ b/libgloss/microblaze/crt0.S
@@ -106,9 +106,9 @@ _vector_hw_exception:
@@ -30,7 +30,7 @@
nop
addlik r5, r3, 0
diff --git a/libgloss/microblaze/crt1.S b/libgloss/microblaze/crt1.S
-index b24eeb5..38440c9 100644
+index b24eeb531..38440c957 100644
--- a/libgloss/microblaze/crt1.S
+++ b/libgloss/microblaze/crt1.S
@@ -94,9 +94,9 @@ _vector_hw_exception:
@@ -47,7 +47,7 @@
brealid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt2.S b/libgloss/microblaze/crt2.S
-index ae4c89e..352927d 100644
+index ae4c89ee0..352927dab 100644
--- a/libgloss/microblaze/crt2.S
+++ b/libgloss/microblaze/crt2.S
@@ -92,9 +92,9 @@ _vector_hw_exception:
@@ -64,7 +64,7 @@
nop
addlik r5, r3, 0
diff --git a/libgloss/microblaze/crt3.S b/libgloss/microblaze/crt3.S
-index a8bc783..bc32cda 100644
+index a8bc7839b..bc32cda86 100644
--- a/libgloss/microblaze/crt3.S
+++ b/libgloss/microblaze/crt3.S
@@ -62,9 +62,9 @@
@@ -81,7 +81,7 @@
brealid r15, _crtinit /* Initialize BSS and run program */
nop
diff --git a/libgloss/microblaze/crt4.S b/libgloss/microblaze/crt4.S
-index 54ba473..a25c847 100644
+index 54ba473ea..a25c84734 100644
--- a/libgloss/microblaze/crt4.S
+++ b/libgloss/microblaze/crt4.S
@@ -63,9 +63,9 @@
@@ -98,5 +98,5 @@
brealid r15, _crtinit /* Initialize BSS and run program */
nop
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Added-MB-64-support-to-strcmp-strcpy-strlen-files.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch
similarity index 90%
rename from meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Added-MB-64-support-to-strcmp-strcpy-strlen-files.patch
rename to meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch
index 38508b5..1d4394d 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Added-MB-64-support-to-strcmp-strcpy-strlen-files.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch
@@ -1,25 +1,26 @@
-From 19d7b2a34f3c69d62f570ac9d0f6bc3cd584b496 Mon Sep 17 00:00:00 2001
-From: Nagaraju <nmekala@xilinx.com>
-Date: Thu, 14 Mar 2019 18:16:32 +0530
-Subject: [PATCH 09/11] Added MB-64 support to strcmp/strcpy/strlen files
+From 6587a1cae28468f5a49659a39040f60e425827a7 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 17 Nov 2020 13:06:41 +0530
+Subject: [PATCH 09/11] [Patch,MicroBlaze] : Added MB-64 support to
+ strcmp/strcpy/strlen files Signed-off-by:Mahesh Bodapati<mbodapat@xilinx.com>
---
- newlib/libc/machine/microblaze/strcmp.c | 61 ++++++++++++++++++++++++++++++++-
- newlib/libc/machine/microblaze/strcpy.c | 57 ++++++++++++++++++++++++++++++
- newlib/libc/machine/microblaze/strlen.c | 38 ++++++++++++++++++++
- 3 files changed, 155 insertions(+), 1 deletion(-)
+ newlib/libc/machine/microblaze/strcmp.c | 63 ++++++++++++++++++++++++-
+ newlib/libc/machine/microblaze/strcpy.c | 57 ++++++++++++++++++++++
+ newlib/libc/machine/microblaze/strlen.c | 38 +++++++++++++++
+ 3 files changed, 157 insertions(+), 1 deletion(-)
diff --git a/newlib/libc/machine/microblaze/strcmp.c b/newlib/libc/machine/microblaze/strcmp.c
-index 3119d82..dac64da 100644
+index 3119d82c5..2cfef7388 100644
--- a/newlib/libc/machine/microblaze/strcmp.c
+++ b/newlib/libc/machine/microblaze/strcmp.c
-@@ -133,6 +133,65 @@ strcmp (const char *s1,
+@@ -133,6 +133,66 @@ strcmp (const char *s1,
#include "mb_endian.h"
+#ifdef __arch64__
+ asm volatile (" \n\
-+ orl r9, r0, r0 /* Index register */\n\
++ orl r9, r0, r0 /* Index register */ \n\
+check_alignment: \n\
+ andli r3, r5, 3 \n\
+ andli r4, r6, 3 \n\
@@ -45,7 +46,7 @@
+ beaneid r3, end_cmp_loop /* If reached null on one string, terminate */ \n\
+ nop \n\
+end_cmp_early: \n\
-+ or r3, r0, r7 /* delay slot */ \n\
++ orl r3, r0, r7 /* delay slot */ \n\
+ rtsd r15, 8 \n\
+ nop \n\
+try_align_args: \n\
@@ -55,7 +56,7 @@
+align_loop: \n\
+ lbu r3, r5, r9 \n\
+ lbu r4, r6, r9 \n\
-+ cmpu r7, r4, r3 \n\
++ cmplu r7, r4, r3 \n\
+ beanei r7, end_cmp \n\
+ beaeqi r3, end_cmp \n\
+ addlik r10, r10, -1 \n\
@@ -69,21 +70,23 @@
+ cmplu r7, r4, r3 \n\
+ beanei r7, end_cmp \n\
+ beaeqi r3, end_cmp \n\
-+ breaid regular_strcmp \n\
+ addlik r9, r9, 1 \n\
++ breaid regular_strcmp \n\
++ nop \n\
+end_cmp: \n\
-+ or r3, r0, r7 \n\
++ orl r3, r0, r7 \n\
+ rtsd r15, 8 \n\
+ nop /* Return strcmp result */");
+#else
asm volatile (" \n\
or r9, r0, r0 /* Index register */\n\
check_alignment: \n\
-@@ -181,11 +240,11 @@ regular_strcmp:
+@@ -181,11 +241,12 @@ regular_strcmp:
bnei r7, end_cmp \n\
beqi r3, end_cmp \n\
brid regular_strcmp \n\
- addik r9, r9, 1 \n\
++ addik r9, r9, 1
end_cmp: \n\
rtsd r15, 8 \n\
or r3, r0, r7 /* Return strcmp result */");
@@ -93,7 +96,7 @@
}
diff --git a/newlib/libc/machine/microblaze/strcpy.c b/newlib/libc/machine/microblaze/strcpy.c
-index 62072fa..6dbc60d 100644
+index 62072fa28..6dbc60d77 100644
--- a/newlib/libc/machine/microblaze/strcpy.c
+++ b/newlib/libc/machine/microblaze/strcpy.c
@@ -125,6 +125,62 @@ strcpy (char *__restrict dst0,
@@ -168,7 +171,7 @@
}
diff --git a/newlib/libc/machine/microblaze/strlen.c b/newlib/libc/machine/microblaze/strlen.c
-index acb4464..c04fa4f 100644
+index acb4464bc..b6f2d3c13 100644
--- a/newlib/libc/machine/microblaze/strlen.c
+++ b/newlib/libc/machine/microblaze/strlen.c
@@ -116,6 +116,43 @@ strlen (const char *str)
@@ -186,13 +189,13 @@
+" \n\
+ pcmplbf r4, r3, r0 \n\
+ beanei r4, end_len \n\
-+ addik r9, r9, 4 \n\
++ addlik r9, r9, 4 \n\
+ breaid len_loop \n\
+ nop \n\
+end_len: \n\
+ lbu r3, r5, r9 \n\
+ beaeqi r3, done_len \n\
-+ addik r9, r9, 1 \n\
++ addlik r9, r9, 1 \n\
+ breaid end_len \n\
+ nop \n\
+done_len: \n\
@@ -223,5 +226,5 @@
#endif /* ! HAVE_HW_PCMP */
}
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-typos-in-string-functions-microblaz.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-typos-in-string-functions-microblaz.patch
deleted file mode 100644
index d1f19a7..0000000
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-typos-in-string-functions-microblaz.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 70281e45fa433ec854f60b43fef019ebc8ca0649 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 3 Apr 2019 11:52:50 +0530
-Subject: [PATCH 10/11] [Patch,MicroBlaze] : typos in string functions
- microblaze 64 bit port.fixed the issues.
-
----
- newlib/libc/machine/microblaze/strcmp.c | 12 +++++++-----
- newlib/libc/machine/microblaze/strlen.c | 4 ++--
- 2 files changed, 9 insertions(+), 7 deletions(-)
-
-diff --git a/newlib/libc/machine/microblaze/strcmp.c b/newlib/libc/machine/microblaze/strcmp.c
-index dac64da..acfe4cd 100644
---- a/newlib/libc/machine/microblaze/strcmp.c
-+++ b/newlib/libc/machine/microblaze/strcmp.c
-@@ -135,7 +135,7 @@ strcmp (const char *s1,
-
- #ifdef __arch64__
- asm volatile (" \n\
-- orl r9, r0, r0 /* Index register */\n\
-+ orl r9, r0, r0 /* Index register */ \n\
- check_alignment: \n\
- andli r3, r5, 3 \n\
- andli r4, r6, 3 \n\
-@@ -161,7 +161,7 @@ end_cmp_loop:
- beaneid r3, end_cmp_loop /* If reached null on one string, terminate */ \n\
- nop \n\
- end_cmp_early: \n\
-- or r3, r0, r7 /* delay slot */ \n\
-+ orl r3, r0, r7 /* delay slot */ \n\
- rtsd r15, 8 \n\
- nop \n\
- try_align_args: \n\
-@@ -171,7 +171,7 @@ try_align_args:
- align_loop: \n\
- lbu r3, r5, r9 \n\
- lbu r4, r6, r9 \n\
-- cmpu r7, r4, r3 \n\
-+ cmplu r7, r4, r3 \n\
- beanei r7, end_cmp \n\
- beaeqi r3, end_cmp \n\
- addlik r10, r10, -1 \n\
-@@ -185,10 +185,11 @@ regular_strcmp:
- cmplu r7, r4, r3 \n\
- beanei r7, end_cmp \n\
- beaeqi r3, end_cmp \n\
-- breaid regular_strcmp \n\
- addlik r9, r9, 1 \n\
-+ breaid regular_strcmp \n\
-+ nop \n\
- end_cmp: \n\
-- or r3, r0, r7 \n\
-+ orl r3, r0, r7 \n\
- rtsd r15, 8 \n\
- nop /* Return strcmp result */");
- #else
-@@ -240,6 +241,7 @@ regular_strcmp:
- bnei r7, end_cmp \n\
- beqi r3, end_cmp \n\
- brid regular_strcmp \n\
-+ addik r9, r9, 1 \n\
- end_cmp: \n\
- rtsd r15, 8 \n\
- or r3, r0, r7 /* Return strcmp result */");
-diff --git a/newlib/libc/machine/microblaze/strlen.c b/newlib/libc/machine/microblaze/strlen.c
-index c04fa4f..b6f2d3c 100644
---- a/newlib/libc/machine/microblaze/strlen.c
-+++ b/newlib/libc/machine/microblaze/strlen.c
-@@ -127,13 +127,13 @@ len_loop: \n"
- " \n\
- pcmplbf r4, r3, r0 \n\
- beanei r4, end_len \n\
-- addik r9, r9, 4 \n\
-+ addlik r9, r9, 4 \n\
- breaid len_loop \n\
- nop \n\
- end_len: \n\
- lbu r3, r5, r9 \n\
- beaeqi r3, done_len \n\
-- addik r9, r9, 1 \n\
-+ addlik r9, r9, 1 \n\
- breaid end_len \n\
- nop \n\
- done_len: \n\
---
-2.7.4
-
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Removing-the-Assembly-implementation-of-64bit-string.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Removing-the-Assembly-implementation-of-64bit-string.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Removing-the-Assembly-implementation-of-64bit-string.patch
rename to meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Removing-the-Assembly-implementation-of-64bit-string.patch
index c8d13af..a63b9df 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Removing-the-Assembly-implementation-of-64bit-string.patch
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0010-Removing-the-Assembly-implementation-of-64bit-string.patch
@@ -1,18 +1,20 @@
-From b35b582ef3f6575447097585174302fde1761078 Mon Sep 17 00:00:00 2001
+From fd624fc28cbca8863f4dd75f0bc08aba58f8455e Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Wed, 24 Apr 2019 23:29:21 +0530
-Subject: [PATCH 11/11] Removing the Assembly implementation of 64bit string
+Subject: [PATCH 10/11] Removing the Assembly implementation of 64bit string
function. Revisit in next release and fix it
+Conflicts:
+ newlib/libc/machine/microblaze/strcmp.c
---
- newlib/libc/machine/microblaze/mb_endian.h | 4 ++
- newlib/libc/machine/microblaze/strcmp.c | 93 ++++++++++--------------------
- newlib/libc/machine/microblaze/strcpy.c | 82 ++++++++------------------
- newlib/libc/machine/microblaze/strlen.c | 59 +++++++------------
- 4 files changed, 81 insertions(+), 157 deletions(-)
+ newlib/libc/machine/microblaze/mb_endian.h | 4 +
+ newlib/libc/machine/microblaze/strcmp.c | 94 ++++++++--------------
+ newlib/libc/machine/microblaze/strcpy.c | 82 ++++++-------------
+ newlib/libc/machine/microblaze/strlen.c | 59 +++++---------
+ 4 files changed, 81 insertions(+), 158 deletions(-)
diff --git a/newlib/libc/machine/microblaze/mb_endian.h b/newlib/libc/machine/microblaze/mb_endian.h
-index fb217ec..17772c8 100644
+index fb217ec85..17772c88f 100644
--- a/newlib/libc/machine/microblaze/mb_endian.h
+++ b/newlib/libc/machine/microblaze/mb_endian.h
@@ -8,8 +8,12 @@
@@ -29,17 +31,19 @@
#endif
#endif
diff --git a/newlib/libc/machine/microblaze/strcmp.c b/newlib/libc/machine/microblaze/strcmp.c
-index acfe4cd..e34c64a 100644
+index 2cfef7388..007d9e1eb 100644
--- a/newlib/libc/machine/microblaze/strcmp.c
+++ b/newlib/libc/machine/microblaze/strcmp.c
-@@ -129,70 +129,42 @@ strcmp (const char *s1,
+@@ -129,70 +129,41 @@ strcmp (const char *s1,
return (*(unsigned char *) s1) - (*(unsigned char *) s2);
#endif /* not PREFER_SIZE_OVER_SPEED */
+-#else
+#elif __arch64__
+ unsigned int *a1;
+ unsigned int *a2;
-+
+
+-#include "mb_endian.h"
+ /* If s1 or s2 are unaligned, then compare bytes. */
+ if (!UNALIGNED (s1, s2))
+ {
@@ -52,25 +56,6 @@
+ then the strings must be equal, so return zero. */
+ if (DETECTNULL (*a1))
+ return 0;
-+
-+ a1++;
-+ a2++;
-+ }
-+
-+ /* A difference was detected in last few bytes of s1, so search bytewise */
-+ s1 = (char*)a1;
-+ s2 = (char*)a2;
-+ }
-+
-+ while (*s1 != '\0' && *s1 == *s2)
-+ {
-+ s1++;
-+ s2++;
-+ }
-+ return (*(unsigned char *) s1) - (*(unsigned char *) s2);
- #else
-
- #include "mb_endian.h"
-#ifdef __arch64__
- asm volatile (" \n\
@@ -126,16 +111,33 @@
- beaeqi r3, end_cmp \n\
- addlik r9, r9, 1 \n\
- breaid regular_strcmp \n\
-- nop \n\
+- nop \n\
-end_cmp: \n\
- orl r3, r0, r7 \n\
- rtsd r15, 8 \n\
- nop /* Return strcmp result */");
--#else
++ a1++;
++ a2++;
++ }
++
++ /* A difference was detected in last few bytes of s1, so search bytewise */
++ s1 = (char*)a1;
++ s2 = (char*)a2;
++ }
++
++ while (*s1 != '\0' && *s1 == *s2)
++ {
++ s1++;
++ s2++;
++ }
++ return (*(unsigned char *) s1) - (*(unsigned char *) s2);
+ #else
++
++#include "mb_endian.h"
asm volatile (" \n\
or r9, r0, r0 /* Index register */\n\
check_alignment: \n\
-@@ -246,7 +218,6 @@ end_cmp:
+@@ -246,7 +217,6 @@ end_cmp:
rtsd r15, 8 \n\
or r3, r0, r7 /* Return strcmp result */");
@@ -144,7 +146,7 @@
}
diff --git a/newlib/libc/machine/microblaze/strcpy.c b/newlib/libc/machine/microblaze/strcpy.c
-index 6dbc60d..ddb6922 100644
+index 6dbc60d77..ddb69227e 100644
--- a/newlib/libc/machine/microblaze/strcpy.c
+++ b/newlib/libc/machine/microblaze/strcpy.c
@@ -121,67 +121,36 @@ strcpy (char *__restrict dst0,
@@ -249,7 +251,7 @@
}
diff --git a/newlib/libc/machine/microblaze/strlen.c b/newlib/libc/machine/microblaze/strlen.c
-index b6f2d3c..9407539 100644
+index b6f2d3c13..940753996 100644
--- a/newlib/libc/machine/microblaze/strlen.c
+++ b/newlib/libc/machine/microblaze/strlen.c
@@ -112,47 +112,29 @@ strlen (const char *str)
@@ -328,5 +330,5 @@
#endif /* ! HAVE_HW_PCMP */
}
--
-2.7.4
+2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch
new file mode 100644
index 0000000..b6e03d4
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch
@@ -0,0 +1,25 @@
+From e0e6f5367eede4292d31c3dd901425bcd251595a Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Tue, 14 Jan 2020 22:32:30 +0530
+Subject: [PATCH 11/11] Fixed the bug in crtinit.s for MB-64
+
+---
+ libgloss/microblaze/crtinit.S | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/libgloss/microblaze/crtinit.S b/libgloss/microblaze/crtinit.S
+index 854117536..f79140734 100644
+--- a/libgloss/microblaze/crtinit.S
++++ b/libgloss/microblaze/crtinit.S
+@@ -48,7 +48,7 @@ _crtinit:
+
+ .Lloopsbss:
+ sli r0, r6, 0
+- addli r6, r6, 4
++ addli r6, r6, 8
+ rsubl r18, r6, r7
+ beagti r18, .Lloopsbss
+ .Lendsbss:
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0012-libc-machine-microblaze-strcmp.c-Fix-missing-end-of-.patch b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0012-libc-machine-microblaze-strcmp.c-Fix-missing-end-of-.patch
new file mode 100644
index 0000000..c92942f
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/files/0012-libc-machine-microblaze-strcmp.c-Fix-missing-end-of-.patch
@@ -0,0 +1,26 @@
+From c2a8d7e6326a309221e4a287517a4920d33aa674 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Mon, 30 Nov 2020 18:26:47 -0800
+Subject: [PATCH] libc/machine/microblaze/strcmp.c: Fix missing end of line
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ newlib/libc/machine/microblaze/strcmp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/newlib/libc/machine/microblaze/strcmp.c b/newlib/libc/machine/microblaze/strcmp.c
+index 007d9e1eb..5d13d64ab 100644
+--- a/newlib/libc/machine/microblaze/strcmp.c
++++ b/newlib/libc/machine/microblaze/strcmp.c
+@@ -212,7 +212,7 @@ regular_strcmp:
+ bnei r7, end_cmp \n\
+ beqi r3, end_cmp \n\
+ brid regular_strcmp \n\
+- addik r9, r9, 1
++ addik r9, r9, 1 \n\
+ end_cmp: \n\
+ rtsd r15, 8 \n\
+ or r3, r0, r7 /* Return strcmp result */");
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc b/meta-xilinx/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc
index c3b6acd..1a4a90a 100644
--- a/meta-xilinx/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc
+++ b/meta-xilinx/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc
@@ -1,15 +1,16 @@
# Add MicroBlaze Patches
FILESEXTRAPATHS_append_microblaze := ":${THISDIR}/files"
SRC_URI_append_microblaze = " \
- file://0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch \
- file://0002-Patch-microblaze-Modified-_exceptional_handler.patch \
- file://0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch \
- file://0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch \
- file://0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch \
- file://0006-MB-X-intial-commit.patch \
- file://0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch \
- file://0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch \
- file://0009-Added-MB-64-support-to-strcmp-strcpy-strlen-files.patch \
- file://0010-Patch-MicroBlaze-typos-in-string-functions-microblaz.patch \
- file://0011-Removing-the-Assembly-implementation-of-64bit-string.patch \
- "
+ file://0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch \
+ file://0002-Patch-microblaze-Modified-_exceptional_handler.patch \
+ file://0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch \
+ file://0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch \
+ file://0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch \
+ file://0006-MB-X-intial-commit.patch \
+ file://0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch \
+ file://0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch \
+ file://0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch \
+ file://0010-Removing-the-Assembly-implementation-of-64bit-string.patch \
+ file://0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch \
+ file://0012-libc-machine-microblaze-strcmp.c-Fix-missing-end-of-.patch \
+ "
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
index e10c34f..c1a7bb4 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc
@@ -1,44 +1,64 @@
FILESEXTRAPATHS_append := ":${THISDIR}/binutils"
SRC_URI_append = " \
- file://0001-sim-Allow-microblaze-architecture.patch \
- file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
- file://0003-Add-mlittle-endian-and-mbig-endian-flags.patch \
- file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \
- file://0005-Fix-relaxation-of-assembler-resolved-references.patch \
- file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \
- file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \
- file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \
- file://0009-Added-Address-extension-instructions.patch \
- file://0010-Add-new-bit-field-instructions.patch \
- file://0011-fixing-the-imm-bug.patch \
- file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
- file://0013-fixing-the-constant-range-check-issue.patch \
- file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
- file://0015-intial-commit-of-MB-64-bit.patch \
- file://0016-MB-X-initial-commit.patch \
- file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
- file://0018-Added-relocations-for-MB-X.patch \
- file://0019-Update-MB-x.patch \
- file://0020-Various-fixes.patch \
+ file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
+ file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \
+ file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
+ file://0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \
+ file://0005-upstream-change-to-garbage-collection-sweep-causes-m.patch \
+ file://0006-Fix-bug-in-TLSTPREL-Relocation.patch \
+ file://0007-Added-Address-extension-instructions.patch \
+ file://0008-fixing-the-MAX_OPCODES-to-correct-value.patch \
+ file://0009-Add-new-bit-field-instructions.patch \
+ file://0010-fixing-the-imm-bug.patch \
+ file://0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \
+ file://0012-fixing-the-constant-range-check-issue.patch \
+ file://0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \
+ file://0014-intial-commit-of-MB-64-bit.patch \
+ file://0015-MB-X-initial-commit.patch \
+ file://0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
+ file://0017-Added-relocations-for-MB-X.patch \
+ file://0018-Fixed-MB-x-relocation-issues.patch \
+ file://0019-Fixing-the-branch-related-issues.patch \
+ file://0020-Fixed-address-computation-issues-with-64bit-address.patch \
file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
file://0022-fixing-the-.bss-relocation-issue.patch \
file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
file://0024-Revert-ld-Remove-unused-expression-state.patch \
- file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
- file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \
- file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \
- file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
- file://0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
- file://0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch \
- file://0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch \
- file://0032-gas-revert-moving-of-md_pseudo_table-from-const.patch \
- file://0033-Fix-various-compile-warnings.patch \
- file://0034-Add-initial-port-of-linux-gdbserver.patch \
- file://0035-Initial-port-of-core-reading-support.patch \
- file://0036-Fix-debug-message-when-register-is-unavailable.patch \
- file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
- file://0038-Initial-support-for-native-gdb.patch \
- file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
- file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
+ file://0025-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+ file://0026-Added-support-to-new-arithmetic-single-register-inst.patch \
+ file://0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
+ file://0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \
+ file://0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch \
+ file://0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch \
+ file://0031-gas-revert-moving-of-md_pseudo_table-from-const.patch \
+ file://0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \
+ file://0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \
+ file://0034-Initial-port-of-core-reading-support-Added-support-f.patch \
+ file://0035-Fix-debug-message-when-register-is-unavailable.patch \
+ file://0036-revert-master-rebase-changes-to-gdbserver.patch \
+ file://0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch \
+ file://0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
+ file://0039-Initial-support-for-native-gdb.patch \
+ file://0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch \
+ file://0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch \
+ file://0042-porting-GDB-for-linux.patch \
+ file://0043-Binutils-security-check-is-causing-build-error-for-w.patch \
+ file://0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \
+ file://0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \
+ file://0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch \
+ file://0047-bfd-elf64-microblaze.c-Fix-build-failures.patch \
+ file://0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch \
+ file://0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch \
+ file://0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch \
+ file://0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch \
+ file://0052-sim-Allow-microblaze-architecture.patch \
+ file://0053-gdb-Fix-microblaze-target-compilation.patch \
"
+
+#
+## file://0048-bfd-gas-Use-standard-method-to-set-the-machine-arch.patch \
+## file://0052-opcodes-microblaze-opc.h-Expand-the-size-to-int-to-d.patch \
+## file://0053-opcodes-microblaze-opc.h-MIN_IMML-is-too-large.patch \
+## file://0054-gas-config-tc-microblaze.c-Resolve-numerous-compiler.patch \
+#
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
similarity index 94%
copy from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
copy to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index 039bfc9..fe3f2bf 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001
+From 212bd1115f13cc0904fb5556751585c775bc51a6 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 01/52] Add wdc.ext.clear and wdc.ext.flush insns
Added two new instructions, wdc.ext.clear and wdc.ext.flush,
to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 27d8684df04..b6c5016e4d2 100644
+index 27d8684df0..b6c5016e4d 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@
{"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
{"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index aa53dfe6bb5..795c57b5ff6 100644
+index aa53dfe6bb..795c57b5ff 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
similarity index 92%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
index 2d4d65e..78f4be1 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Add-mlittle-endian-and-mbig-endian-flags.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-mlittle-endian-and-mbig-endian-flags.patch
@@ -1,7 +1,7 @@
-From d2a03159f8643b1c6a2db5d95c478540cc6ca6c4 Mon Sep 17 00:00:00 2001
+From 23ed5e7ab73a2b5dc1ca09362d4815a643a2d187 Mon Sep 17 00:00:00 2001
From: nagaraju <nmekala@xilix.com>
Date: Tue, 19 Mar 2013 17:18:23 +0530
-Subject: [PATCH 03/40] Add mlittle-endian and mbig-endian flags
+Subject: [PATCH 02/52] Add mlittle-endian and mbig-endian flags
Added support in gas for mlittle-endian and mbig-endian flags
as options.
@@ -16,7 +16,7 @@
1 file changed, 9 insertions(+)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ae5d36dc9c3..34eeb972357 100644
+index ae5d36dc9c..34eeb97235 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -37,6 +37,8 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
index f7b9c7b..96ddefa 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,7 +1,7 @@
-From a8d621e5ab335e6e61de0f081036b4705071fb74 Mon Sep 17 00:00:00 2001
+From f74d7754befd636c6139261e6c6b23ed49aa0fa9 Mon Sep 17 00:00:00 2001
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 03/52] Disable the warning message for eh_frame_hdr
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
@@ -9,7 +9,7 @@
1 file changed, 3 insertions(+)
diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index 7a129b00f8d..d5e4a5c062d 100644
+index 7a129b00f8..d5e4a5c062 100644
--- a/bfd/elf-eh-frame.c
+++ b/bfd/elf-eh-frame.c
@@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
new file mode 100644
index 0000000..a63ad02
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
@@ -0,0 +1,304 @@
+From 6aadc146948741df27125cc2253ba9a50efa5cfc Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 8 Nov 2016 11:54:08 +0530
+Subject: [PATCH 04/52] [LOCAL]: Fix relaxation of assembler resolved
+ references,Fixup debug_loc sections after linker relaxation Adds a new
+ reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the
+ assembler to the linker when the linker manages to fully resolve a local
+ symbol reference.
+
+This is a workaround for design flaws in the assembler to
+linker interface with regards to linker relaxation.
+
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+
+Conflicts:
+ bfd/elf32-microblaze.c
+ binutils/readelf.c
+ include/elf/microblaze.h
+---
+ bfd/bfd-in2.h | 5 ++
+ bfd/elf32-microblaze.c | 126 ++++++++++++++++++++++++++++---------
+ bfd/libbfd.h | 1 +
+ bfd/reloc.c | 6 ++
+ binutils/readelf.c | 4 ++
+ gas/config/tc-microblaze.c | 4 ++
+ include/elf/microblaze.h | 2 +
+ 7 files changed, 119 insertions(+), 29 deletions(-)
+
+diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
+index 35ef4d755b..1bd19a2b63 100644
+--- a/bfd/bfd-in2.h
++++ b/bfd/bfd-in2.h
+@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor */
+ expressions of the form "Symbol Op Symbol" */
+ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
+
++/* This is a 32 bit reloc that stores the 32 bit pc relative
++value in two words (with an imm instruction).No relocation is
++done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_32_NONE,
++
+ /* This is a 64 bit reloc that stores the 32 bit pc relative
+ value in two words (with an imm instruction). No relocation is
+ done here - only used for relaxing */
+diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
+index 693fc71f73..e9715eae6a 100644
+--- a/bfd/elf32-microblaze.c
++++ b/bfd/elf32-microblaze.c
+@@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+ FALSE), /* PC relative offset? */
+
+ /* This reloc does nothing. Used for relaxation. */
++ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */
++ 0, /* Rightshift. */
++ 2, /* Size (0 = byte, 1 = short, 2 = long). */
++ 32, /* Bitsize. */
++ TRUE, /* PC_relative. */
++ 0, /* Bitpos. */
++ complain_overflow_bitfield, /* Complain on overflow. */
++ NULL, /* Special Function. */
++ "R_MICROBLAZE_32_NONE",/* Name. */
++ FALSE, /* Partial Inplace. */
++ 0, /* Source Mask. */
++ 0, /* Dest Mask. */
++ FALSE), /* PC relative offset? */
++
+ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */
+ 0, /* Rightshift. */
+ 3, /* Size (0 = byte, 1 = short, 2 = long). */
+@@ -562,7 +576,10 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+ case BFD_RELOC_NONE:
+ microblaze_reloc = R_MICROBLAZE_NONE;
+ break;
+- case BFD_RELOC_MICROBLAZE_64_NONE:
++ case BFD_RELOC_MICROBLAZE_32_NONE:
++ microblaze_reloc = R_MICROBLAZE_32_NONE;
++ break;
++ case BFD_RELOC_MICROBLAZE_64_NONE:
+ microblaze_reloc = R_MICROBLAZE_64_NONE;
+ break;
+ case BFD_RELOC_32:
+@@ -1914,18 +1931,26 @@ microblaze_elf_relax_section (bfd *abfd,
+ }
+ break;
+ case R_MICROBLAZE_NONE:
++ case R_MICROBLAZE_32_NONE:
+ {
+ /* This was a PC-relative instruction that was
+ completely resolved. */
+ int sfix, efix;
++ unsigned int val;
+ bfd_vma target_address;
+ target_address = irel->r_addend + irel->r_offset;
+ sfix = calc_fixup (irel->r_offset, 0, sec);
+ efix = calc_fixup (target_address, 0, sec);
+- irel->r_addend -= (efix - sfix);
+- /* Should use HOWTO. */
+- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
+- irel->r_addend);
++
++ /* Validate the in-band val. */
++ val = bfd_get_32 (abfd, contents + irel->r_offset);
++ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
++ }
++ irel->r_addend -= (efix - sfix);
++ /* Should use HOWTO. */
++ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
++ irel->r_addend);
+ }
+ break;
+ case R_MICROBLAZE_64_NONE:
+@@ -1969,30 +1994,73 @@ microblaze_elf_relax_section (bfd *abfd,
+ irelscanend = irelocs + o->reloc_count;
+ for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
+ {
+- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
+- {
+- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++ {
++ unsigned int val;
++
++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++ /* hax: We only do the following fixup for debug location lists. */
++ if (strcmp(".debug_loc", o->name))
++ continue;
++
++ /* This was a PC-relative instruction that was completely resolved. */
++ if (ocontents == NULL)
++ {
++ if (elf_section_data (o)->this_hdr.contents != NULL)
++ ocontents = elf_section_data (o)->this_hdr.contents;
++ else
++ {
++ /* We always cache the section contents.
++ Perhaps, if info->keep_memory is FALSE, we
++ should free them, if we are permitted to. */
++
++ if (o->rawsize == 0)
++ o->rawsize = o->size;
++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++ if (ocontents == NULL)
++ goto error_return;
++ if (!bfd_get_section_contents (abfd, o, ocontents,
++ (file_ptr) 0,
++ o->rawsize))
++ goto error_return;
++ elf_section_data (o)->this_hdr.contents = ocontents;
++ }
++ }
+
+- /* Look at the reloc only if the value has been resolved. */
+- if (isym->st_shndx == shndx
+- && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
+- {
+- if (ocontents == NULL)
+- {
+- if (elf_section_data (o)->this_hdr.contents != NULL)
+- ocontents = elf_section_data (o)->this_hdr.contents;
+- else
+- {
+- /* We always cache the section contents.
+- Perhaps, if info->keep_memory is FALSE, we
+- should free them, if we are permitted to. */
+- if (o->rawsize == 0)
+- o->rawsize = o->size;
+- ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
+- if (ocontents == NULL)
+- goto error_return;
+- if (!bfd_get_section_contents (abfd, o, ocontents,
+- (file_ptr) 0,
++ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++ if (val != irelscan->r_addend) {
++ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++ }
++
++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
++ irelscan->r_addend);
++ }
++ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++ {
++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++ /* Look at the reloc only if the value has been resolved. */
++ if (isym->st_shndx == shndx
++ && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
++ {
++ if (ocontents == NULL)
++ {
++ if (elf_section_data (o)->this_hdr.contents != NULL)
++ ocontents = elf_section_data (o)->this_hdr.contents;
++ else
++ {
++ /* We always cache the section contents.
++ Perhaps, if info->keep_memory is FALSE, we
++ should free them, if we are permitted to. */
++ if (o->rawsize == 0)
++ o->rawsize = o->size;
++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++ if (ocontents == NULL)
++ goto error_return;
++ if (!bfd_get_section_contents (abfd, o, ocontents,
++ (file_ptr) 0,
+ o->rawsize))
+ goto error_return;
+ elf_section_data (o)->this_hdr.contents = ocontents;
+@@ -2028,7 +2096,7 @@ microblaze_elf_relax_section (bfd *abfd,
+ elf_section_data (o)->this_hdr.contents = ocontents;
+ }
+ }
+- irelscan->r_addend -= calc_fixup (irel->r_addend
++ irelscan->r_addend -= calc_fixup (irelscan->r_addend
+ + isym->st_value,
+ 0,
+ sec);
+diff --git a/bfd/libbfd.h b/bfd/libbfd.h
+index b97534fc9f..c1551b9240 100644
+--- a/bfd/libbfd.h
++++ b/bfd/libbfd.h
+@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+ "BFD_RELOC_MICROBLAZE_32_ROSDA",
+ "BFD_RELOC_MICROBLAZE_32_RWSDA",
+ "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
++ "BFD_RELOC_MICROBLAZE_32_NONE",
+ "BFD_RELOC_MICROBLAZE_64_NONE",
+ "BFD_RELOC_MICROBLAZE_64_GOTPC",
+ "BFD_RELOC_MICROBLAZE_64_GOT",
+diff --git a/bfd/reloc.c b/bfd/reloc.c
+index 9aba84ca81..9b39b41941 100644
+--- a/bfd/reloc.c
++++ b/bfd/reloc.c
+@@ -6858,6 +6858,12 @@ ENUM
+ ENUMDOC
+ This is a 32 bit reloc for the microblaze to handle
+ expressions of the form "Symbol Op Symbol"
++ENUM
++ BFD_RELOC_MICROBLAZE_32_NONE
++ENUMDOC
++ This is a 32 bit reloc that stores the 32 bit pc relative
++ value in two words (with an imm instruction). No relocation is
++ done here - only used for relaxing
+ ENUM
+ BFD_RELOC_MICROBLAZE_64_NONE
+ ENUMDOC
+diff --git a/binutils/readelf.c b/binutils/readelf.c
+index 6057515a89..2b797ef2db 100644
+--- a/binutils/readelf.c
++++ b/binutils/readelf.c
+@@ -13187,6 +13187,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
+ return reloc_type == 1; /* R_Z80_8. */
+ default:
+ return FALSE;
++ case EM_MICROBLAZE:
++ return reloc_type == 33 /* R_MICROBLAZE_32_NONE. */
++ || reloc_type == 0 /* R_MICROBLAZE_NONE. */
++ || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */
+ }
+ }
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 34eeb97235..74a63abeb0 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2198,9 +2198,12 @@ md_apply_fix (fixS * fixP,
+ moves code around due to relaxing. */
+ if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++ else if (fixP->fx_r_type == BFD_RELOC_32)
++ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+ else
+ fixP->fx_r_type = BFD_RELOC_NONE;
+ fixP->fx_addsy = section_symbol (absolute_section);
++ fixP->fx_done = 0;
+ }
+ return;
+ }
+@@ -2421,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+ switch (fixp->fx_r_type)
+ {
+ case BFD_RELOC_NONE:
++ case BFD_RELOC_MICROBLAZE_32_NONE:
+ case BFD_RELOC_MICROBLAZE_64_NONE:
+ case BFD_RELOC_32:
+ case BFD_RELOC_MICROBLAZE_32_LO:
+diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
+index 2fec296967..3978a3dc01 100644
+--- a/include/elf/microblaze.h
++++ b/include/elf/microblaze.h
+@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+ RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */
+ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
+ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
++ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
++
+ END_RELOC_NUMBERS (R_MICROBLAZE_max)
+
+ /* Global base address names. */
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
deleted file mode 100644
index 14a4f32..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-Fix-relaxation-of-assembler-resolved-references.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From c4ce6cb47613293e02837fc00c2c2ebfcdd596f6 Mon Sep 17 00:00:00 2001
-From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
-Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
-
----
- bfd/elf32-microblaze.c | 41 ++++++++++++++++++++++++++++++++++++++
- gas/config/tc-microblaze.c | 1 +
- 2 files changed, 42 insertions(+)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 693fc71f730..09dedc46106 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1969,6 +1969,47 @@ microblaze_elf_relax_section (bfd *abfd,
- irelscanend = irelocs + o->reloc_count;
- for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
- {
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+ {
-+ unsigned int val;
-+
-+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+
-+ /* This was a PC-relative instruction that was completely resolved. */
-+ if (ocontents == NULL)
-+ {
-+ if (elf_section_data (o)->this_hdr.contents != NULL)
-+ ocontents = elf_section_data (o)->this_hdr.contents;
-+ else
-+ {
-+ /* We always cache the section contents.
-+ Perhaps, if info->keep_memory is FALSE, we
-+ should free them, if we are permitted to. */
-+
-+ if (o->rawsize == 0)
-+ o->rawsize = o->size;
-+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+ if (ocontents == NULL)
-+ goto error_return;
-+ if (!bfd_get_section_contents (abfd, o, ocontents,
-+ (file_ptr) 0,
-+ o->rawsize))
-+ goto error_return;
-+ elf_section_data (o)->this_hdr.contents = ocontents;
-+ }
-+ }
-+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+ if (val != irelscan->r_addend) {
-+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+ }
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+ + isym->st_value, 0, sec);
-+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+ irelscan->r_addend);
-+ }
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
-+ fprintf(stderr, "Unhandled NONE 64\n");
-+ }
- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
- {
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 34eeb972357..d01653aeef9 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2201,6 +2201,7 @@ md_apply_fix (fixS * fixP,
- else
- fixP->fx_r_type = BFD_RELOC_NONE;
- fixP->fx_addsy = section_symbol (absolute_section);
-+ fixP->fx_done = 0;
- }
- return;
- }
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
similarity index 88%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 4319f1d..95e4a36 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From 3f743710f53d86ed5e53d97b3b1b06d7a8cbcdc1 Mon Sep 17 00:00:00 2001
+From 4fc5075cebc9c76053b5ff683ab75c9e8b46ca1a Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 05/52] upstream change to garbage collection sweep causes mb
regression
Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -23,7 +23,7 @@
1 file changed, 1 deletion(-)
diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 998b72f2281..2daf8fdf6a8 100644
+index 998b72f228..2daf8fdf6a 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -6372,7 +6372,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
index 4ab7681..fcbd662 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 481dd44f36e7df691037201d9865482debbb397d Mon Sep 17 00:00:00 2001
+From 4e8bd012d3025a6f6b2b2794930f1bfbad7932e8 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 06/52] Fix bug in TLSTPREL Relocation
Fixed the problem related to the fixup/relocations TLSTPREL.
When the fixup is applied the addend is not added at the correct offset
@@ -13,7 +13,7 @@
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 1be1ead2f41..ec1944c6faf 100644
+index e9715eae6a..9c4f809eaa 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -1447,9 +1447,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
deleted file mode 100644
index 308a453..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 77c9dd2085e5a9e116cd8d8b4fbc1387c93d26d8 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
- relaxation
-
-Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
-reloc info from the assembler to the linker when the linker
-manages to fully resolve a local symbol reference.
-
-This is a workaround for design flaws in the assembler to
-linker interface with regards to linker relaxation.
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
----
- bfd/bfd-in2.h | 5 +++++
- bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++-------
- bfd/libbfd.h | 1 +
- bfd/reloc.c | 6 ++++++
- binutils/readelf.c | 4 ++++
- gas/config/tc-microblaze.c | 3 +++
- include/elf/microblaze.h | 1 +
- 7 files changed, 52 insertions(+), 7 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 35ef4d755bb..3fdbf8ed755 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5428,6 +5428,11 @@ value relative to the read-write small data area anchor */
- expressions of the form "Symbol Op Symbol" */
- BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
-
-+/* This is a 32 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_32_NONE,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction). No relocation is
- done here - only used for relaxing */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 09dedc46106..1be1ead2f41 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
- 0x0000ffff, /* Dest Mask. */
- FALSE), /* PC relative offset? */
-
-+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */
-+ 0, /* Rightshift. */
-+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
-+ 32, /* Bitsize. */
-+ TRUE, /* PC_relative. */
-+ 0, /* Bitpos. */
-+ complain_overflow_bitfield, /* Complain on overflow. */
-+ NULL, /* Special Function. */
-+ "R_MICROBLAZE_32_NONE",/* Name. */
-+ FALSE, /* Partial Inplace. */
-+ 0, /* Source Mask. */
-+ 0, /* Dest Mask. */
-+ FALSE), /* PC relative offset? */
-+
- /* This reloc does nothing. Used for relaxation. */
- HOWTO (R_MICROBLAZE_64_NONE, /* Type. */
- 0, /* Rightshift. */
-@@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
- case BFD_RELOC_NONE:
- microblaze_reloc = R_MICROBLAZE_NONE;
- break;
-+ case BFD_RELOC_MICROBLAZE_32_NONE:
-+ microblaze_reloc = R_MICROBLAZE_32_NONE;
-+ break;
- case BFD_RELOC_MICROBLAZE_64_NONE:
- microblaze_reloc = R_MICROBLAZE_64_NONE;
- break;
-@@ -1914,14 +1931,22 @@ microblaze_elf_relax_section (bfd *abfd,
- }
- break;
- case R_MICROBLAZE_NONE:
-+ case R_MICROBLAZE_32_NONE:
- {
- /* This was a PC-relative instruction that was
- completely resolved. */
- int sfix, efix;
-+ unsigned int val;
- bfd_vma target_address;
- target_address = irel->r_addend + irel->r_offset;
- sfix = calc_fixup (irel->r_offset, 0, sec);
- efix = calc_fixup (target_address, 0, sec);
-+
-+ /* Validate the in-band val. */
-+ val = bfd_get_32 (abfd, contents + irel->r_offset);
-+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+ }
- irel->r_addend -= (efix - sfix);
- /* Should use HOWTO. */
- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-@@ -1969,12 +1994,16 @@ microblaze_elf_relax_section (bfd *abfd,
- irelscanend = irelocs + o->reloc_count;
- for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
- {
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
- {
- unsigned int val;
-
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-
-+ /* hax: We only do the following fixup for debug location lists. */
-+ if (strcmp(".debug_loc", o->name))
-+ continue;
-+
- /* This was a PC-relative instruction that was completely resolved. */
- if (ocontents == NULL)
- {
-@@ -2002,14 +2031,10 @@ microblaze_elf_relax_section (bfd *abfd,
- if (val != irelscan->r_addend) {
- fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
- }
-- irelscan->r_addend -= calc_fixup (irelscan->r_addend
-- + isym->st_value, 0, sec);
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
- microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
- irelscan->r_addend);
- }
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
-- fprintf(stderr, "Unhandled NONE 64\n");
-- }
- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
- {
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2069,7 +2094,7 @@ microblaze_elf_relax_section (bfd *abfd,
- elf_section_data (o)->this_hdr.contents = ocontents;
- }
- }
-- irelscan->r_addend -= calc_fixup (irel->r_addend
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend
- + isym->st_value,
- 0,
- sec);
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index b97534fc9fe..c1551b92405 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2967,6 +2967,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
- "BFD_RELOC_MICROBLAZE_32_ROSDA",
- "BFD_RELOC_MICROBLAZE_32_RWSDA",
- "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-+ "BFD_RELOC_MICROBLAZE_32_NONE",
- "BFD_RELOC_MICROBLAZE_64_NONE",
- "BFD_RELOC_MICROBLAZE_64_GOTPC",
- "BFD_RELOC_MICROBLAZE_64_GOT",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 9aba84ca81e..9b39b419415 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6858,6 +6858,12 @@ ENUM
- ENUMDOC
- This is a 32 bit reloc for the microblaze to handle
- expressions of the form "Symbol Op Symbol"
-+ENUM
-+ BFD_RELOC_MICROBLAZE_32_NONE
-+ENUMDOC
-+ This is a 32 bit reloc that stores the 32 bit pc relative
-+ value in two words (with an imm instruction). No relocation is
-+ done here - only used for relaxing
- ENUM
- BFD_RELOC_MICROBLAZE_64_NONE
- ENUMDOC
-diff --git a/binutils/readelf.c b/binutils/readelf.c
-index 6057515a89b..04704d22fef 100644
---- a/binutils/readelf.c
-+++ b/binutils/readelf.c
-@@ -13406,6 +13406,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
- || reloc_type == 32 /* R_AVR_DIFF32. */);
- case EM_METAG:
- return reloc_type == 3; /* R_METAG_NONE. */
-+ case EM_MICROBLAZE:
-+ return reloc_type == 30 /* R_MICROBLAZE_32_NONE. */
-+ || reloc_type == 0 /* R_MICROBLAZE_NONE. */
-+ || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */
- case EM_NDS32:
- return (reloc_type == 0 /* R_XTENSA_NONE. */
- || reloc_type == 204 /* R_NDS32_DIFF8. */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index d01653aeef9..74a63abeb0c 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2198,6 +2198,8 @@ md_apply_fix (fixS * fixP,
- moves code around due to relaxing. */
- if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
- fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
-+ else if (fixP->fx_r_type == BFD_RELOC_32)
-+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
- else
- fixP->fx_r_type = BFD_RELOC_NONE;
- fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2422,6 +2424,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
- switch (fixp->fx_r_type)
- {
- case BFD_RELOC_NONE:
-+ case BFD_RELOC_MICROBLAZE_32_NONE:
- case BFD_RELOC_MICROBLAZE_64_NONE:
- case BFD_RELOC_32:
- case BFD_RELOC_MICROBLAZE_32_LO:
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 2fec296967b..55f34f72b0d 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
- RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */
- RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
- RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
-+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
- END_RELOC_NUMBERS (R_MICROBLAZE_max)
-
- /* Global base address names. */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
similarity index 94%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
index c5bd3b2..fd15e23 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0007-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001
+From 1d1344e5786d435f4f492739d0c477befa4c6906 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 09/40] Added Address extension instructions
+Subject: [PATCH 07/52] Added Address extension instructions
This patch adds the support of new instructions which are required
for supporting Address extension feature.
@@ -13,27 +13,20 @@
*microblaze-opc.h (op_code_struct): Update
Added new instructions
- Set MAX_OPCODES to matching value
*microblaze-opcm.h (microblaze_instr): Update
Added new instructions
+
+Conflicts:
+ opcodes/microblaze-opcm.h
---
- opcodes/microblaze-opc.h | 13 ++++++++++++-
+ opcodes/microblaze-opc.h | 11 +++++++++++
opcodes/microblaze-opcm.h | 10 +++++-----
- 2 files changed, 17 insertions(+), 6 deletions(-)
+ 2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index b6c5016e4d2..c7a506b845a 100644
+index b6c5016e4d..1f1ade40b2 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
-
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
-
- struct op_code_struct
- {
@@ -178,8 +178,11 @@ struct op_code_struct
{"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
{"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -81,7 +74,7 @@
{"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
{"", 0, 0, 0, 0, 0, 0, 0, 0},
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 795c57b5ff6..b05e319862e 100644
+index 795c57b5ff..b05e319862 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -33,13 +33,13 @@ enum microblaze_instr
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
new file mode 100644
index 0000000..8564003
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
@@ -0,0 +1,25 @@
+From b2e494ee992ef0509bd2a4512f62841098631219 Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Thu, 28 Jan 2016 14:07:34 +0530
+Subject: [PATCH 08/52] fixing the MAX_OPCODES to correct value
+
+---
+ opcodes/microblaze-opc.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
+index 1f1ade40b2..c7a506b845 100644
+--- a/opcodes/microblaze-opc.h
++++ b/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+
+ struct op_code_struct
+ {
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch
similarity index 90%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch
index 1612c11..0188629 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-Add-new-bit-field-instructions.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 0034d6b5231a0a72c5f9fc47ba4c8eba0c35ff39 Mon Sep 17 00:00:00 2001
+From cea8d524fca305c2878374433d9745b938e4c78f Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/40] Add new bit-field instructions
+Subject: [PATCH 09/52] Add new bit-field instructions
This patches adds new bsefi and bsifi instructions.
BSEFI- The instruction shall extract a bit field from a
@@ -12,15 +12,18 @@
The rest of the bits in the destination register shall be unchanged
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+
+Conflicts:
+ opcodes/microblaze-dis.c
---
gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
- opcodes/microblaze-dis.c | 17 +++++++++
+ opcodes/microblaze-dis.c | 20 +++++++++--
opcodes/microblaze-opc.h | 12 ++++++-
opcodes/microblaze-opcm.h | 6 +++-
- 4 files changed, 103 insertions(+), 3 deletions(-)
+ 4 files changed, 104 insertions(+), 5 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 74a63abeb0c..765abfb3885 100644
+index 74a63abeb0..765abfb388 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -917,7 +917,7 @@ md_assemble (char * str)
@@ -110,14 +113,14 @@
if (strcmp (op_end, ""))
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index be1534c257c..52c9068805f 100644
+index be1534c257..315c6e9350 100644
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
-@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
- return p;
+@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
}
-+static char *
+ static char *
+-get_field_rfsl (struct string_buf *buf, long instr)
+get_field_imm5width (struct string_buf *buf, long instr)
+{
+ char *p = strbuf (buf);
@@ -129,23 +132,26 @@
+ return p;
+}
+
- static char *
- get_field_rfsl (struct string_buf *buf, long instr)
++static char *
++get_field_rfsl (struct string_buf *buf,long instr)
{
-@@ -428,6 +440,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ char *p = strbuf (buf);
+
+@@ -427,7 +439,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ /* For mbar 16 or sleep insn. */
case INST_TYPE_NONE:
break;
- /* For tuqula instruction */
+- /* For tuqula instruction */
+ /* For bit field insns. */
+ case INST_TYPE_RD_R1_IMM5_IMM5:
-+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
-+ break;
++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++ break;
+ /* For tuqula instruction */
case INST_TYPE_RD:
print_func (stream, "\t%s", get_field_rd (&buf, inst));
break;
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index c7a506b845a..f61f4ef66d9 100644
+index c7a506b845..f61f4ef66d 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -59,6 +59,9 @@
@@ -196,7 +202,7 @@
#endif /* MICROBLAZE_OPC */
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index b05e319862e..fa921c90c98 100644
+index b05e319862..fa921c90c9 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -29,7 +29,7 @@ enum microblaze_instr
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch
similarity index 74%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch
index fcb9c8a..892205c 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-fixing-the-imm-bug.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0010-fixing-the-imm-bug.patch
@@ -1,15 +1,15 @@
-From 75e55d8ebf3cd780fe69c066163ab2da7ac204f2 Mon Sep 17 00:00:00 2001
+From d6ccef90be40de63ee6da4943a601edaf7b1a136 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/40] fixing the imm bug.
+Subject: [PATCH 10/52] fixing the imm bug. with relax option imm -1 is also
+ getting removed this is corrected now.
-with relax option imm -1 is also getting removed this is corrected now.
---
bfd/elf32-microblaze.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index ec1944c6faf..cf4a7fdba33 100644
+index 9c4f809eaa..c22130fd8c 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -1865,8 +1865,7 @@ microblaze_elf_relax_section (bfd *abfd,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
similarity index 81%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
index 02cc125..db23fe1 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0011-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch
@@ -1,7 +1,7 @@
-From 5432f81ba9d7c17b20ff576c7c09ae78f4fe6e9c Mon Sep 17 00:00:00 2001
+From 3bb637b058c5f2622950e6984695e36f9cac067a Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Fri, 29 Sep 2017 18:00:23 +0530
-Subject: [PATCH 12/40] [Patch,Microblaze]: fixed bug in GCC so that It will
+Subject: [PATCH 11/52] [Patch,Microblaze]: fixed bug in GCC so that It will
support .long 0U and .long 0u
---
@@ -9,7 +9,7 @@
1 file changed, 9 insertions(+)
diff --git a/gas/expr.c b/gas/expr.c
-index 6f8ccb82303..0e34ca53d9b 100644
+index 6f8ccb8230..0e34ca53d9 100644
--- a/gas/expr.c
+++ b/gas/expr.c
@@ -803,6 +803,15 @@ operand (expressionS *expressionP, enum expr_mode mode)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch
similarity index 76%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch
index accff21..4145b0d 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-fixing-the-constant-range-check-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0012-fixing-the-constant-range-check-issue.patch
@@ -1,15 +1,15 @@
-From 6337e24a220dca86b71efcc10c5ffed6bf11bc22 Mon Sep 17 00:00:00 2001
+From e1cb5c37efd76b44a878574ee3baad4c7a882e3b Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 16 Oct 2017 15:44:23 +0530
-Subject: [PATCH 13/40] fixing the constant range check issue
+Subject: [PATCH 12/52] fixing the constant range check issue sample error: not
+ in range ffffffff80000000..7fffffff, not ffffffff70000000
-sample error: not in range ffffffff80000000..7fffffff, not ffffffff70000000
---
gas/config/tc-microblaze.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 765abfb3885..5810a74a5fc 100644
+index 765abfb388..5810a74a5f 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
index cdbe65a..a74f2b9 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0013-Patch-Microblaze-Compiler-will-give-error-messages-i.patch
@@ -1,7 +1,7 @@
-From e7e06edfb6c24a993603c9100f8ab8c29999ef90 Mon Sep 17 00:00:00 2001
+From 1a3f130008b4ebcd9a6e45cdac7188bde88f2f28 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 21 Feb 2018 12:32:02 +0530
-Subject: [PATCH 14/40] [Patch,Microblaze]: Compiler will give error messages
+Subject: [PATCH 13/52] [Patch,Microblaze]: Compiler will give error messages
in more detail for mxl-gp-opt flag..
---
@@ -9,7 +9,7 @@
1 file changed, 12 insertions(+)
diff --git a/ld/ldmain.c b/ld/ldmain.c
-index 08be9030cb5..613d748fefd 100644
+index 08be9030cb..613d748fef 100644
--- a/ld/ldmain.c
+++ b/ld/ldmain.c
@@ -1515,6 +1515,18 @@ reloc_overflow (struct bfd_link_info *info,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-intial-commit-of-MB-64-bit.patch
similarity index 93%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-intial-commit-of-MB-64-bit.patch
index 9f22801..f0037e1 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0014-intial-commit-of-MB-64-bit.patch
@@ -1,84 +1,90 @@
-From a7626e576d867c6c9c8321f00cf5e17dc31c52b8 Mon Sep 17 00:00:00 2001
+From d25d934f076297615cb0287488449fb32b9c46e8 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/40] intial commit of MB 64-bit
+Subject: [PATCH 14/52] intial commit of MB 64-bit
+Conflicts:
+ bfd/configure
+ bfd/configure.ac
+ bfd/cpu-microblaze.c
+ ld/Makefile.am
+ ld/Makefile.in
+ opcodes/microblaze-dis.c
---
bfd/Makefile.am | 2 +
bfd/Makefile.in | 3 +
bfd/config.bfd | 4 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
- bfd/cpu-microblaze.c | 55 +-
- bfd/doc/Makefile.in | 1 +
- bfd/elf64-microblaze.c | 3560 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c | 53 +-
+ bfd/elf64-microblaze.c | 3610 ++++++++++++++++++++++++++++
bfd/targets.c | 6 +
gas/config/tc-microblaze.c | 274 ++-
gas/config/tc-microblaze.h | 4 +-
include/elf/common.h | 1 +
ld/Makefile.am | 4 +
- ld/Makefile.in | 7 +
+ ld/Makefile.in | 6 +
ld/configure.tgt | 3 +
ld/emulparams/elf64microblaze.sh | 23 +
ld/emulparams/elf64microblazeel.sh | 23 +
- opcodes/microblaze-dis.c | 43 +-
+ opcodes/microblaze-dis.c | 35 +-
opcodes/microblaze-opc.h | 162 +-
opcodes/microblaze-opcm.h | 20 +-
- 20 files changed, 4156 insertions(+), 43 deletions(-)
+ 19 files changed, 4197 insertions(+), 40 deletions(-)
create mode 100644 bfd/elf64-microblaze.c
create mode 100644 ld/emulparams/elf64microblaze.sh
create mode 100644 ld/emulparams/elf64microblazeel.sh
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index c88c4480001..9e12b34038c 100644
+index c88c448000..d86f1c5697 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
-@@ -552,6 +552,7 @@ BFD64_BACKENDS = \
- elf64-ia64.lo \
- elf64-ia64-vms.lo \
- elfxx-ia64.lo \
+@@ -562,6 +562,7 @@ BFD64_BACKENDS = \
+ elf64-riscv.lo \
+ elfxx-riscv.lo \
+ elf64-s390.lo \
+ elf64-microblaze.lo \
- elfn32-mips.lo \
- elf64-mips.lo \
- elfxx-mips.lo \
-@@ -591,6 +592,7 @@ BFD64_BACKENDS_CFILES = \
- elf64-gen.c \
- elf64-hppa.c \
- elf64-ia64-vms.c \
-+ elf64-microblaze.c \
- elf64-mips.c \
- elf64-mmix.c \
+ elf64-sparc.lo \
+ elf64-tilegx.lo \
+ elf64-x86-64.lo \
+@@ -596,6 +597,7 @@ BFD64_BACKENDS_CFILES = \
elf64-nfp.c \
+ elf64-ppc.c \
+ elf64-s390.c \
++ elf64-microblaze.c \
+ elf64-sparc.c \
+ elf64-tilegx.c \
+ elf64-x86-64.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index d0d14c6ab32..5c12b706616 100644
+index d0d14c6ab3..a54abeca48 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
-@@ -978,6 +978,7 @@ BFD64_BACKENDS = \
- elf64-ia64.lo \
- elf64-ia64-vms.lo \
- elfxx-ia64.lo \
+@@ -988,6 +988,7 @@ BFD64_BACKENDS = \
+ elf64-riscv.lo \
+ elfxx-riscv.lo \
+ elf64-s390.lo \
+ elf64-microblaze.lo \
- elfn32-mips.lo \
- elf64-mips.lo \
- elfxx-mips.lo \
-@@ -1017,6 +1018,7 @@ BFD64_BACKENDS_CFILES = \
- elf64-gen.c \
- elf64-hppa.c \
- elf64-ia64-vms.c \
-+ elf64-microblaze.c \
- elf64-mips.c \
- elf64-mmix.c \
+ elf64-sparc.lo \
+ elf64-tilegx.lo \
+ elf64-x86-64.lo \
+@@ -1022,6 +1023,7 @@ BFD64_BACKENDS_CFILES = \
elf64-nfp.c \
-@@ -1495,6 +1497,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
+ elf64-ppc.c \
+ elf64-s390.c \
++ elf64-microblaze.c \
+ elf64-sparc.c \
+ elf64-tilegx.c \
+ elf64-x86-64.c \
+@@ -1501,6 +1503,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 14523caf0c5..437c03bb9d9 100644
+index 14523caf0c..437c03bb9d 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -825,11 +825,15 @@ case "${targ}" in
@@ -98,36 +104,36 @@
#ifdef BFD64
diff --git a/bfd/configure b/bfd/configure
-index 5ab3e856bc2..982ecd254a8 100755
+index 0340ed541b..ff5ae4706c 100755
--- a/bfd/configure
+++ b/bfd/configure
-@@ -14828,6 +14828,8 @@ do
- metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;;
- microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
- microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+@@ -14903,6 +14903,8 @@ do
+ s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+ score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+ score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
- mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+ sh_coff_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;;
diff --git a/bfd/configure.ac b/bfd/configure.ac
-index 8e86f8399ce..38e80148171 100644
+index 8e86f8399c..408092d3be 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
-@@ -564,6 +564,8 @@ do
- metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;;
- microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
- microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+@@ -639,6 +639,8 @@ do
+ s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+ score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+ score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;;
+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
- mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
+ sh_coff_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;;
diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 05a3f767e22..f94dc2c177b 100644
+index 05a3f767e2..194920b20b 100644
--- a/bfd/cpu-microblaze.c
+++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,25 @@
+@@ -23,7 +23,24 @@
#include "bfd.h"
#include "libbfd.h"
@@ -148,13 +154,12 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ &bfd_microblaze_arch[1], /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ &bfd_microblaze_arch[1] /* Next in list. */
+},
{
32, /* Bits in a word. */
32, /* Bits in an address. */
-@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
+@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch =
bfd_arch_default_fill, /* Default fill. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
@@ -173,8 +178,7 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ &bfd_microblaze_arch[1], /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ &bfd_microblaze_arch[1] /* Next in list. */
+},
+{
+ 64, /* 32 bits in a word. */
@@ -189,29 +193,17 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ NULL, /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ NULL, /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+}
+#endif
};
-diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
-index 2c1ddd45b8d..a976b24d0bf 100644
---- a/bfd/doc/Makefile.in
-+++ b/bfd/doc/Makefile.in
-@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
- prefix = @prefix@
- program_transform_name = @program_transform_name@
- psdir = @psdir@
-+runstatedir = @runstatedir@
- sbindir = @sbindir@
- sharedstatedir = @sharedstatedir@
- srcdir = @srcdir@
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
new file mode 100644
-index 00000000000..fa4b95e47e0
+index 0000000000..a357388115
--- /dev/null
+++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3560 @@
+@@ -0,0 +1,3610 @@
+/* Xilinx MicroBlaze-specific support for 32-bit ELF
+
+ Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -870,7 +862,7 @@
+/* Set the howto pointer for a RCE ELF reloc. */
+
+static bfd_boolean
-+microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
+ arelent * cache_ptr,
+ Elf_Internal_Rela * dst)
+{
@@ -883,14 +875,15 @@
+ r_type = ELF64_R_TYPE (dst->r_info);
+ if (r_type >= R_MICROBLAZE_max)
+ {
-+ (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+ abfd, r_type);
++ /* xgettext:c-format */
++ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
++ abfd, r_type);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
+ cache_ptr->howto = microblaze_elf_howto_table [r_type];
-+ return TRUE;
++ return TRUE;
+}
+
+/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */
@@ -1013,7 +1006,6 @@
+ struct elf64_mb_link_hash_entry *eh;
+
+ eh = (struct elf64_mb_link_hash_entry *) entry;
-+ eh->dyn_relocs = NULL;
+ eh->tls_mask = 0;
+ }
+
@@ -1026,7 +1018,7 @@
+microblaze_elf_link_hash_table_create (bfd *abfd)
+{
+ struct elf64_mb_link_hash_table *ret;
-+ bfd_size_type amt = sizeof (struct elf64_mb_link_hash_table);
++ size_t amt = sizeof (struct elf64_mb_link_hash_table);
+
+ ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt);
+ if (ret == NULL)
@@ -1241,6 +1233,7 @@
+ else
+ {
+ bfd_vma relocation;
++ bfd_boolean resolved_to_zero;
+
+ /* This is a final link. */
+ sym = NULL;
@@ -1280,6 +1273,9 @@
+ goto check_reloc;
+ }
+
++ resolved_to_zero = (h != NULL
++ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
++
+ switch ((int) r_type)
+ {
+ case (int) R_MICROBLAZE_SRO32 :
@@ -1314,11 +1310,14 @@
+ }
+ else
+ {
-+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+ bfd_get_filename (input_bfd),
-+ sym_name,
-+ microblaze_elf_howto_table[(int) r_type]->name,
-+ bfd_section_name (sec));
++ _bfd_error_handler
++ /* xgettext:c-format */
++ (_("%pB: the target (%s) of an %s relocation"
++ " is in the wrong section (%pA)"),
++ input_bfd,
++ sym_name,
++ microblaze_elf_howto_table[(int) r_type]->name,
++ sec);
+ /*bfd_set_error (bfd_error_bad_value); ??? why? */
+ ret = FALSE;
+ continue;
@@ -1359,11 +1358,14 @@
+ }
+ else
+ {
-+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+ bfd_get_filename (input_bfd),
-+ sym_name,
-+ microblaze_elf_howto_table[(int) r_type]->name,
-+ bfd_section_name (sec));
++ _bfd_error_handler
++ /* xgettext:c-format */
++ (_("%pB: the target (%s) of an %s relocation"
++ " is in the wrong section (%pA)"),
++ input_bfd,
++ sym_name,
++ microblaze_elf_howto_table[(int) r_type]->name,
++ sec);
+ /*bfd_set_error (bfd_error_bad_value); ??? why? */
+ ret = FALSE;
+ continue;
@@ -1425,7 +1427,6 @@
+ goto dogot;
+ case (int) R_MICROBLAZE_TLSLD:
+ tls_type = (TLS_TLS | TLS_LD);
-+ /* Fall through. */
+ dogot:
+ case (int) R_MICROBLAZE_GOT_64:
+ {
@@ -1489,7 +1490,8 @@
+ /* Need to generate relocs ? */
+ if ((bfd_link_pic (info) || indx != 0)
+ && (h == NULL
-+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ && !resolved_to_zero)
+ || h->root.type != bfd_link_hash_undefweak))
+ need_relocs = TRUE;
+
@@ -1551,47 +1553,47 @@
+ }
+ else if (IS_TLS_GD(tls_type))
+ {
-+ *offp |= 1;
-+ static_value -= dtprel_base(info);
-+ if (need_relocs)
-+ {
-+ microblaze_elf_output_dynamic_relocation (output_bfd,
-+ htab->srelgot, htab->srelgot->reloc_count++,
-+ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
-+ got_offset, indx ? 0 : static_value);
-+ }
-+ else
-+ {
-+ bfd_put_32 (output_bfd, static_value,
-+ htab->sgot->contents + off2);
-+ }
++ *offp |= 1;
++ static_value -= dtprel_base(info);
++ if (need_relocs)
++ microblaze_elf_output_dynamic_relocation
++ (output_bfd,
++ htab->elf.srelgot,
++ htab->elf.srelgot->reloc_count++,
++ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
++ got_offset, indx ? 0 : static_value);
++ else
++ bfd_put_32 (output_bfd, static_value,
++ htab->elf.sgot->contents + off2);
+ }
+ else
+ {
-+ bfd_put_32 (output_bfd, static_value,
-+ htab->sgot->contents + off2);
++ bfd_put_32 (output_bfd, static_value,
++ htab->elf.sgot->contents + off2);
+
-+ /* Relocs for dyn symbols generated by
-+ finish_dynamic_symbols */
-+ if (bfd_link_pic (info) && h == NULL)
-+ {
-+ *offp |= 1;
-+ microblaze_elf_output_dynamic_relocation (output_bfd,
-+ htab->srelgot, htab->srelgot->reloc_count++,
-+ /* symindex= */ indx, R_MICROBLAZE_REL,
-+ got_offset, static_value);
-+ }
++ /* Relocs for dyn symbols generated by
++ finish_dynamic_symbols */
++ if (bfd_link_pic (info) && h == NULL)
++ {
++ *offp |= 1;
++ microblaze_elf_output_dynamic_relocation
++ (output_bfd,
++ htab->elf.srelgot,
++ htab->elf.srelgot->reloc_count++,
++ /* symindex= */ indx, R_MICROBLAZE_REL,
++ got_offset, static_value);
++ }
+ }
+ }
+
+ /* 4. Fixup Relocation with GOT offset value
+ Compute relative address of GOT entry for applying
+ the current relocation */
-+ relocation = htab->sgot->output_section->vma
-+ + htab->sgot->output_offset
++ relocation = htab->elf.sgot->output_section->vma
++ + htab->elf.sgot->output_offset
+ + off
-+ - htab->sgotplt->output_section->vma
-+ - htab->sgotplt->output_offset;
++ - htab->elf.sgotplt->output_section->vma
++ - htab->elf.sgotplt->output_offset;
+
+ /* Apply Current Relocation */
+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
@@ -1608,8 +1610,8 @@
+ bfd_vma immediate;
+ unsigned short lo, high;
+ relocation += addend;
-+ relocation -= htab->sgotplt->output_section->vma
-+ + htab->sgotplt->output_offset;
++ relocation -= (htab->elf.sgotplt->output_section->vma
++ + htab->elf.sgotplt->output_offset);
+ /* Write this value into correct location. */
+ immediate = relocation;
+ lo = immediate & 0x0000ffff;
@@ -1622,8 +1624,8 @@
+ case (int) R_MICROBLAZE_GOTOFF_32:
+ {
+ relocation += addend;
-+ relocation -= htab->sgotplt->output_section->vma
-+ + htab->sgotplt->output_offset;
++ relocation -= (htab->elf.sgotplt->output_section->vma
++ + htab->elf.sgotplt->output_offset);
+ /* Write this value into correct location. */
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ break;
@@ -1665,7 +1667,8 @@
+
+ if ((bfd_link_pic (info)
+ && (h == NULL
-+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ && !resolved_to_zero)
+ || h->root.type != bfd_link_hash_undefweak)
+ && (!howto->pc_relative
+ || (h != NULL
@@ -1726,7 +1729,7 @@
+ {
+ BFD_FAIL ();
+ (*_bfd_error_handler)
-+ (_("%pB: probably compiled without -fPIC?"),
++ (_("%B: probably compiled without -fPIC?"),
+ input_bfd);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
@@ -1825,6 +1828,21 @@
+ return ret;
+}
+
++/* Merge backend specific data from an object file to the output
++ object file when linking.
++
++ Note: We only use this hook to catch endian mismatches. */
++static bfd_boolean
++microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
++{
++ /* Check if we have the same endianess. */
++ if (! _bfd_generic_verify_endian_match (ibfd, obfd))
++ return FALSE;
++
++ return TRUE;
++}
++
++
+/* Calculate fixup value for reference. */
+
+static int
@@ -2141,7 +2159,7 @@
+ irelscanend = irelocs + o->reloc_count;
+ for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
+ {
-+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++ if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
+ {
+ unsigned int val;
+
@@ -2500,6 +2518,17 @@
+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
+}
+
++/* Update the got entry reference counts for the section being removed. */
++
++static bfd_boolean
++microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
++ struct bfd_link_info * info ATTRIBUTE_UNUSED,
++ asection * sec ATTRIBUTE_UNUSED,
++ const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
++{
++ return TRUE;
++}
++
+/* PIC support. */
+
+#define PLT_ENTRY_SIZE 16
@@ -2616,10 +2645,9 @@
+ else
+ {
+ h = sym_hashes [r_symndx - symtab_hdr->sh_info];
-+
-+ /* PR15323, ref flags aren't set for references in the same
-+ object. */
-+ h->root.non_ir_ref_regular = 1;
++ while (h->root.type == bfd_link_hash_indirect
++ || h->root.type == bfd_link_hash_warning)
++ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ }
+
+ switch (r_type)
@@ -2655,7 +2683,6 @@
+ tls_type |= (TLS_TLS | TLS_LD);
+ dogottls:
+ sec->has_tls_reloc = 1;
-+ /* Fall through. */
+ case R_MICROBLAZE_GOT_64:
+ if (htab->sgot == NULL)
+ {
@@ -2751,7 +2778,7 @@
+ /* If this is a global symbol, we count the number of
+ relocations we need for this symbol. */
+ if (h != NULL)
-+ head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
++ head = &h->dyn_relocs;
+ else
+ {
+ /* Track dynamic relocs needed for local syms too.
@@ -2778,7 +2805,7 @@
+ p = *head;
+ if (p == NULL || p->sec != sec)
+ {
-+ bfd_size_type amt = sizeof *p;
++ size_t amt = sizeof *p;
+ p = ((struct elf64_mb_dyn_relocs *)
+ bfd_alloc (htab->elf.dynobj, amt));
+ if (p == NULL)
@@ -2888,7 +2915,8 @@
+ struct elf64_mb_link_hash_table *htab;
+ struct elf64_mb_link_hash_entry * eh;
+ struct elf64_mb_dyn_relocs *p;
-+ asection *sdynbss, *s;
++ asection *sdynbss;
++ asection *s, *srel;
+ unsigned int power_of_two;
+ bfd *dynobj;
+
@@ -2970,7 +2998,7 @@
+
+ /* If we didn't find any dynamic relocs in read-only sections, then
+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */
-+ if (p == NULL)
++ if (!_bfd_elf_readonly_dynrelocs (h))
+ {
+ h->non_got_ref = 0;
+ return TRUE;
@@ -2989,11 +3017,19 @@
+ /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker
+ to copy the initial value out of the dynamic object and into the
+ runtime process image. */
-+ dynobj = elf_hash_table (info)->dynobj;
-+ BFD_ASSERT (dynobj != NULL);
++ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
++ {
++ s = htab->elf.sdynrelro;
++ srel = htab->elf.sreldynrelro;
++ }
++ else
++ {
++ s = htab->elf.sdynbss;
++ srel = htab->elf.srelbss;
++ }
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ {
-+ htab->srelbss->size += sizeof (Elf64_External_Rela);
++ srel->size += sizeof (Elf64_External_Rela);
+ h->needs_copy = 1;
+ }
+
@@ -3003,21 +3039,20 @@
+ if (power_of_two > 3)
+ power_of_two = 3;
+
-+ sdynbss = htab->sdynbss;
+ /* Apply the required alignment. */
-+ sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+ if (power_of_two > bfd_section_alignment (sdynbss))
++ s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
++ if (power_of_two > s->alignment_power)
+ {
-+ if (! bfd_set_section_alignment (sdynbss, power_of_two))
++ if (!bfd_set_section_alignment (s, power_of_two))
+ return FALSE;
+ }
+
+ /* Define the symbol as being at this point in the section. */
-+ h->root.u.def.section = sdynbss;
-+ h->root.u.def.value = sdynbss->size;
++ h->root.u.def.section = s;
++ h->root.u.def.value = s->size;
+
+ /* Increment the section size to make room for the symbol. */
-+ sdynbss->size += h->size;
++ s->size += h->size;
+ return TRUE;
+}
+
@@ -3077,13 +3112,13 @@
+ /* Make room for this entry. */
+ s->size += PLT_ENTRY_SIZE;
+
-+ /* We also need to make an entry in the .got.plt section, which
-+ will be placed in the .got section by the linker script. */
-+ htab->sgotplt->size += 4;
++ /* We also need to make an entry in the .got.plt section, which
++ will be placed in the .got section by the linker script. */
++ htab->elf.sgotplt->size += 4;
+
-+ /* We also need to make an entry in the .rel.plt section. */
-+ htab->srelplt->size += sizeof (Elf64_External_Rela);
-+ }
++ /* We also need to make an entry in the .rel.plt section. */
++ htab->elf.srelplt->size += sizeof (Elf32_External_Rela);
++ }
+ else
+ {
+ h->plt.offset = (bfd_vma) -1;
@@ -3138,17 +3173,17 @@
+ h->got.offset = (bfd_vma) -1;
+ }
+ else
-+ {
-+ s = htab->sgot;
-+ h->got.offset = s->size;
-+ s->size += need;
-+ htab->srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
-+ }
++ {
++ s = htab->elf.sgot;
++ h->got.offset = s->size;
++ s->size += need;
++ htab->elf.srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
++ }
+ }
+ else
+ h->got.offset = (bfd_vma) -1;
+
-+ if (eh->dyn_relocs == NULL)
++ if (h->dyn_relocs == NULL)
+ return TRUE;
+
+ /* In the shared -Bsymbolic case, discard space allocated for
@@ -3165,7 +3200,7 @@
+ {
+ struct elf64_mb_dyn_relocs **pp;
+
-+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
++ for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
+ {
+ p->count -= p->pc_count;
+ p->pc_count = 0;
@@ -3175,6 +3210,8 @@
+ pp = &p->next;
+ }
+ }
++ else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
++ h->dyn_relocs = NULL;
+ }
+ else
+ {
@@ -3204,13 +3241,13 @@
+ goto keep;
+ }
+
-+ eh->dyn_relocs = NULL;
++ h->dyn_relocs = NULL;
+
+ keep: ;
+ }
+
+ /* Finally, allocate space. */
-+ for (p = eh->dyn_relocs; p != NULL; p = p->next)
++ for (p = h->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *sreloc = elf_section_data (p->sec)->sreloc;
+ sreloc->size += p->count * sizeof (Elf64_External_Rela);
@@ -3286,8 +3323,8 @@
+ locsymcount = symtab_hdr->sh_info;
+ end_local_got = local_got + locsymcount;
+ lgot_masks = (unsigned char *) end_local_got;
-+ s = htab->sgot;
-+ srel = htab->srelgot;
++ s = htab->elf.sgot;
++ srel = htab->elf.srelgot;
+
+ for (; local_got < end_local_got; ++local_got, ++lgot_masks)
+ {
@@ -3327,10 +3364,10 @@
+
+ if (htab->tlsld_got.refcount > 0)
+ {
-+ htab->tlsld_got.offset = htab->sgot->size;
-+ htab->sgot->size += 8;
++ htab->tlsld_got.offset = htab->elf.sgot->size;
++ htab->elf.sgot->size += 8;
+ if (bfd_link_pic (info))
-+ htab->srelgot->size += sizeof (Elf64_External_Rela);
++ htab->elf.srelgot->size += sizeof (Elf64_External_Rela);
+ }
+ else
+ htab->tlsld_got.offset = (bfd_vma) -1;
@@ -3338,8 +3375,8 @@
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Make space for the trailing nop in .plt. */
-+ if (htab->splt->size > 0)
-+ htab->splt->size += 4;
++ if (htab->elf.splt->size > 0)
++ htab->elf.splt->size += 4;
+ }
+
+ /* The check_relocs and adjust_dynamic_symbol entry points have
@@ -3354,36 +3391,40 @@
+ continue;
+
+ /* It's OK to base decisions on the section name, because none
-+ of the dynobj section names depend upon the input files. */
++ of the dynobj section names depend upon the input files. */
+ name = bfd_section_name (s);
+
+ if (strncmp (name, ".rela", 5) == 0)
-+ {
-+ if (s->size == 0)
-+ {
-+ /* If we don't need this section, strip it from the
-+ output file. This is to handle .rela.bss and
-+ .rela.plt. We must create it in
-+ create_dynamic_sections, because it must be created
-+ before the linker maps input sections to output
-+ sections. The linker does that before
-+ adjust_dynamic_symbol is called, and it is that
-+ function which decides whether anything needs to go
-+ into these sections. */
-+ strip = TRUE;
-+ }
-+ else
-+ {
-+ /* We use the reloc_count field as a counter if we need
-+ to copy relocs into the output file. */
-+ s->reloc_count = 0;
-+ }
-+ }
-+ else if (s != htab->splt && s != htab->sgot && s != htab->sgotplt)
-+ {
-+ /* It's not one of our sections, so don't allocate space. */
-+ continue;
-+ }
++ {
++ if (s->size == 0)
++ {
++ /* If we don't need this section, strip it from the
++ output file. This is to handle .rela.bss and
++ .rela.plt. We must create it in
++ create_dynamic_sections, because it must be created
++ before the linker maps input sections to output
++ sections. The linker does that before
++ adjust_dynamic_symbol is called, and it is that
++ function which decides whether anything needs to go
++ into these sections. */
++ strip = TRUE;
++ }
++ else
++ {
++ /* We use the reloc_count field as a counter if we need
++ to copy relocs into the output file. */
++ s->reloc_count = 0;
++ }
++ }
++ else if (s != htab->elf.splt
++ && s != htab->elf.sgot
++ && s != htab->elf.sgotplt
++ && s != htab->elf.sdynbss
++ && s != htab->elf.sdynrelro)
++ {
++ /* It's not one of our sections, so don't allocate space. */
++ continue;
++ }
+
+ if (strip)
+ {
@@ -3485,7 +3526,7 @@
+
+ /* For non-PIC objects we need absolute address of the GOT entry. */
+ if (!bfd_link_pic (info))
-+ got_addr += htab->sgotplt->output_section->vma + sgotplt->output_offset;
++ got_addr += sgotplt->output_section->vma + sgotplt->output_offset;
+
+ /* Fill in the entry in the procedure linkage table. */
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff),
@@ -3537,8 +3578,8 @@
+ /* This symbol has an entry in the global offset table. Set it
+ up. */
+
-+ sgot = htab->sgot;
-+ srela = htab->srelgot;
++ sgot = htab->elf.sgot;
++ srela = htab->elf.srelgot;
+ BFD_ASSERT (sgot != NULL && srela != NULL);
+
+ offset = (sgot->output_section->vma + sgot->output_offset
@@ -3685,7 +3726,7 @@
+
+ /* Set the first entry in the global offset table to the address of
+ the dynamic section. */
-+ sgot = bfd_get_linker_section (dynobj, ".got.plt");
++ sgot = htab->elf.sgotplt;
+ if (sgot && sgot->size > 0)
+ {
+ if (sdyn == NULL)
@@ -3697,8 +3738,8 @@
+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
+ }
+
-+ if (htab->sgot && htab->sgot->size > 0)
-+ elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize = 4;
++ if (htab->elf.sgot && htab->elf.sgot->size > 0)
++ elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4;
+
+ return TRUE;
+}
@@ -3723,8 +3764,8 @@
+ put into .sbss. */
+ *secp = bfd_make_section_old_way (abfd, ".sbss");
+ if (*secp == NULL
-+ || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
-+ return FALSE;
++ || !bfd_set_section_flags (*secp, SEC_IS_COMMON))
++ return FALSE;
+
+ *valp = sym->st_size;
+ }
@@ -3750,10 +3791,11 @@
+#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name
+#define elf_backend_relocate_section microblaze_elf_relocate_section
+#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match
++#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data
+#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup
+
+#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook
++#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook
+#define elf_backend_check_relocs microblaze_elf_check_relocs
+#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol
+#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create
@@ -3773,7 +3815,7 @@
+
+#include "elf64-target.h"
diff --git a/bfd/targets.c b/bfd/targets.c
-index 0732c5e4292..1ec226b2f47 100644
+index 0732c5e429..1ec226b2f4 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -782,6 +782,8 @@ extern const bfd_target mep_elf32_le_vec;
@@ -3797,7 +3839,7 @@
&mips_ecoff_be_vec,
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 5810a74a5fc..ffbb843d33e 100644
+index 5810a74a5f..ffbb843d33 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -35,10 +35,13 @@
@@ -4192,7 +4234,7 @@
diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 01cb3e894f7..7435a70ef5e 100644
+index 01cb3e894f..7435a70ef5 100644
--- a/gas/config/tc-microblaze.h
+++ b/gas/config/tc-microblaze.h
@@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[];
@@ -4207,7 +4249,7 @@
#define ELF_TC_SPECIAL_SECTIONS \
{ ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \
diff --git a/include/elf/common.h b/include/elf/common.h
-index 4d94c4fd5b3..f709a01816c 100644
+index 4d94c4fd5b..f709a01816 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -340,6 +340,7 @@
@@ -4219,7 +4261,7 @@
#define EM_CSKY 252 /* C-SKY processor family. */
diff --git a/ld/Makefile.am b/ld/Makefile.am
-index 02c4fc16395..d063e2d32c5 100644
+index 02c4fc1639..d063e2d32c 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -416,6 +416,8 @@ ALL_64_EMULATION_SOURCES = \
@@ -4241,18 +4283,10 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
diff --git a/ld/Makefile.in b/ld/Makefile.in
-index 2fe12e14f63..01ebb051faa 100644
+index 2fe12e14f6..797212859f 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
-@@ -515,6 +515,7 @@ pdfdir = @pdfdir@
- prefix = @prefix@
- program_transform_name = @program_transform_name@
- psdir = @psdir@
-+runstatedir = @runstatedir@
- sbindir = @sbindir@
- sharedstatedir = @sharedstatedir@
- srcdir = @srcdir@
-@@ -898,6 +899,8 @@ ALL_64_EMULATION_SOURCES = \
+@@ -898,6 +898,8 @@ ALL_64_EMULATION_SOURCES = \
eelf32ltsmipn32.c \
eelf32ltsmipn32_fbsd.c \
eelf32mipswindiss.c \
@@ -4261,16 +4295,16 @@
eelf64_aix.c \
eelf64bpf.c \
eelf64_ia64.c \
-@@ -1360,6 +1363,8 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64lriscv_lp64f.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ltsmip_fbsd.Po@am__quote@
-+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
+@@ -1338,6 +1340,8 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32z80.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64mmix.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc.Po@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64ppc_fbsd.Po@am__quote@
-@@ -2493,6 +2498,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@
+@@ -2493,6 +2497,8 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32ltsmipn32_fbsd.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32mipswindiss.Pc@am__quote@
@@ -4280,7 +4314,7 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64bpf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Pc@am__quote@
diff --git a/ld/configure.tgt b/ld/configure.tgt
-index 87c7d9a4cad..801d27c9e3f 100644
+index 87c7d9a4ca..801d27c9e3 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -469,6 +469,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux"
@@ -4295,7 +4329,7 @@
;;
diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
new file mode 100644
-index 00000000000..7b4c7c411bd
+index 0000000000..9c7b0eb708
--- /dev/null
+++ b/ld/emulparams/elf64microblaze.sh
@@ -0,0 +1,23 @@
@@ -4320,11 +4354,11 @@
+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
-+TEMPLATE_NAME=elf
++TEMPLATE_NAME=elf32
+#GENERATE_SHLIB_SCRIPT=yes
diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
new file mode 100644
-index 00000000000..7b4c7c411bd
+index 0000000000..9c7b0eb708
--- /dev/null
+++ b/ld/emulparams/elf64microblazeel.sh
@@ -0,0 +1,23 @@
@@ -4349,10 +4383,10 @@
+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
-+TEMPLATE_NAME=elf
++TEMPLATE_NAME=elf32
+#GENERATE_SHLIB_SCRIPT=yes
diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 52c9068805f..a03f5b7a55b 100644
+index 315c6e9350..f643f2600d 100644
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
@@ -33,6 +33,7 @@
@@ -4363,7 +4397,7 @@
#define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW)
#define NUM_STRBUFS 3
-@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
+@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, long instr)
}
static char *
@@ -4371,12 +4405,11 @@
+get_field_imml (struct string_buf *buf, long instr)
{
char *p = strbuf (buf);
-
-- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
+ sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
+ return p;
+}
-+
+
+- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
+static char *
+get_field_imms (struct string_buf *buf, long instr)
+{
@@ -4386,7 +4419,7 @@
return p;
}
-@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
}
static char *
@@ -4404,53 +4437,46 @@
return p;
}
-@@ -308,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -308,9 +317,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
}
}
break;
- case INST_TYPE_RD_R1_IMM5:
+ case INST_TYPE_RD_R1_IMML:
++ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++ get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
++ /* TODO: Also print symbol */
++ case INST_TYPE_RD_R1_IMMS:
print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
- get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
-+ get_field_r1(&buf, inst), get_field_imm (&buf, inst));
-+ /* TODO: Also print symbol */
-+ break;
-+ case INST_TYPE_RD_R1_IMMS:
-+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1(&buf, inst), get_field_imms (&buf, inst));
break;
case INST_TYPE_RD_RFSL:
print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-@@ -414,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
- }
- }
- break;
-- case INST_TYPE_RD_R2:
-- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-- get_field_r2 (&buf, inst));
+@@ -417,6 +430,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ case INST_TYPE_RD_R2:
+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+ get_field_r2 (&buf, inst));
++ break;
+ case INST_TYPE_IMML:
+ print_func (stream, "\t%s", get_field_imml (&buf, inst));
+ /* TODO: Also print symbol */
-+ break;
-+ case INST_TYPE_RD_R2:
-+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
break;
case INST_TYPE_R2:
print_func (stream, "\t%s", get_field_r2 (&buf, inst));
-@@ -441,8 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -440,8 +457,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ case INST_TYPE_NONE:
break;
- /* For tuqula instruction */
/* For bit field insns. */
- case INST_TYPE_RD_R1_IMM5_IMM5:
-- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
+- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
+ case INST_TYPE_RD_R1_IMMW_IMMS:
-+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
-+ get_field_immw (&buf, inst), get_field_imms (&buf, inst));
- break;
++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+ break;
/* For tuqula instruction */
case INST_TYPE_RD:
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f61f4ef66d9..61eaa39b3eb 100644
+index f61f4ef66d..61eaa39b3e 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -40,7 +40,7 @@
@@ -4678,7 +4704,7 @@
#endif /* MICROBLAZE_OPC */
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index fa921c90c98..1dcd3dca3d1 100644
+index fa921c90c9..1dcd3dca3d 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -25,6 +25,7 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-MB-X-initial-commit.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-MB-X-initial-commit.patch
index 06a8f70..7b87f40 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-MB-X-initial-commit.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0015-MB-X-initial-commit.patch
@@ -1,22 +1,26 @@
-From 49a85544705ec3057f0a1f32807b7b986127cec1 Mon Sep 17 00:00:00 2001
+From 550150a8f97738902539ad774fbd0c977ab3a427 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 15/52] MB-X initial commit code cleanup is needed.
+Conflicts:
+ bfd/elf32-microblaze.c
+ gas/config/tc-microblaze.c
+ opcodes/microblaze-opcm.h
---
bfd/bfd-in2.h | 10 +++
- bfd/elf32-microblaze.c | 63 +++++++++++++++++-
- bfd/elf64-microblaze.c | 59 +++++++++++++++++
+ bfd/elf32-microblaze.c | 59 +++++++++++++-
+ bfd/elf64-microblaze.c | 61 ++++++++++++++-
bfd/libbfd.h | 2 +
- bfd/reloc.c | 12 ++++
- gas/config/tc-microblaze.c | 127 +++++++++++++++++++++++++++----------
+ bfd/reloc.c | 12 +++
+ gas/config/tc-microblaze.c | 154 ++++++++++++++++++++++++++++++-------
include/elf/microblaze.h | 2 +
opcodes/microblaze-opc.h | 4 +-
opcodes/microblaze-opcm.h | 4 +-
- 9 files changed, 243 insertions(+), 40 deletions(-)
+ 9 files changed, 275 insertions(+), 33 deletions(-)
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 3fdbf8ed755..c55092c9ec7 100644
+index 1bd19a2b63..a335182ba1 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5438,11 +5438,21 @@ value in two words (with an imm instruction). No relocation is
@@ -24,9 +28,9 @@
BFD_RELOC_MICROBLAZE_64_NONE,
+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imml instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_64,
++ * +value in two words (with an imml instruction). No relocation is
++ * +done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_64,
+
/* This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
@@ -42,7 +46,7 @@
value in two words (with an imm instruction). The relocation is
GOT offset */
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cf4a7fdba33..e1a66f57e79 100644
+index c22130fd8c..14bb6de052 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -104,6 +108,15 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
microblaze_reloc = R_MICROBLAZE_GOT_64;
break;
+@@ -1463,7 +1498,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+ {
+ relocation += addend;
+- if (r_type == R_MICROBLAZE_32)
++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ else
+ {
@@ -1929,6 +1964,28 @@ microblaze_elf_relax_section (bfd *abfd,
irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
}
@@ -111,7 +124,7 @@
+ case R_MICROBLAZE_IMML_64:
+ {
+ /* This was a PC-relative instruction that was
-+ completely resolved. */
++ completely resolved. */
+ int sfix, efix;
+ unsigned int val;
+ bfd_vma target_address;
@@ -133,21 +146,8 @@
case R_MICROBLAZE_NONE:
case R_MICROBLAZE_32_NONE:
{
-@@ -2034,9 +2091,9 @@ microblaze_elf_relax_section (bfd *abfd,
- microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
- irelscan->r_addend);
- }
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-- {
-- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+ {
-+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-
- /* Look at the reloc only if the value has been resolved. */
- if (isym->st_shndx == shndx
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index fa4b95e47e0..d55700fc513 100644
+index a357388115..6b1f47d00d 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
@@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -210,7 +210,7 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
microblaze_reloc = R_MICROBLAZE_GOT_64;
break;
-@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1172,6 +1208,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
break; /* Do nothing. */
case (int) R_MICROBLAZE_GOTPC_64:
@@ -218,14 +218,23 @@
relocation = htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset;
relocation -= (input_section->output_section->vma
-@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1443,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+ {
+ relocation += addend;
+- if (r_type == R_MICROBLAZE_32)
++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ else
+ {
+@@ -1889,6 +1926,28 @@ microblaze_elf_relax_section (bfd *abfd,
irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
}
break;
+ case R_MICROBLAZE_IMML_64:
+ {
+ /* This was a PC-relative instruction that was
-+ completely resolved. */
++ completely resolved. */
+ int sfix, efix;
+ unsigned int val;
+ bfd_vma target_address;
@@ -248,7 +257,7 @@
case R_MICROBLAZE_32_NONE:
{
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index c1551b92405..b4aace6a70d 100644
+index c1551b9240..b4aace6a70 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2969,7 +2969,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
@@ -262,7 +271,7 @@
"BFD_RELOC_MICROBLAZE_64_PLT",
"BFD_RELOC_MICROBLAZE_64_GOTOFF",
diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 9b39b419415..0e8a24e9cb0 100644
+index 9b39b41941..0e8a24e9cb 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6866,12 +6866,24 @@ ENUMDOC
@@ -291,7 +300,7 @@
This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index ffbb843d33e..b8250e4cded 100644
+index ffbb843d33..33eda2a4da 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -302,17 +311,18 @@
/* Initialize the relax table. */
const relax_typeS md_relax_table[] =
-@@ -116,7 +117,8 @@ const relax_typeS md_relax_table[] =
+@@ -116,7 +117,9 @@ const relax_typeS md_relax_table[] =
{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */
{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */
{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */
- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */
-+ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */
-+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */
++ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */
++// { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */
++ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */
};
static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */
-@@ -396,7 +398,8 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] =
{"data32", cons, 4}, /* Same as word. */
{"ent", s_func, 0}, /* Treat ent as function entry point. */
{"end", microblaze_s_func, 1}, /* Treat end as function end point. */
@@ -322,7 +332,7 @@
{"weakext", microblaze_s_weakext, 0},
{"rodata", microblaze_s_rdata, 0},
{"sdata2", microblaze_s_rdata, 1},
-@@ -405,6 +408,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] =
{"sbss", microblaze_s_bss, 1},
{"text", microblaze_s_text, 0},
{"word", cons, 4},
@@ -330,7 +340,7 @@
{"frame", s_ignore, 0},
{"mask", s_ignore, 0}, /* Emitted by gcc. */
{NULL, NULL, 0}
-@@ -898,7 +902,7 @@ check_got (int * got_type, int * got_len)
+@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len)
extern bfd_reloc_code_real_type
parse_cons_expression_microblaze (expressionS *exp, int size)
{
@@ -339,7 +349,7 @@
{
/* Handle @GOTOFF et.al. */
char *save, *gotfree_copy;
-@@ -930,6 +934,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
+@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size)
static const char * str_microblaze_ro_anchor = "RO";
static const char * str_microblaze_rw_anchor = "RW";
@@ -347,7 +357,41 @@
static bfd_boolean
check_spl_reg (unsigned * reg)
-@@ -1926,6 +1931,7 @@ md_assemble (char * str)
+@@ -1174,6 +1180,33 @@ md_assemble (char * str)
+ inst |= (immed << IMM_LOW) & IMM_MASK;
+ }
+ }
++#if 0 //revisit
++ else if (streq (name, "lli") || streq (name, "sli"))
++ {
++ temp = immed & 0xFFFFFFFFFFFF8000;
++ if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
++ {
++ /* Needs an immediate inst. */
++ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++ if (opcode1 == NULL)
++ {
++ as_bad (_("unknown opcode \"%s\""), "imml");
++ return;
++ }
++
++ inst1 = opcode1->bit_sequence;
++ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
++ output[0] = INST_BYTE0 (inst1);
++ output[1] = INST_BYTE1 (inst1);
++ output[2] = INST_BYTE2 (inst1);
++ output[3] = INST_BYTE3 (inst1);
++ output = frag_more (isize);
++ }
++ inst |= (reg1 << RD_LOW) & RD_MASK;
++ inst |= (reg2 << RA_LOW) & RA_MASK;
++ inst |= (immed << IMM_LOW) & IMM_MASK;
++ }
++#endif
+ else
+ {
+ temp = immed & 0xFFFF8000;
+@@ -1926,6 +1959,7 @@ md_assemble (char * str)
if (exp.X_op != O_constant)
{
char *opc = NULL;
@@ -355,7 +399,7 @@
relax_substateT subtype;
if (exp.X_md != 0)
-@@ -1939,7 +1945,7 @@ md_assemble (char * str)
+@@ -1939,7 +1973,7 @@ md_assemble (char * str)
subtype, /* PC-relative or not. */
exp.X_add_symbol,
exp.X_add_number,
@@ -364,7 +408,7 @@
immedl = 0L;
}
else
-@@ -1977,7 +1983,7 @@ md_assemble (char * str)
+@@ -1977,7 +2011,7 @@ md_assemble (char * str)
reg1 = 0;
}
if (strcmp (op_end, ""))
@@ -373,17 +417,17 @@
else
as_fatal (_("Error in statement syntax"));
-@@ -1987,7 +1993,8 @@ md_assemble (char * str)
+@@ -1987,7 +2021,8 @@ md_assemble (char * str)
if (exp.X_op != O_constant)
{
- char *opc = NULL;
+ //char *opc = NULL;
-+ char *opc = strdup(str_microblaze_64);
++ char *opc = str_microblaze_64;
relax_substateT subtype;
if (exp.X_md != 0)
-@@ -2001,14 +2008,13 @@ md_assemble (char * str)
+@@ -2001,14 +2036,13 @@ md_assemble (char * str)
subtype, /* PC-relative or not. */
exp.X_add_symbol,
exp.X_add_number,
@@ -399,7 +443,7 @@
opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
if (opcode1 == NULL)
{
-@@ -2184,13 +2190,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2184,13 +2218,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
@@ -424,7 +468,7 @@
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
-@@ -2412,22 +2428,38 @@ md_apply_fix (fixS * fixP,
+@@ -2412,22 +2456,38 @@ md_apply_fix (fixS * fixP,
case BFD_RELOC_64_PCREL:
case BFD_RELOC_64:
case BFD_RELOC_MICROBLAZE_64_TEXTREL:
@@ -475,7 +519,7 @@
buf[0] = INST_BYTE0 (inst1);
buf[1] = INST_BYTE1 (inst1);
buf[2] = INST_BYTE2 (inst1);
-@@ -2456,6 +2488,7 @@ md_apply_fix (fixS * fixP,
+@@ -2456,6 +2516,7 @@ md_apply_fix (fixS * fixP,
/* Fall through. */
case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -483,7 +527,7 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
case BFD_RELOC_MICROBLAZE_64_PLT:
case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2463,12 +2496,16 @@ md_apply_fix (fixS * fixP,
+@@ -2463,12 +2524,16 @@ md_apply_fix (fixS * fixP,
/* Add an imm instruction. First save the current instruction. */
for (i = 0; i < INST_WORD_SIZE; i++)
buf[i + INST_WORD_SIZE] = buf[i];
@@ -504,27 +548,22 @@
return;
}
-@@ -2490,7 +2527,7 @@ md_apply_fix (fixS * fixP,
- {
- /* This fixup has been resolved. Create a reloc in case the linker
+@@ -2492,6 +2557,8 @@ md_apply_fix (fixS * fixP,
moves code around due to relaxing. */
-- if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
-+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
+ if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
else if (fixP->fx_r_type == BFD_RELOC_32)
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-@@ -2535,12 +2572,30 @@ md_estimate_size_before_relax (fragS * fragP,
+ else
+@@ -2535,6 +2602,32 @@ md_estimate_size_before_relax (fragS * fragP,
as_bad (_("Absolute PC-relative value in relaxation code. Assembler error....."));
abort ();
}
-- else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
-- !S_IS_WEAK (fragP->fr_symbol))
+ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type
+ && !S_IS_WEAK (fragP->fr_symbol))
- {
-- fragP->fr_subtype = DEFINED_PC_OFFSET;
-- /* Don't know now whether we need an imm instruction. */
-- fragP->fr_var = INST_WORD_SIZE;
++ {
+ if (fragP->fr_opcode != NULL) {
+ if(streq (fragP->fr_opcode, str_microblaze_64))
+ {
@@ -546,10 +585,20 @@
+ /* Don't know now whether we need an imm instruction. */
+ fragP->fr_var = INST_WORD_SIZE;
+ }
++ }
++ #if 0
+ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+ !S_IS_WEAK (fragP->fr_symbol))
+ {
+@@ -2542,6 +2635,7 @@ md_estimate_size_before_relax (fragS * fragP,
+ /* Don't know now whether we need an imm instruction. */
+ fragP->fr_var = INST_WORD_SIZE;
}
++#endif
else if (S_IS_DEFINED (fragP->fr_symbol)
&& (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
-@@ -2644,6 +2699,7 @@ md_estimate_size_before_relax (fragS * fragP,
+ {
+@@ -2644,6 +2738,7 @@ md_estimate_size_before_relax (fragS * fragP,
case TLSLD_OFFSET:
case TLSTPREL_OFFSET:
case TLSDTPREL_OFFSET:
@@ -557,16 +606,16 @@
fragP->fr_var = INST_WORD_SIZE*2;
break;
case DEFINED_RO_SEGMENT:
-@@ -2697,7 +2753,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2697,7 +2792,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
else
{
/* The case where we are going to resolve things... */
- if (fixp->fx_r_type == BFD_RELOC_64_PCREL)
-+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
else
return fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2730,6 +2786,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2730,6 +2825,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
case BFD_RELOC_MICROBLAZE_32_RWSDA:
case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
case BFD_RELOC_MICROBLAZE_64_GOTPC:
@@ -575,7 +624,7 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
case BFD_RELOC_MICROBLAZE_64_PLT:
case BFD_RELOC_MICROBLAZE_64_GOTOFF:
-@@ -2872,7 +2930,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -2872,7 +2969,10 @@ cons_fix_new_microblaze (fragS * frag,
r = BFD_RELOC_32;
break;
case 8:
@@ -588,7 +637,7 @@
default:
as_bad (_("unsupported BFD relocation size %u"), size);
diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 55f34f72b0d..8576e55cb8a 100644
+index 3978a3dc01..938841b240 100644
--- a/include/elf/microblaze.h
+++ b/include/elf/microblaze.h
@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
@@ -597,11 +646,11 @@
RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */
+
END_RELOC_NUMBERS (R_MICROBLAZE_max)
- /* Global base address names. */
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 61eaa39b3eb..f2139a6839b 100644
+index 61eaa39b3e..f2139a6839 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -538,8 +538,8 @@ struct op_code_struct
@@ -616,7 +665,7 @@
{"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
{"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 1dcd3dca3d1..ad8b8ce345b 100644
+index 1dcd3dca3d..fcf259a362 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -40,8 +40,8 @@ enum microblaze_instr
@@ -626,7 +675,7 @@
- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
++ sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
fint, fsqrt,
tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
similarity index 92%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index 067d926..6a3e34c 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,16 +1,15 @@
-From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001
+From 5b9a1079eefbfbe23992f231ad69af488040e302 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
- rsubl
+Subject: [PATCH 16/52] [Patch,Microblaze] : negl instruction is overriding
+ rsubl,fixed it by changing the instruction order...
-fixed it by changing the instruction order...
---
opcodes/microblaze-opc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f2139a6839b..f9709412097 100644
+index f2139a6839..f970941209 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -275,9 +275,7 @@ struct op_code_struct
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Added-relocations-for-MB-X.patch
similarity index 70%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Added-relocations-for-MB-X.patch
index 0ed01b7..3e0773b 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Added-relocations-for-MB-X.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Added-relocations-for-MB-X.patch
@@ -1,45 +1,45 @@
-From 90d732c25cb6b55b33837e1d23d6850e4cbe10f7 Mon Sep 17 00:00:00 2001
+From 442430f1010a9e16821e68ca2842579538ff564b Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/40] Added relocations for MB-X
+Subject: [PATCH 17/52] Added relocations for MB-X
+Conflicts:
+ bfd/bfd-in2.h
+ gas/config/tc-microblaze.c
---
- bfd/bfd-in2.h | 11 +++++---
- bfd/libbfd.h | 4 +--
- bfd/reloc.c | 26 +++++++++---------
- gas/config/tc-microblaze.c | 54 +++++++++++++++++++++++++++-----------
- 4 files changed, 63 insertions(+), 32 deletions(-)
+ bfd/bfd-in2.h | 9 +++-
+ bfd/libbfd.h | 4 +-
+ bfd/reloc.c | 26 ++++++-----
+ gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
+ 4 files changed, 61 insertions(+), 68 deletions(-)
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index c55092c9ec7..88f89bcdbcd 100644
+index a335182ba1..57ea4f6132 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
-@@ -5434,15 +5434,20 @@ done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_32_NONE,
-
+@@ -5436,13 +5436,18 @@ done here - only used for relaxing */
/* This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). No relocation is
-+value in two words (with an imml instruction). No relocation is
+ value in two words (with an imm instruction). No relocation is
done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64_NONE,
+ BFD_RELOC_MICROBLAZE_64_PCREL,
-/* This is a 64 bit reloc that stores the 32 bit pc relative
+/* This is a 64 bit reloc that stores the 32 bit relative
- value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64,
+ * +value in two words (with an imml instruction). No relocation is
+ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64,
+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_64_NONE,
++ * +value in two words (with an imm instruction). No relocation is
++ * +done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_64_NONE,
+
/* This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
PC-relative GOT offset */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index b4aace6a70d..b4b7ee29a30 100644
+index b4aace6a70..b4b7ee29a3 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2969,14 +2969,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
@@ -60,7 +60,7 @@
"BFD_RELOC_MICROBLAZE_64_TLSGD",
"BFD_RELOC_MICROBLAZE_64_TLSLD",
diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 0e8a24e9cb0..b5c97da3ffd 100644
+index 0e8a24e9cb..b5c97da3ff 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6866,24 +6866,12 @@ ENUMDOC
@@ -110,7 +110,7 @@
BFD_RELOC_AARCH64_RELOC_START
ENUMDOC
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b8250e4cded..9c8b6284fb1 100644
+index 33eda2a4da..5e11a77e70 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
@@ -121,28 +121,62 @@
/* Initialize the relax table. */
const relax_typeS md_relax_table[] =
-@@ -118,7 +119,8 @@ const relax_typeS md_relax_table[] =
- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */
+@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] =
{ 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */
- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */
-- { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */
+ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */
+ // { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */
+- { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */
+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */
-+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */
++ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */
};
static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */
-@@ -1930,8 +1932,8 @@ md_assemble (char * str)
+@@ -1180,33 +1182,6 @@ md_assemble (char * str)
+ inst |= (immed << IMM_LOW) & IMM_MASK;
+ }
+ }
+-#if 0 //revisit
+- else if (streq (name, "lli") || streq (name, "sli"))
+- {
+- temp = immed & 0xFFFFFFFFFFFF8000;
+- if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000))
+- {
+- /* Needs an immediate inst. */
+- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
+- if (opcode1 == NULL)
+- {
+- as_bad (_("unknown opcode \"%s\""), "imml");
+- return;
+- }
+-
+- inst1 = opcode1->bit_sequence;
+- inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
+- output[0] = INST_BYTE0 (inst1);
+- output[1] = INST_BYTE1 (inst1);
+- output[2] = INST_BYTE2 (inst1);
+- output[3] = INST_BYTE3 (inst1);
+- output = frag_more (isize);
+- }
+- inst |= (reg1 << RD_LOW) & RD_MASK;
+- inst |= (reg2 << RA_LOW) & RA_MASK;
+- inst |= (immed << IMM_LOW) & IMM_MASK;
+- }
+-#endif
+ else
+ {
+ temp = immed & 0xFFFF8000;
+@@ -1958,8 +1933,8 @@ md_assemble (char * str)
if (exp.X_op != O_constant)
{
- char *opc = NULL;
- //char *opc = str_microblaze_64;
+ //char *opc = NULL;
-+ char *opc = strdup(str_microblaze_64);
++ char *opc = str_microblaze_64;
relax_substateT subtype;
if (exp.X_md != 0)
-@@ -2190,13 +2192,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2218,13 +2193,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
@@ -164,7 +198,7 @@
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
-@@ -2206,7 +2214,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -2234,7 +2215,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC);
else
fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
@@ -173,7 +207,7 @@
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
-@@ -2425,14 +2433,17 @@ md_apply_fix (fixS * fixP,
+@@ -2453,14 +2434,17 @@ md_apply_fix (fixS * fixP,
}
}
break;
@@ -192,7 +226,7 @@
{
/* Generate the imm instruction. */
opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-@@ -2445,6 +2456,10 @@ md_apply_fix (fixS * fixP,
+@@ -2473,6 +2457,10 @@ md_apply_fix (fixS * fixP,
inst1 = opcode1->bit_sequence;
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
@@ -203,7 +237,7 @@
}
else
{
-@@ -2455,7 +2470,7 @@ md_apply_fix (fixS * fixP,
+@@ -2483,7 +2471,7 @@ md_apply_fix (fixS * fixP,
as_bad (_("unknown opcode \"%s\""), "imm");
return;
}
@@ -212,7 +246,7 @@
inst1 = opcode1->bit_sequence;
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
-@@ -2502,7 +2517,7 @@ md_apply_fix (fixS * fixP,
+@@ -2530,7 +2518,7 @@ md_apply_fix (fixS * fixP,
opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
if (opcode1 == NULL)
{
@@ -221,16 +255,16 @@
as_bad (_("unknown opcode \"%s\""), "imml");
else
as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -2527,7 +2542,7 @@ md_apply_fix (fixS * fixP,
- {
- /* This fixup has been resolved. Create a reloc in case the linker
+@@ -2557,8 +2545,6 @@ md_apply_fix (fixS * fixP,
moves code around due to relaxing. */
-- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+ if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
+ if (fixP->fx_r_type == BFD_RELOC_64_PCREL)
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
+- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
+- fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
else if (fixP->fx_r_type == BFD_RELOC_32)
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
-@@ -2579,21 +2594,21 @@ md_estimate_size_before_relax (fragS * fragP,
+ else
+@@ -2609,33 +2595,24 @@ md_estimate_size_before_relax (fragS * fragP,
if(streq (fragP->fr_opcode, str_microblaze_64))
{
/* Used as an absolute value. */
@@ -256,7 +290,19 @@
fragP->fr_var = INST_WORD_SIZE;
}
}
-@@ -2626,6 +2641,13 @@ md_estimate_size_before_relax (fragS * fragP,
+- #if 0
+- else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type &&
+- !S_IS_WEAK (fragP->fr_symbol))
+- {
+- fragP->fr_subtype = DEFINED_PC_OFFSET;
+- /* Don't know now whether we need an imm instruction. */
+- fragP->fr_var = INST_WORD_SIZE;
+- }
+-#endif
+ else if (S_IS_DEFINED (fragP->fr_symbol)
+ && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0))
+ {
+@@ -2665,6 +2642,13 @@ md_estimate_size_before_relax (fragS * fragP,
/* Variable part does not change. */
fragP->fr_var = INST_WORD_SIZE*2;
}
@@ -270,7 +316,7 @@
else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor))
{
/* It is accessed using the small data read only anchor. */
-@@ -2700,6 +2722,7 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2739,6 +2723,7 @@ md_estimate_size_before_relax (fragS * fragP,
case TLSTPREL_OFFSET:
case TLSDTPREL_OFFSET:
case DEFINED_64_OFFSET:
@@ -278,16 +324,16 @@
fragP->fr_var = INST_WORD_SIZE*2;
break;
case DEFINED_RO_SEGMENT:
-@@ -2753,7 +2776,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
+@@ -2792,7 +2777,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED)
else
{
/* The case where we are going to resolve things... */
-- if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
-+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL || fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
+- if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64)
++ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE;
else
return fixp->fx_where + fixp->fx_frag->fr_address;
-@@ -2788,6 +2811,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2827,6 +2812,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
case BFD_RELOC_MICROBLAZE_64_GOTPC:
case BFD_RELOC_MICROBLAZE_64_GPC:
case BFD_RELOC_MICROBLAZE_64:
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixed-MB-x-relocation-issues.patch
similarity index 73%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixed-MB-x-relocation-issues.patch
index a621fb0..315d044 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Update-MB-x.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0018-Fixed-MB-x-relocation-issues.patch
@@ -1,29 +1,28 @@
-From c3e194e231529c1b642f7f1a19a2a7b1ea644bd9 Mon Sep 17 00:00:00 2001
+From 5b1793fe6dfb16755f584821023145bdfc4b55d7 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/40] Update MB-x
+Subject: [PATCH 18/52] -Fixed MB-x relocation issues -Added imml for required
+ MB-x instructions
--Fixed MB-x relocation issues
--Added imml for required MB-x instructions
---
- bfd/elf64-microblaze.c | 68 ++++++++++--
- gas/config/tc-microblaze.c | 221 +++++++++++++++++++++++++------------
+ bfd/elf64-microblaze.c | 68 ++++++++++++++---
+ gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++----------
gas/tc.h | 2 +-
- 3 files changed, 209 insertions(+), 82 deletions(-)
+ 3 files changed, 167 insertions(+), 55 deletions(-)
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index d55700fc513..f8f52870639 100644
+index 6b1f47d00d..6676d9f93d 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
-@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1488,8 +1488,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ offset + INST_WORD_SIZE);
- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+ if (insn == 0xb2000000 || insn == 0xb2ffffff)
++ if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ {
-+ insn &= ~0x00ffffff;
++ insn &= ~0x00ffffff;
+ insn |= (relocation >> 16) & 0xffffff;
+ bfd_put_32 (input_bfd, insn,
contents + offset + endian);
@@ -34,7 +33,7 @@
bfd_put_16 (input_bfd, relocation & 0xffff,
contents + offset + endian + INST_WORD_SIZE);
}
-@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1580,11 +1589,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
@@ -44,7 +43,7 @@
- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
+ {
+ if (!input_section->output_section->vma &&
-+ !input_section->output_offset && !offset)
++ !input_section->output_offset && !offset)
+ relocation -= (input_section->output_section->vma
+ + input_section->output_offset
+ + offset);
@@ -54,9 +53,9 @@
+ + offset + INST_WORD_SIZE);
+ }
+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+ if (insn == 0xb2000000 || insn == 0xb2ffffff)
++ if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ {
-+ insn &= ~0x00ffffff;
++ insn &= ~0x00ffffff;
+ insn |= (relocation >> 16) & 0xffffff;
+ bfd_put_32 (input_bfd, insn,
contents + offset + endian);
@@ -67,7 +66,7 @@
bfd_put_16 (input_bfd, relocation & 0xffff,
contents + offset + endian + INST_WORD_SIZE);
}
-@@ -1677,9 +1703,19 @@ static void
+@@ -1703,9 +1729,19 @@ static void
microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
{
unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -90,7 +89,7 @@
}
/* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1717,10 +1753,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
unsigned long instr_lo;
instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -114,10 +113,10 @@
instr_lo &= ~0x0000ffff;
instr_lo |= (val & 0x0000ffff);
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 9c8b6284fb1..f61fdf3b90a 100644
+index 5e11a77e70..48f306ef41 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -391,7 +391,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
Integer arg to pass to the function. */
/* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
and then in the read.c table. */
@@ -126,7 +125,7 @@
{
{"lcomm", microblaze_s_lcomm, 1},
{"data", microblaze_s_data, 0},
-@@ -400,7 +400,7 @@ const pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] =
{"data32", cons, 4}, /* Same as word. */
{"ent", s_func, 0}, /* Treat ent as function entry point. */
{"end", microblaze_s_func, 1}, /* Treat end as function end point. */
@@ -135,84 +134,7 @@
{"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */
{"weakext", microblaze_s_weakext, 0},
{"rodata", microblaze_s_rdata, 0},
-@@ -538,30 +538,6 @@ parse_reg (char * s, unsigned * reg)
- *reg = REG_SP;
- return s + 3;
- }
-- else if (strncasecmp (s, "rfsl", 4) == 0)
-- {
-- if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
-- {
-- tmpreg = (s[4] - '0') * 10 + s[5] - '0';
-- s += 6;
-- }
-- else if (ISDIGIT (s[4]))
-- {
-- tmpreg = s[4] - '0';
-- s += 5;
-- }
-- else
-- as_bad (_("register expected, but saw '%.6s'"), s);
--
-- if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
-- *reg = tmpreg;
-- else
-- {
-- as_bad (_("Invalid register number at '%.6s'"), s);
-- *reg = 0;
-- }
-- return s;
-- }
- /* Stack protection registers. */
- else if (strncasecmp (s, "rshr", 4) == 0)
- {
-@@ -605,6 +581,45 @@ parse_reg (char * s, unsigned * reg)
- return s;
- }
-
-+/* Same as above, but with long(er) register */
-+static char *
-+parse_regl (char * s, unsigned long * reg)
-+{
-+ unsigned long tmpreg = 0;
-+
-+ /* Strip leading whitespace. */
-+ while (ISSPACE (* s))
-+ ++ s;
-+
-+ if (strncasecmp (s, "rfsl", 4) == 0)
-+ {
-+ if (ISDIGIT (s[4]) && ISDIGIT (s[5]))
-+ {
-+ tmpreg = (s[4] - '0') * 10 + s[5] - '0';
-+ s += 6;
-+ }
-+ else if (ISDIGIT (s[4]))
-+ {
-+ tmpreg = s[4] - '0';
-+ s += 5;
-+ }
-+ else
-+ as_bad (_("register expected, but saw '%.6s'"), s);
-+
-+ if ((int) tmpreg >= MIN_REGNUM && tmpreg <= MAX_REGNUM)
-+ *reg = tmpreg;
-+ else
-+ {
-+ as_bad (_("Invalid register number at '%.6s'"), s);
-+ *reg = 0;
-+ }
-+ return s;
-+ }
-+ as_bad (_("register expected, but saw '%.6s'"), s);
-+ *reg = 0;
-+ return s;
-+}
-+
- static char *
- parse_exp (char *s, expressionS *e)
- {
-@@ -995,7 +1010,7 @@ md_assemble (char * str)
+@@ -996,7 +996,7 @@ md_assemble (char * str)
unsigned reg2;
unsigned reg3;
unsigned isize;
@@ -221,7 +143,7 @@
expressionS exp;
char name[20];
long immedl;
-@@ -1117,8 +1132,9 @@ md_assemble (char * str)
+@@ -1118,8 +1118,9 @@ md_assemble (char * str)
as_fatal (_("lmi pseudo instruction should not use a label in imm field"));
else if (streq (name, "smi"))
as_fatal (_("smi pseudo instruction should not use a label in imm field"));
@@ -233,7 +155,7 @@
opc = str_microblaze_ro_anchor;
else if (reg2 == REG_RWSDP)
opc = str_microblaze_rw_anchor;
-@@ -1181,31 +1197,55 @@ md_assemble (char * str)
+@@ -1182,31 +1183,55 @@ md_assemble (char * str)
inst |= (immed << IMM_LOW) & IMM_MASK;
}
}
@@ -275,7 +197,7 @@
+ inst |= (reg2 << RA_LOW) & RA_MASK;
+ inst |= (immed << IMM_LOW) & IMM_MASK;
+ }
-+ else
++ else
+ {
+ temp = immed & 0xFFFF8000;
+ if ((temp != 0) && (temp != 0xFFFF8000))
@@ -303,34 +225,7 @@
break;
case INST_TYPE_RD_R1_IMMS:
-@@ -1400,7 +1440,7 @@ md_assemble (char * str)
- reg1 = 0;
- }
- if (strcmp (op_end, ""))
-- op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
-+ op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */
- else
- {
- as_fatal (_("Error in statement syntax"));
-@@ -1454,7 +1494,7 @@ md_assemble (char * str)
- reg1 = 0;
- }
- if (strcmp (op_end, ""))
-- op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
-+ op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */
- else
- {
- as_fatal (_("Error in statement syntax"));
-@@ -1472,7 +1512,7 @@ md_assemble (char * str)
-
- case INST_TYPE_RFSL:
- if (strcmp (op_end, ""))
-- op_end = parse_reg (op_end + 1, &immed); /* Get rfslN. */
-+ op_end = parse_regl (op_end + 1, &immed); /* Get rfslN. */
- else
- {
- as_fatal (_("Error in statement syntax"));
-@@ -1831,12 +1871,20 @@ md_assemble (char * str)
+@@ -1832,12 +1857,20 @@ md_assemble (char * str)
case INST_TYPE_IMM:
if (streq (name, "imm"))
as_fatal (_("An IMM instruction should not be present in the .s file"));
@@ -345,21 +240,21 @@
{
- char *opc = NULL;
+ char *opc;
-+ if (microblaze_arch_size == 64 && (streq (name, "breai") ||
-+ streq (name, "breaid") ||
++ if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++ streq (name, "breaid") ||
+ streq (name, "brai") || streq (name, "braid")))
-+ opc = strdup(str_microblaze_64);
++ opc = str_microblaze_64;
+ else
+ opc = NULL;
relax_substateT subtype;
if (exp.X_md != 0)
-@@ -1859,27 +1907,54 @@ md_assemble (char * str)
+@@ -1860,27 +1893,54 @@ md_assemble (char * str)
immed = exp.X_add_number;
}
-+ if (microblaze_arch_size == 64 && (streq (name, "breai") ||
-+ streq (name, "breaid") ||
++ if (microblaze_arch_size == 64 && (streq (name, "breai") ||
++ streq (name, "breaid") ||
+ streq (name, "brai") || streq (name, "braid")))
+ {
+ temp = immed & 0xFFFFFF8000;
@@ -427,7 +322,7 @@
break;
case INST_TYPE_NONE:
-@@ -2455,7 +2530,7 @@ md_apply_fix (fixS * fixP,
+@@ -2456,7 +2516,7 @@ md_apply_fix (fixS * fixP,
inst1 = opcode1->bit_sequence;
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -436,13 +331,13 @@
if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64)
fixP->fx_r_type = BFD_RELOC_64;
if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-@@ -2623,7 +2698,14 @@ md_estimate_size_before_relax (fragS * fragP,
+@@ -2624,7 +2684,14 @@ md_estimate_size_before_relax (fragS * fragP,
}
else
{
- fragP->fr_subtype = UNDEFINED_PC_OFFSET;
+ if (fragP->fr_opcode != NULL) {
-+ if (streq (fragP->fr_opcode, str_microblaze_64))
++ if (streq (fragP->fr_opcode, str_microblaze_64))
+ fragP->fr_subtype = DEFINED_64_PC_OFFSET;
+ else
+ fragP->fr_subtype = UNDEFINED_PC_OFFSET;
@@ -452,7 +347,7 @@
fragP->fr_var = INST_WORD_SIZE*2;
}
break;
-@@ -2900,6 +2982,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -2901,6 +2968,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
case OPTION_M64:
//if (arg != NULL && strcmp (arg, "64") == 0)
microblaze_arch_size = 64;
@@ -461,7 +356,7 @@
default:
return 0;
diff --git a/gas/tc.h b/gas/tc.h
-index da1738d67a8..5bdfe5c3475 100644
+index da1738d67a..5bdfe5c347 100644
--- a/gas/tc.h
+++ b/gas/tc.h
@@ -22,7 +22,7 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch
new file mode 100644
index 0000000..027b8e8
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0019-Fixing-the-branch-related-issues.patch
@@ -0,0 +1,28 @@
+From 33081da0bb8820f3c695d8f865582436b16002bf Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Sun, 30 Sep 2018 17:06:58 +0530
+Subject: [PATCH 19/52] Fixing the branch related issues
+
+Conflicts:
+ bfd/elf64-microblaze.c
+---
+ bfd/elf64-microblaze.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 6676d9f93d..d7b7d9f5e7 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -2545,6 +2545,9 @@ microblaze_elf_check_relocs (bfd * abfd,
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
++ /* PR15323, ref flags aren't set for references in the same
++ object. */
++ h->root.non_ir_ref_regular = 1;
+ }
+
+ switch (r_type)
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-address-computation-issues-with-64bit-address.patch
similarity index 84%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-address-computation-issues-with-64bit-address.patch
index ad2fd5f..d9de811 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Various-fixes.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0020-Fixed-address-computation-issues-with-64bit-address.patch
@@ -1,10 +1,12 @@
-From 1594b2f497822ebdb923b4ae55e81a10bfd4817d Mon Sep 17 00:00:00 2001
+From 22b1b41a7873fa117642cad6b150f465eb9b60cb Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 20/40] Various fixes
+Subject: [PATCH 20/52] - Fixed address computation issues with 64bit address -
+ Fixed imml dissassamble issue
-- Fixed address computation issues with 64bit address
-- Fixed imml dissassamble issue
+Conflicts:
+ gas/config/tc-microblaze.c
+ opcodes/microblaze-dis.c
---
bfd/bfd-in2.h | 5 +++
bfd/elf64-microblaze.c | 14 ++++----
@@ -13,23 +15,23 @@
4 files changed, 79 insertions(+), 16 deletions(-)
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 88f89bcdbcd..8902d9c7939 100644
+index 57ea4f6132..05fbeb9b3a 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
-@@ -5443,6 +5443,11 @@ value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64,
+@@ -5443,6 +5443,11 @@ done here - only used for relaxing */
+ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64,
+/* This is a 64 bit reloc that stores the 32 bit relative
-+value in two words (with an imml instruction). No relocation is
-+done here - only used for relaxing */
++ * +value in two words (with an imml instruction). No relocation is
++ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_EA64,
+
/* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction). No relocation is
- done here - only used for relaxing */
+ * +value in two words (with an imm instruction). No relocation is
+ * +done here - only used for relaxing */
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index f8f52870639..17e58748a0b 100644
+index d7b7d9f5e7..f42d7f429b 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
@@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
@@ -72,7 +74,7 @@
microblaze_reloc = R_MICROBLAZE_IMML_64;
break;
case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1982,7 +1982,7 @@ microblaze_elf_relax_section (bfd *abfd,
efix = calc_fixup (target_address, 0, sec);
/* Validate the in-band val. */
@@ -82,10 +84,10 @@
fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
}
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index f61fdf3b90a..0dfb59ffe8b 100644
+index 48f306ef41..bfb3104720 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -401,7 +401,6 @@ pseudo_typeS md_pseudo_table[] =
+@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] =
{"ent", s_func, 0}, /* Treat ent as function entry point. */
{"end", microblaze_s_func, 1}, /* Treat end as function end point. */
{"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */
@@ -93,7 +95,7 @@
{"weakext", microblaze_s_weakext, 0},
{"rodata", microblaze_s_rdata, 0},
{"sdata2", microblaze_s_rdata, 1},
-@@ -2489,18 +2488,74 @@ md_apply_fix (fixS * fixP,
+@@ -2475,18 +2474,74 @@ md_apply_fix (fixS * fixP,
case BFD_RELOC_RVA:
case BFD_RELOC_32_PCREL:
case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
@@ -143,7 +145,7 @@
+ }
+ }
+ break;
-+
++
+ case BFD_RELOC_MICROBLAZE_EA64:
/* Don't do anything if the symbol is not defined. */
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
@@ -172,16 +174,16 @@
buf[3] |= ((val >> 24) & 0xff);
buf[2] |= ((val >> 16) & 0xff);
buf[1] |= ((val >> 8) & 0xff);
-@@ -2621,6 +2676,8 @@ md_apply_fix (fixS * fixP,
+@@ -2607,6 +2662,8 @@ md_apply_fix (fixS * fixP,
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE;
else if (fixP->fx_r_type == BFD_RELOC_32)
fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE;
+ else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64)
-+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
++ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64;
else
fixP->fx_r_type = BFD_RELOC_NONE;
fixP->fx_addsy = section_symbol (absolute_section);
-@@ -2892,6 +2949,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
+@@ -2878,6 +2935,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:
case BFD_RELOC_MICROBLAZE_64_GOTPC:
case BFD_RELOC_MICROBLAZE_64_GPC:
@@ -189,7 +191,7 @@
case BFD_RELOC_MICROBLAZE_64:
case BFD_RELOC_MICROBLAZE_64_PCREL:
case BFD_RELOC_MICROBLAZE_64_GOT:
-@@ -3037,10 +3095,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3023,10 +3081,10 @@ cons_fix_new_microblaze (fragS * frag,
r = BFD_RELOC_32;
break;
case 8:
@@ -204,13 +206,13 @@
default:
as_bad (_("unsupported BFD relocation size %u"), size);
diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index a03f5b7a55b..fc8e79b19cf 100644
+index f643f2600d..1dc11a2653 100644
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
-@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
+@@ -77,7 +77,7 @@ static char *
+ get_field_imml (struct string_buf *buf, long instr)
{
char *p = strbuf (buf);
-
- sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
+ sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
return p;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index 99f285f..908f757 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,7 +1,7 @@
-From b33fdfda4af069859ebe6588a5b9774cb5a2f14d Mon Sep 17 00:00:00 2001
+From 9880b06269a176c0b5c4f0ecb9e3784f630a76be Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/52] Adding new relocation to support 64bit rodata
---
bfd/elf64-microblaze.c | 11 +++++++--
@@ -9,10 +9,10 @@
2 files changed, 54 insertions(+), 6 deletions(-)
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 17e58748a0b..b62c47e8514 100644
+index f42d7f429b..ddcb5baf74 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
-@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1473,6 +1473,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
case (int) R_MICROBLAZE_64_PCREL :
case (int) R_MICROBLAZE_64:
case (int) R_MICROBLAZE_32:
@@ -20,16 +20,16 @@
{
/* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
from removed linkonce sections, or sections discarded by
-@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,6 +1483,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
relocation += addend;
- if (r_type == R_MICROBLAZE_32)
+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
bfd_put_32 (input_bfd, relocation, contents + offset);
+ else if (r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_64 (input_bfd, relocation, contents + offset);
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1560,7 +1563,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
}
else
{
@@ -38,7 +38,7 @@
{
outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
outrel.r_addend = relocation + addend;
-@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1586,6 +1589,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
relocation += addend;
if (r_type == R_MICROBLAZE_32)
bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -47,7 +47,7 @@
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2098,7 +2103,8 @@ microblaze_elf_relax_section (bfd *abfd,
microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
irelscan->r_addend);
}
@@ -57,7 +57,7 @@
{
isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2606,6 +2612,7 @@ microblaze_elf_check_relocs (bfd * abfd,
case R_MICROBLAZE_64:
case R_MICROBLAZE_64_PCREL:
case R_MICROBLAZE_32:
@@ -66,10 +66,10 @@
if (h != NULL && !bfd_link_pic (info))
{
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 0dfb59ffe8b..4bd71557ca2 100644
+index bfb3104720..532a26eaa5 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -1133,6 +1133,13 @@ md_assemble (char * str)
+@@ -1119,6 +1119,13 @@ md_assemble (char * str)
as_fatal (_("smi pseudo instruction should not use a label in imm field"));
if(streq (name, "lli") || streq (name, "sli"))
opc = str_microblaze_64;
@@ -83,7 +83,7 @@
else if (reg2 == REG_ROSDP)
opc = str_microblaze_ro_anchor;
else if (reg2 == REG_RWSDP)
-@@ -1196,7 +1203,10 @@ md_assemble (char * str)
+@@ -1182,7 +1189,10 @@ md_assemble (char * str)
inst |= (immed << IMM_LOW) & IMM_MASK;
}
}
@@ -95,19 +95,19 @@
{
temp = immed & 0xFFFFFF8000;
if (temp != 0 && temp != 0xFFFFFF8000)
-@@ -1808,6 +1818,11 @@ md_assemble (char * str)
+@@ -1794,6 +1804,11 @@ md_assemble (char * str)
if (exp.X_md != 0)
subtype = get_imm_otype(exp.X_md);
+ else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
+ {
-+ opc = strdup(str_microblaze_64);
++ opc = str_microblaze_64;
+ subtype = opcode->inst_offset_type;
+ }
else
subtype = opcode->inst_offset_type;
-@@ -1825,6 +1840,31 @@ md_assemble (char * str)
+@@ -1811,6 +1826,31 @@ md_assemble (char * str)
output = frag_more (isize);
immed = exp.X_add_number;
}
@@ -139,7 +139,7 @@
temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
-@@ -1848,6 +1888,7 @@ md_assemble (char * str)
+@@ -1834,6 +1874,7 @@ md_assemble (char * str)
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (immed << IMM_LOW) & IMM_MASK;
@@ -147,7 +147,7 @@
break;
case INST_TYPE_R2:
-@@ -3095,10 +3136,10 @@ cons_fix_new_microblaze (fragS * frag,
+@@ -3081,10 +3122,10 @@ cons_fix_new_microblaze (fragS * frag,
r = BFD_RELOC_32;
break;
case 8:
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
index 48b89d6..6c144b8 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 118e1717ef8421bc86bcf56c9186f065bd607efd Mon Sep 17 00:00:00 2001
+From e7b6ab1b28fc3ca13ed25687d5e851795ed6e1a3 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 22/40] fixing the .bss relocation issue
+Subject: [PATCH 22/52] fixing the .bss relocation issue
---
bfd/elf64-microblaze.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b62c47e8514..cb3b40b574c 100644
+index ddcb5baf74..861420789b 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
-@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1492,7 +1492,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ input_section->output_offset
+ offset + INST_WORD_SIZE);
unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ if ((insn & 0xff000000) == 0xb2000000)
{
- insn &= ~0x00ffffff;
+ insn &= ~0x00ffffff;
insn |= (relocation >> 16) & 0xffffff;
-@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1606,7 +1606,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ offset + INST_WORD_SIZE);
}
unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ if ((insn & 0xff000000) == 0xb2000000)
{
- insn &= ~0x00ffffff;
+ insn &= ~0x00ffffff;
insn |= (relocation >> 16) & 0xffffff;
-@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1735,7 +1735,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
{
unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -38,7 +38,7 @@
{
instr &= ~0x00ffffff;
instr |= (val & 0xffffff);
-@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1758,7 +1758,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
unsigned long instr_lo;
instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@
{
instr_hi &= ~0x00ffffff;
instr_hi |= (val >> 16) & 0xffffff;
-@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2251,7 +2251,10 @@ microblaze_elf_relax_section (bfd *abfd,
unsigned long instr_lo = bfd_get_32 (abfd, ocontents
+ irelscan->r_offset
+ INST_WORD_SIZE);
@@ -59,7 +59,7 @@
immediate |= (instr_lo & 0x0000ffff);
offset = calc_fixup (irelscan->r_addend, 0, sec);
immediate -= offset;
-@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2295,7 +2298,10 @@ microblaze_elf_relax_section (bfd *abfd,
unsigned long instr_lo = bfd_get_32 (abfd, ocontents
+ irelscan->r_offset
+ INST_WORD_SIZE);
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index c84767f..98f05ac 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From 04d4e164cec91078b1b1155bae6ae4b508758969 Mon Sep 17 00:00:00 2001
+From 9b9f53c95e5b1fbccd4de2dd579c6cfae34c191d Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/52] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
It was adjusting only lower 16bits.
---
@@ -10,7 +10,7 @@
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index e1a66f57e79..bf09c68afd9 100644
+index 14bb6de052..d77710b1f3 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -2019,8 +2019,8 @@ microblaze_elf_relax_section (bfd *abfd,
@@ -25,10 +25,10 @@
break;
}
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index cb3b40b574c..b002b414d64 100644
+index 861420789b..338f16eeee 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
-@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2030,8 +2030,8 @@ microblaze_elf_relax_section (bfd *abfd,
sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
efix = calc_fixup (target_address, 0, sec);
irel->r_addend -= (efix - sfix);
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
index 9a8e799..25d0d7e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0024-Revert-ld-Remove-unused-expression-state.patch
@@ -1,7 +1,7 @@
-From 7d26e7f32769e1a324a8dfd3bc3eaa2a5fbfe62a Mon Sep 17 00:00:00 2001
+From 70fcc4fe0635bdc871bc2ec1087173e3f93cab86 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 27 Feb 2019 15:12:32 +0530
-Subject: [PATCH 24/40] Revert "ld: Remove unused expression state"
+Subject: [PATCH 24/52] Revert "ld: Remove unused expression state"
This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb.
@@ -13,7 +13,7 @@
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/ld/ldexp.c b/ld/ldexp.c
-index b4e7c41209d..dd3b058110a 100644
+index b4e7c41209..dd3b058110 100644
--- a/ld/ldexp.c
+++ b/ld/ldexp.c
@@ -1360,6 +1360,7 @@ static etree_type *
@@ -60,7 +60,7 @@
/* Handle ASSERT. */
diff --git a/ld/ldexp.h b/ld/ldexp.h
-index 717e839bd41..852ac6c5889 100644
+index 717e839bd4..852ac6c588 100644
--- a/ld/ldexp.h
+++ b/ld/ldexp.h
@@ -66,6 +66,7 @@ typedef union etree_union {
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
deleted file mode 100644
index 97d7565..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 8293b0cf15d4411402a2b0b50e4c532093c5d952 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
- build error for windows builds.commenting for now.
-
----
- bfd/elf-attrs.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index 070104c2734..8331c8759d5 100644
---- a/bfd/elf-attrs.c
-+++ b/bfd/elf-attrs.c
-@@ -442,6 +442,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
- if (hdr->sh_size == 0)
- return;
-
-+ #if 0
- filesize = bfd_get_file_size (abfd);
- if (filesize != 0 && hdr->sh_size > filesize)
- {
-@@ -451,6 +452,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
- bfd_set_error (bfd_error_invalid_operation);
- return;
- }
-+ #endif
-
- contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
- if (!contents)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
similarity index 84%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
index ebd1fa4..9d1b179 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From 987bd08638fab099dcfdce412448734182be51e6 Mon Sep 17 00:00:00 2001
+From 49fdaa5a4f0ed7e20b82ccb8d0db53075777abe9 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 25/52] fixing the long & long long mingw toolchain issue
---
gas/config/tc-microblaze.c | 10 +++++-----
@@ -9,10 +9,10 @@
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 4bd71557ca2..83e17c60fa0 100644
+index 532a26eaa5..b00b759893 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -797,7 +797,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
+@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max)
}
static char *
@@ -21,7 +21,7 @@
{
char *new_pointer;
char *atp;
-@@ -848,11 +848,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
+@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max)
; /* An error message has already been emitted. */
else if ((e->X_op != O_constant && e->X_op != O_symbol) )
as_fatal (_("operand must be a constant or a label"));
@@ -38,7 +38,7 @@
if (atp)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f9709412097..77d74c17f3a 100644
+index f970941209..77d74c17f3 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-Added-support-to-new-arithmetic-single-register-inst.patch
similarity index 89%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-Added-support-to-new-arithmetic-single-register-inst.patch
index 12f44a6..6379a5c 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0026-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,21 +1,23 @@
-From dde3395588ca91a7c484cc4a003f72f80848c534 Mon Sep 17 00:00:00 2001
+From b29e6a15c9f65837dbb560aa6c41c49e591915e9 Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 27/40] Added support to new arithmetic single register
+Subject: [PATCH 26/52] Added support to new arithmetic single register
instructions
+Conflicts:
+ opcodes/microblaze-dis.c
---
- gas/config/tc-microblaze.c | 145 ++++++++++++++++++++++++++++++++++++-
+ gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
opcodes/microblaze-dis.c | 13 +++-
- opcodes/microblaze-opc.h | 45 +++++++++++-
+ opcodes/microblaze-opc.h | 43 ++++++++++-
opcodes/microblaze-opcm.h | 5 +-
4 files changed, 201 insertions(+), 7 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 83e17c60fa0..b4330652758 100644
+index b00b759893..eca060b262 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -422,12 +422,33 @@ void
+@@ -423,12 +423,33 @@ void
md_begin (void)
{
struct op_code_struct * opcode;
@@ -26,7 +28,7 @@
/* Insert unique names into hash table. */
- for (opcode = opcodes; opcode->name; opcode ++)
- hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
-+ for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
++ for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
+ {
+ if (strcmp (prev_name, opcode->name))
+ {
@@ -51,7 +53,7 @@
}
/* Try to parse a reg name. */
-@@ -1000,6 +1021,7 @@ md_assemble (char * str)
+@@ -986,6 +1007,7 @@ md_assemble (char * str)
{
char * op_start;
char * op_end;
@@ -59,15 +61,19 @@
struct op_code_struct * opcode, *opcode1;
char * output = NULL;
int nlen = 0;
-@@ -1013,6 +1035,7 @@ md_assemble (char * str)
- expressionS exp;
+@@ -996,9 +1018,10 @@ md_assemble (char * str)
+ unsigned reg3;
+ unsigned isize;
+ unsigned long immed, immed2, temp;
+- expressionS exp;
++ expressionS exp,exp1;
char name[20];
long immedl;
+ int reg=0;
/* Drop leading whitespace. */
while (ISSPACE (* str))
-@@ -1043,7 +1066,78 @@ md_assemble (char * str)
+@@ -1029,7 +1052,78 @@ md_assemble (char * str)
as_bad (_("unknown opcode \"%s\""), name);
return;
}
@@ -147,7 +153,7 @@
inst = opcode->bit_sequence;
isize = 4;
-@@ -1494,6 +1588,51 @@ md_assemble (char * str)
+@@ -1480,6 +1574,51 @@ md_assemble (char * str)
inst |= (immed << IMM_LOW) & IMM15_MASK;
break;
@@ -200,14 +206,13 @@
if (strcmp (op_end, ""))
op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index fc8e79b19cf..f5db1189240 100644
+index 1dc11a2653..90d2328659 100644
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
-@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+@@ -130,9 +130,17 @@ get_field_imm15 (struct string_buf *buf, long instr)
return p;
}
-+static char *
+get_field_imm16 (struct string_buf *buf, long instr)
+{
+ char *p = strbuf (buf);
@@ -218,27 +223,23 @@
+
static char *
get_field_special (struct string_buf *buf, long instr,
- struct op_code_struct *op)
-@@ -450,6 +459,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
- get_field_imm15 (&buf, inst));
- break;
-+ case INST_TYPE_RD_IMML:
-+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
-+ break;
- /* For mbar insn. */
- case INST_TYPE_IMM5:
- print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
-@@ -457,7 +469,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+- struct op_code_struct *op)
++ struct op_code_struct *op)
+ {
+ char *p = strbuf (buf);
+ char *spr;
+@@ -456,6 +464,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
/* For mbar 16 or sleep insn. */
case INST_TYPE_NONE:
break;
-- /* For tuqula instruction */
++ case INST_TYPE_RD_IMML:
++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++ break;
/* For bit field insns. */
case INST_TYPE_RD_R1_IMMW_IMMS:
- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 77d74c17f3a..bd1cc90bff6 100644
+index 77d74c17f3..c1b453c95e 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -69,6 +69,7 @@
@@ -291,7 +292,7 @@
/* New Mask for msrset, msrclr insns. */
#define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */
/* Mask for mbar insn. */
-@@ -114,13 +143,13 @@
+@@ -114,7 +143,7 @@
#define DELAY_SLOT 1
#define NO_DELAY_SLOT 0
@@ -300,13 +301,6 @@
struct op_code_struct
{
- const char * name;
- short inst_type; /* Registers and immediate values involved. */
-- short inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */
-+ int inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */
- short delay_slots; /* Info about delay slots needed after this instr. */
- short immval_mask;
- unsigned long bit_sequence; /* All the fixed bits for the op are set and
@@ -444,13 +473,21 @@ struct op_code_struct
{"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
{"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -344,7 +338,7 @@
{"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
{"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index ad8b8ce345b..86cdb3b0715 100644
+index fcf259a362..eca247c63b 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -61,7 +61,9 @@ enum microblaze_instr
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
similarity index 93%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
index a8d5a38..e3826d6 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -1,19 +1,19 @@
-From 623f4e7ea6c18bec0e141c7471c7bd609bd9a6d7 Mon Sep 17 00:00:00 2001
+From 653712c23456574468c426aebbeb5ee8dae7237e Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
+Subject: [PATCH 27/52] [Patch,MicroBlaze] : double imml generation for 64 bit
values.
---
- gas/config/tc-microblaze.c | 324 ++++++++++++++++++++++++++++++-------
+ gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++-------
opcodes/microblaze-opc.h | 4 +-
- 2 files changed, 264 insertions(+), 64 deletions(-)
+ 2 files changed, 263 insertions(+), 63 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index b4330652758..f5cc1e05f7e 100644
+index eca060b262..aef54ad83f 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -1022,7 +1022,7 @@ md_assemble (char * str)
+@@ -1008,7 +1008,7 @@ md_assemble (char * str)
char * op_start;
char * op_end;
char * temp_op_end;
@@ -22,21 +22,20 @@
char * output = NULL;
int nlen = 0;
int i;
-@@ -1206,7 +1206,12 @@ md_assemble (char * str)
+@@ -1192,7 +1192,12 @@ md_assemble (char * str)
reg2 = 0;
}
if (strcmp (op_end, ""))
-- op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
+ {
-+ if (microblaze_arch_size == 64)
-+ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
-+ else
-+ op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
++ if(microblaze_arch_size == 64)
++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML);
++ else
+ op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM);
+ }
else
as_fatal (_("Error in statement syntax"));
-@@ -1302,24 +1307,51 @@ md_assemble (char * str)
+@@ -1288,24 +1293,51 @@ md_assemble (char * str)
|| streq (name, "lwi") || streq (name, "sbi")
|| streq (name, "shi") || streq (name, "swi"))))
{
@@ -52,10 +51,34 @@
+ {
+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
+ if (opcode1 == NULL)
++ {
++ as_bad (_("unknown opcode \"%s\""), "imml");
++ return;
++ }
++ inst1 = opcode1->bit_sequence;
++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
++ output[0] = INST_BYTE0 (inst1);
++ output[1] = INST_BYTE1 (inst1);
++ output[2] = INST_BYTE2 (inst1);
++ output[3] = INST_BYTE3 (inst1);
++ output = frag_more (isize);
++ }
++ else
++ {
++ opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
++ if (opcode1 == NULL || opcode2 == NULL)
{
as_bad (_("unknown opcode \"%s\""), "imml");
return;
}
++ inst1 = opcode2->bit_sequence;
++ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
++ output[0] = INST_BYTE0 (inst1);
++ output[1] = INST_BYTE1 (inst1);
++ output[2] = INST_BYTE2 (inst1);
++ output[3] = INST_BYTE3 (inst1);
++ output = frag_more (isize);
inst1 = opcode1->bit_sequence;
- inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
+ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
@@ -65,35 +88,11 @@
output[3] = INST_BYTE3 (inst1);
output = frag_more (isize);
}
-+ else
-+ {
-+ opcode2 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml");
-+ if (opcode1 == NULL || opcode2 == NULL)
-+ {
-+ as_bad (_("unknown opcode \"%s\""), "imml");
-+ return;
-+ }
-+ inst1 = opcode2->bit_sequence;
-+ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK;
-+ output[0] = INST_BYTE0 (inst1);
-+ output[1] = INST_BYTE1 (inst1);
-+ output[2] = INST_BYTE2 (inst1);
-+ output[3] = INST_BYTE3 (inst1);
-+ output = frag_more (isize);
-+ inst1 = opcode1->bit_sequence;
-+ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK;
-+ output[0] = INST_BYTE0 (inst1);
-+ output[1] = INST_BYTE1 (inst1);
-+ output[2] = INST_BYTE2 (inst1);
-+ output[3] = INST_BYTE3 (inst1);
-+ output = frag_more (isize);
-+ }
+ }
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (reg2 << RA_LOW) & RA_MASK;
inst |= (immed << IMM_LOW) & IMM_MASK;
-@@ -1330,14 +1362,13 @@ md_assemble (char * str)
+@@ -1316,14 +1348,13 @@ md_assemble (char * str)
if ((temp != 0) && (temp != 0xFFFF8000))
{
/* Needs an immediate inst. */
@@ -110,7 +109,7 @@
inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK;
output[0] = INST_BYTE0 (inst1);
output[1] = INST_BYTE1 (inst1);
-@@ -1578,7 +1609,7 @@ md_assemble (char * str)
+@@ -1564,7 +1595,7 @@ md_assemble (char * str)
as_fatal (_("Cannot use special register with this instruction"));
if (exp.X_op != O_constant)
@@ -119,7 +118,7 @@
else
{
output = frag_more (isize);
-@@ -1912,8 +1943,9 @@ md_assemble (char * str)
+@@ -1898,8 +1929,9 @@ md_assemble (char * str)
temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
@@ -130,7 +129,7 @@
if (opcode1 == NULL)
{
as_bad (_("unknown opcode \"%s\""), "imm");
-@@ -1942,7 +1974,12 @@ md_assemble (char * str)
+@@ -1928,7 +1960,12 @@ md_assemble (char * str)
reg1 = 0;
}
if (strcmp (op_end, ""))
@@ -143,7 +142,7 @@
else
as_fatal (_("Error in statement syntax"));
-@@ -1981,30 +2018,55 @@ md_assemble (char * str)
+@@ -1967,30 +2004,55 @@ md_assemble (char * str)
}
if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
{
@@ -204,8 +203,8 @@
temp = immed & 0xFFFF8000;
if ((temp != 0) && (temp != 0xFFFF8000))
{
-@@ -2090,25 +2152,50 @@ md_assemble (char * str)
- streq (name, "breaid") ||
+@@ -2076,25 +2138,50 @@ md_assemble (char * str)
+ streq (name, "breaid") ||
streq (name, "brai") || streq (name, "braid")))
{
- temp = immed & 0xFFFFFF8000;
@@ -259,7 +258,7 @@
inst |= (immed << IMM_LOW) & IMM_MASK;
}
else
-@@ -2208,21 +2295,45 @@ md_assemble (char * str)
+@@ -2194,21 +2281,45 @@ md_assemble (char * str)
{
output = frag_more (isize);
immedl = exp.X_add_number;
@@ -320,7 +319,7 @@
}
inst |= (reg1 << RD_LOW) & RD_MASK;
-@@ -2271,21 +2382,46 @@ md_assemble (char * str)
+@@ -2257,21 +2368,46 @@ md_assemble (char * str)
{
output = frag_more (isize);
immedl = exp.X_add_number;
@@ -375,7 +374,7 @@
inst |= (reg1 << RA_LOW) & RA_MASK;
inst |= (immedl << IMM_LOW) & IMM_MASK;
-@@ -2565,8 +2701,8 @@ md_apply_fix (fixS * fixP,
+@@ -2551,8 +2687,8 @@ md_apply_fix (fixS * fixP,
/* Note: use offsetT because it is signed, valueT is unsigned. */
offsetT val = (offsetT) * valp;
int i;
@@ -386,7 +385,7 @@
symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>");
-@@ -2749,30 +2885,75 @@ md_apply_fix (fixS * fixP,
+@@ -2735,30 +2871,75 @@ md_apply_fix (fixS * fixP,
case BFD_RELOC_MICROBLAZE_64_TEXTREL:
case BFD_RELOC_MICROBLAZE_64:
case BFD_RELOC_MICROBLAZE_64_PCREL:
@@ -472,7 +471,7 @@
/* Generate the imm instruction. */
opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm");
if (opcode1 == NULL)
-@@ -2784,12 +2965,11 @@ md_apply_fix (fixS * fixP,
+@@ -2770,12 +2951,11 @@ md_apply_fix (fixS * fixP,
inst1 = opcode1->bit_sequence;
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK;
@@ -486,7 +485,7 @@
/* Add the value only if the symbol is defined. */
if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
{
-@@ -2821,21 +3001,41 @@ md_apply_fix (fixS * fixP,
+@@ -2807,21 +2987,41 @@ md_apply_fix (fixS * fixP,
/* Add an imm instruction. First save the current instruction. */
for (i = 0; i < INST_WORD_SIZE; i++)
buf[i + INST_WORD_SIZE] = buf[i];
@@ -533,7 +532,7 @@
within the same section only. */
buf[0] = INST_BYTE0 (inst1);
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index bd1cc90bff6..cf5b5920921 100644
+index c1b453c95e..ba0b3f8b62 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
@@ -542,7 +541,7 @@
-#define MIN_IMML ((long long) 0xffffff8000000000L)
-#define MAX_IMML ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML ((long long) -9223372036854775807)
++#define MIN_IMML ((long long) -9223372036854775808)
+#define MAX_IMML ((long long) 9223372036854775807)
#endif /* MICROBLAZE_OPC */
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
similarity index 91%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
index 3720f2d..e8c5510 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0028-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch
@@ -1,7 +1,7 @@
-From b7b5caa314177cfe8aeb0fb6d748f6e52fe51a83 Mon Sep 17 00:00:00 2001
+From 2c051a6d5326e34cb4a3170073cda17e7269055d Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Wed, 22 Jan 2020 16:31:12 +0530
-Subject: [PATCH 29/40] Fixed bug in generation of IMML instruction for the new
+Subject: [PATCH 28/52] Fixed bug in generation of IMML instruction for the new
MB-64 instructions with single register.
---
@@ -9,10 +9,10 @@
1 file changed, 47 insertions(+), 3 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index f5cc1e05f7e..efd1a42769e 100644
+index aef54ad83f..647cfb6869 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -1653,12 +1653,56 @@ md_assemble (char * str)
+@@ -1639,12 +1639,56 @@ md_assemble (char * str)
exp.X_add_symbol,
exp.X_add_number,
(char *) opc);
@@ -70,8 +70,8 @@
}
inst |= (reg1 << RD_LOW) & RD_MASK;
inst |= (immed << IMM_LOW) & IMM16_MASK;
-@@ -2152,8 +2196,8 @@ md_assemble (char * str)
- streq (name, "breaid") ||
+@@ -2138,8 +2182,8 @@ md_assemble (char * str)
+ streq (name, "breaid") ||
streq (name, "brai") || streq (name, "braid")))
{
- temp = immed & 0xFFFFFFFFFFFF8000;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
new file mode 100644
index 0000000..abfcdab
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0029-Patch-MicroBlaze-m64-This-patch-will-remove-imml-0-a.patch
@@ -0,0 +1,38 @@
+From 77751e719ba1470f3dc869ae309485adb02819b6 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 16 Apr 2020 18:08:58 +0530
+Subject: [PATCH 29/52] [Patch,MicroBlaze m64] : This patch will remove imml 0
+ and imml -1 instructions when the offset is less than 16 bit for Type A
+ branch EA instructions.
+
+---
+ gas/config/tc-microblaze.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
+index 647cfb6869..e565b2a99d 100644
+--- a/gas/config/tc-microblaze.c
++++ b/gas/config/tc-microblaze.c
+@@ -2150,9 +2150,7 @@ md_assemble (char * str)
+ if (exp.X_op != O_constant)
+ {
+ char *opc;
+- if (microblaze_arch_size == 64 && (streq (name, "breai") ||
+- streq (name, "breaid") ||
+- streq (name, "brai") || streq (name, "braid")))
++ if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
+ opc = str_microblaze_64;
+ else
+ opc = NULL;
+@@ -2916,7 +2914,7 @@ md_apply_fix (fixS * fixP,
+ case BFD_RELOC_MICROBLAZE_64:
+ case BFD_RELOC_MICROBLAZE_64_PCREL:
+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
+- || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
++ || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
+ {
+ /* Generate the imm instruction. */
+ if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
new file mode 100644
index 0000000..b8f8b8b
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-improper-address-mapping-of-PROVIDE.patch
@@ -0,0 +1,39 @@
+From 2a43e06f14cac633d87f5b213a6bacd16085967f Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 17 Jun 2020 21:20:26 +0530
+Subject: [PATCH 30/52] [Patch,MicroBlaze] : improper address mapping of
+ PROVIDE directive symbols[DTOR_END] are causing runtime loops and we don't
+ need to override PROVIDE symbols if symbols are defined in libraries and
+ linker so I am disabling override for PROVIDE symbols.
+
+---
+ ld/ldlang.c | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+diff --git a/ld/ldlang.c b/ld/ldlang.c
+index 9977195074..a2c44cf719 100644
+--- a/ld/ldlang.c
++++ b/ld/ldlang.c
+@@ -3657,10 +3657,16 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
+ plugin_insert = NULL;
+ #endif
+ break;
++ /* This is from a --defsym on the command line. */
+ case lang_assignment_statement_enum:
+- if (s->assignment_statement.exp->type.node_class != etree_assert)
+- exp_fold_tree_no_dot (s->assignment_statement.exp);
+- break;
++ if (s->assignment_statement.exp->type.node_class != etree_assert)
++ {
++ if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
++ ;
++ else
++ exp_fold_tree_no_dot (s->assignment_statement.exp);
++ }
++ break;
+ default:
+ break;
+ }
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
deleted file mode 100644
index 8cd3563..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0030-Patch-MicroBlaze-m64-Update-imml-instructions-for-Ty.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 0afa4ba2af8d63cb70771f1c7e235af920603533 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Thu, 16 Apr 2020 18:08:58 +0530
-Subject: [PATCH 30/40] [Patch,MicroBlaze m64]: Update imml instructions for
- Type A branch EA
-
-This patch will remove imml 0 and imml -1 instructions when the offset is less than 16 bit for Type A branch EA instructions.
----
- gas/config/tc-microblaze.c | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index efd1a42769e..1d838abfefa 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -2164,13 +2164,13 @@ md_assemble (char * str)
- if (exp.X_op != O_constant)
- {
- char *opc;
-- if (microblaze_arch_size == 64 && (streq (name, "breai") ||
-- streq (name, "breaid") ||
-- streq (name, "brai") || streq (name, "braid")))
-- opc = strdup(str_microblaze_64);
-+ /* removal of imml 0 and imml -1 for bea type A insns.
-+ if offset is 16 bit then imml instructions are redundant */
-+ if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid")))
-+ opc = strdup(str_microblaze_64);
- else
-- opc = NULL;
-- relax_substateT subtype;
-+ opc = NULL;
-+ relax_substateT subtype;
-
- if (exp.X_md != 0)
- subtype = get_imm_otype(exp.X_md);
-@@ -2930,7 +2930,7 @@ md_apply_fix (fixS * fixP,
- case BFD_RELOC_MICROBLAZE_64:
- case BFD_RELOC_MICROBLAZE_64_PCREL:
- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64
-- || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL)
-+ || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64))
- {
- /* Generate the imm instruction. */
- if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch
similarity index 85%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch
index 0e813f9..83b293f 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-gas-revert-moving-of-md_pseudo_table-from-const.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-gas-revert-moving-of-md_pseudo_table-from-const.patch
@@ -1,7 +1,7 @@
-From 4d0c68ffb688c23f984de8c0a22af824c3902d83 Mon Sep 17 00:00:00 2001
+From c45a69deeb210ebdb80cf055cef9e62bd0bda053 Mon Sep 17 00:00:00 2001
From: Mark Hatle <mark.hatle@kernel.crashing.org>
Date: Thu, 16 Jul 2020 12:38:11 -0500
-Subject: [PATCH 32/40] gas: revert moving of md_pseudo_table from const
+Subject: [PATCH 31/52] gas: revert moving of md_pseudo_table from const
The base system expect md_pseudo_table to be constant, Changing the
definition will break other architectures when compiled with a
@@ -18,10 +18,10 @@
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 1d838abfefa..da99d4ef482 100644
+index e565b2a99d..c6ca913f8b 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -384,6 +384,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -385,6 +385,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
demand_empty_rest_of_line ();
}
@@ -39,7 +39,7 @@
/* This table describes all the machine specific pseudo-ops the assembler
has to support. The fields are:
Pseudo-op name without dot
-@@ -391,7 +402,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
+@@ -392,7 +403,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED)
Integer arg to pass to the function. */
/* If the pseudo-op is not found in this table, it searches in the obj-elf.c,
and then in the read.c table. */
@@ -48,7 +48,7 @@
{
{"lcomm", microblaze_s_lcomm, 1},
{"data", microblaze_s_data, 0},
-@@ -400,7 +411,7 @@ pseudo_typeS md_pseudo_table[] =
+@@ -401,7 +412,7 @@ pseudo_typeS md_pseudo_table[] =
{"data32", cons, 4}, /* Same as word. */
{"ent", s_func, 0}, /* Treat ent as function entry point. */
{"end", microblaze_s_func, 1}, /* Treat end as function end point. */
@@ -57,7 +57,7 @@
{"weakext", microblaze_s_weakext, 0},
{"rodata", microblaze_s_rdata, 0},
{"sdata2", microblaze_s_rdata, 1},
-@@ -3464,7 +3475,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
+@@ -3448,7 +3459,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
case OPTION_M64:
//if (arg != NULL && strcmp (arg, "64") == 0)
microblaze_arch_size = 64;
@@ -66,7 +66,7 @@
default:
return 0;
diff --git a/gas/tc.h b/gas/tc.h
-index 5bdfe5c3475..da1738d67a8 100644
+index 5bdfe5c347..da1738d67a 100644
--- a/gas/tc.h
+++ b/gas/tc.h
@@ -22,7 +22,7 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
deleted file mode 100644
index fda23a1..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0031-ldlang.c-Workaround-for-improper-address-mapping-cau.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 23f0f6e8281b5cd481ef7636739c07b446828f7e Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 17 Jun 2020 21:20:26 +0530
-Subject: [PATCH 31/40] ldlang.c: Workaround for improper address mapping
- causing runtime loops
-
-[Patch,MicroBlaze] : improper address mapping of PROVIDE directive
-symbols[DTOR_END] are causing runtime loops and we don't need to override
-PROVIDE symbols if symbols are defined in libraries and linker so I am
-disabling override for PROVIDE symbols.
----
- ld/ldlang.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/ld/ldlang.c b/ld/ldlang.c
-index 9977195074a..9e2c1da066e 100644
---- a/ld/ldlang.c
-+++ b/ld/ldlang.c
-@@ -3657,9 +3657,15 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode)
- plugin_insert = NULL;
- #endif
- break;
-+ /* This is from a --defsym on the command line. */
- case lang_assignment_statement_enum:
- if (s->assignment_statement.exp->type.node_class != etree_assert)
-- exp_fold_tree_no_dot (s->assignment_statement.exp);
-+ {
-+ if(!(s->assignment_statement.exp->assign.defsym) && (s->assignment_statement.exp->type.node_class == etree_provide))
-+ ;
-+ else
-+ exp_fold_tree_no_dot (s->assignment_statement.exp);
-+ }
- break;
- default:
- break;
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
new file mode 100644
index 0000000..8891a77
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
@@ -0,0 +1,43 @@
+From 7b285c827edbc34cf79d4ed0f46cdfd4916b687c Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Mon, 30 Nov 2020 16:17:36 -0800
+Subject: [PATCH 32/52] ld/emulparams/elf64microblaze: Fix emulation generation
+
+Compilation fails when building ld-new with:
+
+ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation'
+ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation'
+
+The error appears to be that the elf64 files were referencing the elf32 emulation.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ ld/emulparams/elf64microblaze.sh | 2 +-
+ ld/emulparams/elf64microblazeel.sh | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh
+index 9c7b0eb708..7b4c7c411b 100644
+--- a/ld/emulparams/elf64microblaze.sh
++++ b/ld/emulparams/elf64microblaze.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
+diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh
+index 9c7b0eb708..7b4c7c411b 100644
+--- a/ld/emulparams/elf64microblazeel.sh
++++ b/ld/emulparams/elf64microblazeel.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
similarity index 75%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
index 00e5410..b296e1b 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
@@ -1,7 +1,7 @@
-From c466a54f6ac8fae44f3e79e33bb782086dc08a2b Mon Sep 17 00:00:00 2001
+From 3f506a7c6a8f7b746102276f3c41a7b11bd7ac3c Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 34/40] Add initial port of linux gdbserver add
+Subject: [PATCH 33/52] Add initial port of linux gdbserver add
gdb_proc_service_h to gdbserver microblaze-linux
gdbserver needs to initialise the microblaze registers
@@ -20,22 +20,18 @@
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
---
- gdb/configure.host | 3 +
- gdb/features/microblaze-linux.xml | 12 ++
- gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
- gdb/microblaze-linux-tdep.c | 29 +++-
- gdb/microblaze-tdep.c | 35 ++++-
- gdb/microblaze-tdep.h | 4 +-
- gdb/regformats/reg-microblaze.dat | 41 ++++++
- gdbserver/Makefile.in | 4 +
- gdbserver/configure.srv | 8 ++
- 9 files changed, 322 insertions(+), 3 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
- create mode 100644 gdb/gdbserver/linux-microblaze-low.c
+ gdb/configure.host | 3 +
+ gdb/microblaze-linux-tdep.c | 29 ++++-
+ gdb/microblaze-tdep.c | 35 +++++-
+ gdb/microblaze-tdep.h | 4 +-
+ gdb/regformats/reg-microblaze.dat | 41 +++++++
+ gdbserver/linux-microblaze-low.c | 189 ++++++++++++++++++++++++++++++
+ 6 files changed, 298 insertions(+), 3 deletions(-)
create mode 100644 gdb/regformats/reg-microblaze.dat
+ create mode 100644 gdbserver/linux-microblaze-low.c
diff --git a/gdb/configure.host b/gdb/configure.host
-index ce528237291..cf1a08e8b28 100644
+index ce52823729..cf1a08e8b2 100644
--- a/gdb/configure.host
+++ b/gdb/configure.host
@@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;;
@@ -55,29 +51,195 @@
powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
gdb_host=aix ;;
powerpc*-*-freebsd*) gdb_host=fbsd ;;
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
-new file mode 100644
-index 00000000000..8983e66eb3d
---- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index be710bedb6..fb8241884b 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -37,6 +37,22 @@
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
+
++static int microblaze_debug_flag = 0;
+
-+ Copying and distribution of this file, with or without modification,
-+ are permitted in any medium without royalty provided the copyright
-+ notice and this notice are preserved. -->
++static void
++microblaze_debug (const char *fmt, ...)
++{
++ if (microblaze_debug_flag)
++ {
++ va_list args;
+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+ <osabi>GNU/Linux</osabi>
-+ <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
++ va_start (args, fmt);
++ printf_unfiltered ("MICROBLAZE LINUX: ");
++ vprintf_unfiltered (fmt, args);
++ va_end (args);
++ }
++}
++
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ int val;
+ int bplen;
+ gdb_byte old_contents[BREAKPOINT_MAX];
++ struct cleanup *cleanup;
+
+ /* Determine appropriate breakpoint contents and size for this address. */
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+
++ /* Make sure we see the memory breakpoints. */
++ cleanup = make_show_memory_breakpoints_cleanup (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
+ program modified the code on us, so it is wrong to put back the
+ old value. */
+ if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
+- val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++ {
++ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
++ }
+
++ do_cleanups (cleanup);
+ return val;
+ }
+
+@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ /* Trampolines. */
+ tramp_frame_prepend_unwinder (gdbarch,
+ µblaze_linux_sighandler_tramp_frame);
++
++ /* Enable TLS support. */
++ set_gdbarch_fetch_tls_load_module_address (gdbarch,
++ svr4_fetch_objfile_link_map);
+ }
+
+ void _initialize_microblaze_linux_tdep ();
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index 5c80413304..443adfb364 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+-
++static int
++microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
++ struct bp_target_info *bp_tgt)
++{
++ CORE_ADDR addr = bp_tgt->placed_address;
++ const unsigned char *bp;
++ int val;
++ int bplen;
++ gdb_byte old_contents[BREAKPOINT_MAX];
++ struct cleanup *cleanup;
++
++ /* Determine appropriate breakpoint contents and size for this address. */
++ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
++ if (bp == NULL)
++ error (_("Software breakpoints not implemented for this target."));
++
++ /* Make sure we see the memory breakpoints. */
++ cleanup = make_show_memory_breakpoints_cleanup (1);
++ val = target_read_memory (addr, old_contents, bplen);
++
++ /* If our breakpoint is no longer at the address, this means that the
++ program modified the code on us, so it is wrong to put back the
++ old value. */
++ if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
++ {
++ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
++ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
++ }
++
++ do_cleanups (cleanup);
++ return val;
++}
+
+ /* Allocate and initialize a frame cache. */
+
+@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ microblaze_breakpoint::kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch,
+ microblaze_breakpoint::bp_from_kind);
++ set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint);
+
+ set_gdbarch_frame_args_skip (gdbarch, 8);
+
+@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
+ NULL,
+ &setdebuglist, &showdebuglist);
+
++
+ }
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index 4fbdf9933f..db0772643d 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -117,6 +117,8 @@ struct microblaze_frame_cache
+
+ /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
+ Only used for native debugging. */
+-#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
++#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
++#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
++
+
+ #endif /* microblaze-tdep.h */
+diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
new file mode 100644
-index 00000000000..cba5d6fc585
+index 0000000000..bd8a438442
--- /dev/null
-+++ b/gdb/gdbserver/linux-microblaze-low.c
++++ b/gdb/regformats/reg-microblaze.dat
+@@ -0,0 +1,41 @@
++name:microblaze
++expedite:r1,pc
++32:r0
++32:r1
++32:r2
++32:r3
++32:r4
++32:r5
++32:r6
++32:r7
++32:r8
++32:r9
++32:r10
++32:r11
++32:r12
++32:r13
++32:r14
++32:r15
++32:r16
++32:r17
++32:r18
++32:r19
++32:r20
++32:r21
++32:r22
++32:r23
++32:r24
++32:r25
++32:r26
++32:r27
++32:r28
++32:r29
++32:r30
++32:r31
++32:pc
++32:msr
++32:ear
++32:esr
++32:fsr
++32:slr
++32:shr
+diff --git a/gdbserver/linux-microblaze-low.c b/gdbserver/linux-microblaze-low.c
+new file mode 100644
+index 0000000000..cba5d6fc58
+--- /dev/null
++++ b/gdbserver/linux-microblaze-low.c
@@ -0,0 +1,189 @@
+/* GNU/Linux/Microblaze specific low level interface, for the remote server for
+ GDB.
@@ -268,233 +430,6 @@
+ microblaze_collect_ptrace_register,
+ microblaze_supply_ptrace_register,
+};
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index be710bedb64..d15b24d619e 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -37,6 +37,22 @@
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-
-+static int microblaze_debug_flag = 0;
-+
-+static void
-+microblaze_debug (const char *fmt, ...)
-+{
-+ if (microblaze_debug_flag)
-+ {
-+ va_list args;
-+
-+ va_start (args, fmt);
-+ printf_unfiltered ("MICROBLAZE LINUX: ");
-+ vprintf_unfiltered (fmt, args);
-+ va_end (args);
-+ }
-+}
-+
- static int
- microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
- struct bp_target_info *bp_tgt)
-@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
- /* Determine appropriate breakpoint contents and size for this address. */
- bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-
-+ /* Make sure we see the memory breakpoints. */
-+ scoped_restore restore_memory
-+ = make_scoped_restore_show_memory_breakpoints (1);
-+
- val = target_read_memory (addr, old_contents, bplen);
-
- /* If our breakpoint is no longer at the address, this means that the
- program modified the code on us, so it is wrong to put back the
- old value. */
- if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
-- val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+ {
-+ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
-+ }
-
- return val;
- }
-@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- /* Trampolines. */
- tramp_frame_prepend_unwinder (gdbarch,
- µblaze_linux_sighandler_tramp_frame);
-+
-+ /* Enable TLS support. */
-+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
-+ svr4_fetch_objfile_link_map);
- }
-
- void _initialize_microblaze_linux_tdep ();
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 5c804133040..5972a69eb5f 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
-
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
--
-+static int
-+microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
-+ struct bp_target_info *bp_tgt)
-+{
-+ CORE_ADDR addr = bp_tgt->placed_address;
-+ const unsigned char *bp;
-+ int val;
-+ int bplen;
-+ gdb_byte old_contents[BREAKPOINT_MAX];
-+
-+ /* Determine appropriate breakpoint contents and size for this address. */
-+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
-+ if (bp == NULL)
-+ error (_("Software breakpoints not implemented for this target."));
-+
-+ /* Make sure we see the memory breakpoints. */
-+ scoped_restore restore_memory
-+ = make_scoped_restore_show_memory_breakpoints (1);
-+
-+ val = target_read_memory (addr, old_contents, bplen);
-+
-+ /* If our breakpoint is no longer at the address, this means that the
-+ program modified the code on us, so it is wrong to put back the
-+ old value. */
-+ if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
-+ {
-+ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
-+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
-+ }
-+
-+ return val;
-+}
-
- /* Allocate and initialize a frame cache. */
-
-@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- microblaze_breakpoint::kind_from_pc);
- set_gdbarch_sw_breakpoint_from_kind (gdbarch,
- microblaze_breakpoint::bp_from_kind);
-+ set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint);
-
- set_gdbarch_frame_args_skip (gdbarch, 8);
-
-@@ -771,4 +803,5 @@ When non-zero, microblaze specific debugging is enabled."),
- NULL,
- &setdebuglist, &showdebuglist);
-
-+
- }
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 4fbdf9933f0..db0772643dc 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -117,6 +117,8 @@ struct microblaze_frame_cache
-
- /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
- Only used for native debugging. */
--#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60}
-+#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
-+#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
-+
-
- #endif /* microblaze-tdep.h */
-diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
-new file mode 100644
-index 00000000000..bd8a4384424
---- /dev/null
-+++ b/gdb/regformats/reg-microblaze.dat
-@@ -0,0 +1,41 @@
-+name:microblaze
-+expedite:r1,pc
-+32:r0
-+32:r1
-+32:r2
-+32:r3
-+32:r4
-+32:r5
-+32:r6
-+32:r7
-+32:r8
-+32:r9
-+32:r10
-+32:r11
-+32:r12
-+32:r13
-+32:r14
-+32:r15
-+32:r16
-+32:r17
-+32:r18
-+32:r19
-+32:r20
-+32:r21
-+32:r22
-+32:r23
-+32:r24
-+32:r25
-+32:r26
-+32:r27
-+32:r28
-+32:r29
-+32:r30
-+32:r31
-+32:pc
-+32:msr
-+32:ear
-+32:esr
-+32:fsr
-+32:slr
-+32:shr
-diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
-index 9d7687be534..8195ccb8ad2 100644
---- a/gdbserver/Makefile.in
-+++ b/gdbserver/Makefile.in
-@@ -183,6 +183,7 @@ SFILES = \
- $(srcdir)/linux-ia64-low.cc \
- $(srcdir)/linux-low.cc \
- $(srcdir)/linux-m68k-low.cc \
-+ $(srcdir)/linux-microblaze-low.c \
- $(srcdir)/linux-mips-low.cc \
- $(srcdir)/linux-nios2-low.cc \
- $(srcdir)/linux-ppc-low.cc \
-@@ -216,6 +217,7 @@ SFILES = \
- $(srcdir)/../gdb/nat/linux-namespaces.c \
- $(srcdir)/../gdb/nat/linux-osdata.c \
- $(srcdir)/../gdb/nat/linux-personality.c \
-+ $(srcdir)/../gdb/nat/microblaze-linux.c \
- $(srcdir)/../gdb/nat/mips-linux-watch.c \
- $(srcdir)/../gdb/nat/ppc-linux.c \
- $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
-@@ -557,6 +559,8 @@ target/%.o: ../gdb/target/%.c
-
- %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
- $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
-
- #
- # Dependency tracking.
-diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
-index 5e33bd9c54d..13d5c6aff87 100644
---- a/gdbserver/configure.srv
-+++ b/gdbserver/configure.srv
-@@ -155,6 +155,14 @@ case "${gdbserver_host}" in
- srv_linux_usrregs=yes
- srv_linux_thread_db=yes
- ;;
-+ microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
-+ srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+ srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+ srv_xmlfiles="microblaze-linux.xml"
-+ srv_linux_regsets=yes
-+ srv_linux_usrregs=yes
-+ srv_linux_thread_db=yes
-+ ;;
- powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
- srv_regobj="${srv_regobj} powerpc-altivec32l.o"
- srv_regobj="${srv_regobj} powerpc-vsx32l.o"
--
2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
deleted file mode 100644
index 7339995..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0033-Fix-various-compile-warnings.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From d9114e764eb42ae1daaf6af7c2a5e48fc764109d Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@kernel.crashing.org>
-Date: Fri, 17 Jul 2020 09:20:54 -0500
-Subject: [PATCH 33/40] Fix various compile warnings
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- bfd/elf64-microblaze.c | 9 +++++----
- gas/config/tc-microblaze.c | 11 +++++------
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b002b414d64..8308f1ebd09 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- /* Set the howto pointer for a RCE ELF reloc. */
-
- static bfd_boolean
--microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
-+microblaze_elf_info_to_howto (bfd * abfd,
- arelent * cache_ptr,
- Elf_Internal_Rela * dst)
- {
-@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
- r_type = ELF64_R_TYPE (dst->r_info);
- if (r_type >= R_MICROBLAZE_max)
- {
-- (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
- abfd, r_type);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
-
- cache_ptr->howto = microblaze_elf_howto_table [r_type];
-- return TRUE;
-+ return TRUE;
- }
-
- /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */
-@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
- else
- {
- BFD_FAIL ();
-- (*_bfd_error_handler)
-+ _bfd_error_handler
- (_("%pB: probably compiled without -fPIC?"),
- input_bfd);
- bfd_set_error (bfd_error_bad_value);
-@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
- goto dogottls;
- case R_MICROBLAZE_TLSLD:
- tls_type |= (TLS_TLS | TLS_LD);
-+ /* Fall through. */
- dogottls:
- sec->has_tls_reloc = 1;
- /* Fall through. */
-diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index da99d4ef482..62daa56b47a 100644
---- a/gas/config/tc-microblaze.c
-+++ b/gas/config/tc-microblaze.c
-@@ -1091,7 +1091,6 @@ md_assemble (char * str)
- reg = is_reg (temp_op_end + 1);
- if (reg)
- {
--
- opcode->inst_type=INST_TYPE_RD_R1_IMML;
- opcode->inst_offset_type = OPCODE_MASK_H;
- if (streq (name, "addli"))
-@@ -1242,18 +1241,18 @@ md_assemble (char * str)
- else if (streq (name, "smi"))
- as_fatal (_("smi pseudo instruction should not use a label in imm field"));
- if(streq (name, "lli") || streq (name, "sli"))
-- opc = str_microblaze_64;
-+ opc = strdup(str_microblaze_64);
- else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
- || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
- || streq (name, "shi") || streq (name, "swi"))))
- {
-- opc = str_microblaze_64;
-+ opc = strdup(str_microblaze_64);
- subtype = opcode->inst_offset_type;
- }
- else if (reg2 == REG_ROSDP)
-- opc = str_microblaze_ro_anchor;
-+ opc = strdup(str_microblaze_ro_anchor);
- else if (reg2 == REG_RWSDP)
-- opc = str_microblaze_rw_anchor;
-+ opc = strdup(str_microblaze_rw_anchor);
- else
- opc = NULL;
- if (exp.X_md != 0)
-@@ -1718,7 +1717,7 @@ md_assemble (char * str)
- inst |= (reg1 << RD_LOW) & RD_MASK;
- inst |= (immed << IMM_LOW) & IMM16_MASK;
- break;
--
-+
- case INST_TYPE_R1_RFSL:
- if (strcmp (op_end, ""))
- op_end = parse_reg (op_end + 1, ®1); /* Get r1. */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Initial-port-of-core-reading-support-Added-support-f.patch
similarity index 61%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Initial-port-of-core-reading-support-Added-support-f.patch
index 4eeeb7d..3d5f7ae 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Initial-port-of-core-reading-support.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0034-Initial-port-of-core-reading-support-Added-support-f.patch
@@ -1,22 +1,22 @@
-From b6c01467951b83f9cca621ffeb89151eba1d73a1 Mon Sep 17 00:00:00 2001
+From bcb8a5479a617eea7b4da869bee5e00d4b750c73 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 35/40] Initial port of core reading support Added support for
+Subject: [PATCH 34/52] Initial port of core reading support Added support for
reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
information for rebuilding ".reg" sections of core dumps at run time.
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
---
- bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++
+ bfd/elf32-microblaze.c | 84 ++++++++++++++++++++++++++++++++++
gdb/configure.tgt | 2 +-
- gdb/microblaze-linux-tdep.c | 17 +++++++-
- gdb/microblaze-tdep.c | 48 +++++++++++++++++++++
- gdb/microblaze-tdep.h | 27 ++++++++++++
- 5 files changed, 176 insertions(+), 2 deletions(-)
+ gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
+ gdb/microblaze-tdep.c | 90 +++++++++++++++++++++++++++++++++++++
+ gdb/microblaze-tdep.h | 27 +++++++++++
+ 5 files changed, 259 insertions(+), 1 deletion(-)
diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index bf09c68afd9..a4b15882d77 100644
+index d77710b1f3..7a27e50111 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
@@ -107,7 +107,7 @@
/* ELF linker hash entry. */
struct elf32_mb_link_hash_entry
-@@ -3574,4 +3655,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+@@ -3576,4 +3657,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections
#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook
@@ -116,7 +116,7 @@
+
#include "elf32-target.h"
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index d66f01bb9f7..2938fddfe82 100644
+index d66f01bb9f..2938fddfe8 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -389,7 +389,7 @@ mep-*-*)
@@ -129,34 +129,65 @@
gdb_sim=../sim/microblaze/libsim.a
;;
diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index d15b24d619e..0d5c08d24f6 100644
+index fb8241884b..2725ce1789 100644
--- a/gdb/microblaze-linux-tdep.c
+++ b/gdb/microblaze-linux-tdep.c
-@@ -36,6 +36,7 @@
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
-
- static int microblaze_debug_flag = 0;
-
-@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
+@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
microblaze_linux_sighandler_cache_init
};
--
++const struct microblaze_gregset microblaze_linux_core_gregset;
++
++static void
++microblaze_linux_supply_core_gregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *gregs, size_t len)
++{
++ microblaze_supply_gregset (µblaze_linux_core_gregset, regcache,
++ regnum, gregs);
++}
++
++static void
++microblaze_linux_collect_core_gregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *gregs, size_t len)
++{
++ microblaze_collect_gregset (µblaze_linux_core_gregset, regcache,
++ regnum, gregs);
++}
++
++static void
++microblaze_linux_supply_core_fpregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *fpregs, size_t len)
++{
++ /* FIXME. */
++ microblaze_supply_fpregset (regcache, regnum, fpregs);
++}
++
++static void
++microblaze_linux_collect_core_fpregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *fpregs, size_t len)
++{
++ /* FIXME. */
++ microblaze_collect_fpregset (regcache, regnum, fpregs);
++}
+
static void
microblaze_linux_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
++ tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
++ microblaze_linux_collect_core_gregset);
+ tdep->sizeof_gregset = 200;
+
linux_init_abi (info, gdbarch);
set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarch_info info,
tramp_frame_prepend_unwinder (gdbarch,
µblaze_linux_sighandler_tramp_frame);
@@ -171,50 +202,109 @@
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
+
++ set_gdbarch_regset_from_core_section (gdbarch,
++ microblaze_regset_from_core_section);
++
/* Enable TLS support. */
set_gdbarch_fetch_tls_load_module_address (gdbarch,
svr4_fetch_objfile_link_map);
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 5972a69eb5f..7462a1f7ce6 100644
+index 443adfb364..1b5cf38e45 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
-@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
++static CORE_ADDR
++microblaze_store_arguments (struct regcache *regcache, int nargs,
++ struct value **args, CORE_ADDR sp,
++ int struct_return, CORE_ADDR struct_addr)
++{
++ error (_("store_arguments not implemented"));
++ return sp;
++}
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct frame_info *next_frame,
+ return cache->base;
+ }
+
++static const struct frame_unwind *
++microblaze_frame_sniffer (struct frame_info *next_frame)
++{
++ return µblaze_frame_unwind;
++}
++
+ static const struct frame_base microblaze_frame_base =
+ {
+ µblaze_frame_unwind,
+@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
tdesc_microblaze_with_stack_protect);
}
+void
-+microblaze_supply_gregset (const struct regset *regset,
++microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ struct regcache *regcache,
+ int regnum, const void *gregs)
+{
-+ const unsigned int *regs = (const unsigned int *)gregs;
++ unsigned int *regs = gregs;
+ if (regnum >= 0)
-+ regcache->raw_supply (regnum, regs + regnum);
++ regcache_raw_supply (regcache, regnum, regs + regnum);
+
+ if (regnum == -1) {
+ int i;
+
+ for (i = 0; i < 50; i++) {
-+ regcache->raw_supply (i, regs + i);
++ regcache_raw_supply (regcache, i, regs + i);
+ }
+ }
+}
+
+
++void
++microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++ const struct regcache *regcache,
++ int regnum, void *gregs)
++{
++ /* FIXME. */
++}
++
++void
++microblaze_supply_fpregset (struct regcache *regcache,
++ int regnum, const void *fpregs)
++{
++ /* FIXME. */
++}
++
++void
++microblaze_collect_fpregset (const struct regcache *regcache,
++ int regnum, void *fpregs)
++{
++ /* FIXME. */
++}
++
++
+/* Return the appropriate register set for the core section identified
+ by SECT_NAME and SECT_SIZE. */
+
-+static void
-+microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
-+ iterate_over_regset_sections_cb *cb,
-+ void *cb_data,
-+ const struct regcache *regcache)
++const struct regset *
++microblaze_regset_from_core_section (struct gdbarch *gdbarch,
++ const char *sect_name, size_t sect_size)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
-+ cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
++ microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
+
-+ cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
++ if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
++ return tdep->gregset;
++
++ if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
++ return tdep->fpregset;
++
++ microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
++ return NULL;
+}
+
+
@@ -222,7 +312,7 @@
static struct gdbarch *
microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
-@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
@@ -233,7 +323,7 @@
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
if (tdesc_data != NULL)
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
@@ -241,14 +331,14 @@
+
+ /* If we have register sets, enable the generic core file support. */
+ if (tdep->gregset) {
-+ set_gdbarch_iterate_over_regset_sections (gdbarch,
-+ microblaze_iterate_over_regset_sections);
++ set_gdbarch_regset_from_core_section (gdbarch,
++ microblaze_regset_from_core_section);
+ }
return gdbarch;
}
diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index db0772643dc..8f41ba19351 100644
+index db0772643d..de66a05cab 100644
--- a/gdb/microblaze-tdep.h
+++ b/gdb/microblaze-tdep.h
@@ -22,8 +22,22 @@
@@ -278,10 +368,10 @@
#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
-+extern void microblaze_supply_gregset (const struct regset *regset,
++extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ struct regcache *regcache,
+ int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct regset *regset,
++extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
+ const struct regcache *regcache,
+ int regnum, void *gregs);
+extern void microblaze_supply_fpregset (struct regcache *regcache,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch
index 79d08da..4c26f25 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0035-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,7 +1,7 @@
-From dc76254a84fa1086983aefe9db4d8f94b42efb9b Mon Sep 17 00:00:00 2001
+From bc2b702d7f73a231bd67c60465137fe37f67479a Mon Sep 17 00:00:00 2001
From: Nathan Rossi <nathan.rossi@petalogix.com>
Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 36/40] Fix debug message when register is unavailable
+Subject: [PATCH 35/52] Fix debug message when register is unavailable
Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
---
@@ -9,7 +9,7 @@
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/gdb/frame.c b/gdb/frame.c
-index ff27b9f00e9..bf931b370c9 100644
+index ff27b9f00e..bf931b370c 100644
--- a/gdb/frame.c
+++ b/gdb/frame.c
@@ -1263,12 +1263,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch
new file mode 100644
index 0000000..81f55f7
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0036-revert-master-rebase-changes-to-gdbserver.patch
@@ -0,0 +1,31 @@
+From c84c1a62142bcd18c242ec476539f0c505285d6c Mon Sep 17 00:00:00 2001
+From: David Holsgrove <david.holsgrove@xilinx.com>
+Date: Mon, 22 Jul 2013 11:16:05 +1000
+Subject: [PATCH 36/52] revert master-rebase changes to gdbserver
+
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+---
+ gdbserver/configure.srv | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 5e33bd9c54..7e81388850 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,6 +155,13 @@ case "${gdbserver_host}" in
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
++ microblaze*-*-linux*) srv_regobj=microblaze-linux.o
++ srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++ srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++ srv_linux_regsets=yes
++ srv_linux_usrregs=yes
++ srv_linux_thread_db=yes
++ ;;
+ powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
+ srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+ srv_regobj="${srv_regobj} powerpc-vsx32l.o"
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
new file mode 100644
index 0000000..24ae7a8
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
@@ -0,0 +1,36 @@
+From 06f1e66daaa1c8a2e1e43254a66f35840945e63b Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 30 Apr 2018 17:09:55 +0530
+Subject: [PATCH 37/52] revert master-rebase changes to gdbserver , previous
+ commit typo's
+
+Note: This _WILL NOT WORK_, the format of the files in gdbserver have changed!
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ gdbserver/Makefile.in | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index 9d7687be53..df354d636c 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -183,6 +183,7 @@ SFILES = \
+ $(srcdir)/linux-ia64-low.cc \
+ $(srcdir)/linux-low.cc \
+ $(srcdir)/linux-m68k-low.cc \
++ $(srcdir)/linux-microblaze-low.c \
+ $(srcdir)/linux-mips-low.cc \
+ $(srcdir)/linux-nios2-low.cc \
+ $(srcdir)/linux-ppc-low.cc \
+@@ -217,6 +218,7 @@ SFILES = \
+ $(srcdir)/../gdb/nat/linux-osdata.c \
+ $(srcdir)/../gdb/nat/linux-personality.c \
+ $(srcdir)/../gdb/nat/mips-linux-watch.c \
++ $(srcdir)/../gdb/nat/microblaze-linux.c \
+ $(srcdir)/../gdb/nat/ppc-linux.c \
+ $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \
+ $(srcdir)/../gdb/nat/fork-inferior.c \
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index 80b70fc..dede70e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 23376adc47cf72e46a1edf99e7fbc40164d39cd6 Mon Sep 17 00:00:00 2001
+From 463a2d331ab68484913a2957614e852eac793583 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 38/52] microblaze: Add build_gdbserver=yes to top level
configure.tgt
For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -16,7 +16,7 @@
1 file changed, 1 insertion(+)
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index 2938fddfe82..ac2d35a9917 100644
+index 2938fddfe8..ac2d35a991 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -397,6 +397,7 @@ microblaze*-*-*)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-support-for-native-gdb.patch
similarity index 98%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-support-for-native-gdb.patch
index 9360bc5..646914a 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0038-Initial-support-for-native-gdb.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-support-for-native-gdb.patch
@@ -1,12 +1,15 @@
-From f34017e4cec8ad571accfd964187ab1f2db8de7f Mon Sep 17 00:00:00 2001
+From eef1384ec08bbbac893e4a564981517f92f90b57 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@petalogix.com>
Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/40] Initial support for native gdb
+Subject: [PATCH 39/52] Initial support for native gdb
microblaze: Follow PPC method of getting setting registers
using PTRACE PEEK/POKE
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
+
+Conflicts:
+ gdb/Makefile.in
---
gdb/Makefile.in | 2 +
gdb/config/microblaze/linux.mh | 9 +
@@ -16,7 +19,7 @@
create mode 100644 gdb/microblaze-linux-nat.c
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index 9ae9fe2d1e1..a44464b9830 100644
+index 9ae9fe2d1e..a44464b983 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -1328,6 +1328,7 @@ HFILES_NO_SRCDIR = \
@@ -37,7 +40,7 @@
mips-fbsd-tdep.c \
diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
new file mode 100644
-index 00000000000..a4eaf540e1d
+index 0000000000..a4eaf540e1
--- /dev/null
+++ b/gdb/config/microblaze/linux.mh
@@ -0,0 +1,9 @@
@@ -52,7 +55,7 @@
+LOADLIBES = -ldl $(RDYNAMIC)
diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
new file mode 100644
-index 00000000000..e9b8c9c5221
+index 0000000000..e9b8c9c522
--- /dev/null
+++ b/gdb/microblaze-linux-nat.c
@@ -0,0 +1,431 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
similarity index 60%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
index 136291f..e08f16d 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
@@ -1,19 +1,20 @@
-From 1a493a6fc3bebb50d9679a4d11709676f933ab04 Mon Sep 17 00:00:00 2001
+From 976a0e2664559cc194eee8040280cd29e2672d26 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
+Subject: [PATCH 40/52] Fixing the issues related to GDB-7.12 added all the
+ required function which are new in 7.12 and removed few deprecated functions
+ from 7.6
-added all the required function which are new in 7.12 and removed
-few deprecated functions from 7.6
---
- gdb/config/microblaze/linux.mh | 4 +-
- gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-tdep.h | 1 +
- gdbserver/configure.srv | 3 +-
- 4 files changed, 89 insertions(+), 16 deletions(-)
+ gdb/config/microblaze/linux.mh | 4 +-
+ gdb/microblaze-linux-tdep.c | 68 ++++++++++++++++++++--
+ gdb/microblaze-tdep.h | 1 +
+ gdbserver/configure.srv | 3 +-
+ gdbserver/linux-microblaze-low.c | 97 +++++++++++++++++++++++++++-----
+ 5 files changed, 153 insertions(+), 20 deletions(-)
diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1d..74a53b854a4 100644
+index a4eaf540e1..74a53b854a 100644
--- a/gdb/config/microblaze/linux.mh
+++ b/gdb/config/microblaze/linux.mh
@@ -1,9 +1,11 @@
@@ -29,10 +30,128 @@
NAT_CDEPS = $(srcdir)/proc-service.list
LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc585..a2733f3c21c 100644
---- a/gdb/gdbserver/linux-microblaze-low.c
-+++ b/gdb/gdbserver/linux-microblaze-low.c
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index 2725ce1789..a2e858d10f 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -29,13 +29,76 @@
+ #include "regcache.h"
+ #include "value.h"
+ #include "osabi.h"
+-#include "regset.h"
+ #include "solib-svr4.h"
+ #include "microblaze-tdep.h"
+ #include "trad-frame.h"
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
++
++#include "gdb_assert.h"
++
++#ifndef REGSET_H
++#define REGSET_H 1
++
++struct gdbarch;
++struct regcache;
++
++/* Data structure for the supported register notes in a core file. */
++struct core_regset_section
++{
++ const char *sect_name;
++ int size;
++ const char *human_name;
++};
++
++/* Data structure describing a register set. */
++
++typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
++ int, const void *, size_t);
++typedef void (collect_regset_ftype) (const struct regset *,
++ const struct regcache *,
++ int, void *, size_t);
++
++struct regset
++{
++ /* Data pointer for private use by the methods below, presumably
++ providing some sort of description of the register set. */
++ const void *descr;
++
++ /* Function supplying values in a register set to a register cache. */
++ supply_regset_ftype *supply_regset;
++
++ /* Function collecting values in a register set from a register cache. */
++ collect_regset_ftype *collect_regset;
++
++ /* Architecture associated with the register set. */
++ struct gdbarch *arch;
++};
++
++#endif
++
++/* Allocate a fresh 'struct regset' whose supply_regset function is
++ SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
++ If the regset has no collect_regset function, pass NULL for
++ COLLECT_REGSET.
++
++ The object returned is allocated on ARCH's obstack. */
++
++struct regset *
++regset_alloc (struct gdbarch *arch,
++ supply_regset_ftype *supply_regset,
++ collect_regset_ftype *collect_regset)
++{
++ struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
++
++ regset->arch = arch;
++ regset->supply_regset = supply_regset;
++ regset->collect_regset = collect_regset;
++
++ return regset;
++}
+
+ static int microblaze_debug_flag = 0;
+
+@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
+
+- set_gdbarch_regset_from_core_section (gdbarch,
+- microblaze_regset_from_core_section);
+-
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index de66a05cab..1234f8a36f 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -24,6 +24,7 @@
+ /* Microblaze architecture-specific information. */
+ struct microblaze_gregset
+ {
++ microblaze_gregset() {}
+ unsigned int gregs[32];
+ unsigned int fpregs[32];
+ unsigned int pregs[16];
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 7e81388850..456f4b3349 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
+ srv_linux_thread_db=yes
+ ;;
+ microblaze*-*-linux*) srv_regobj=microblaze-linux.o
+- srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
+- srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+diff --git a/gdbserver/linux-microblaze-low.c b/gdbserver/linux-microblaze-low.c
+index cba5d6fc58..a2733f3c21 100644
+--- a/gdbserver/linux-microblaze-low.c
++++ b/gdbserver/linux-microblaze-low.c
@@ -39,10 +39,11 @@ static int microblaze_regmap[] =
PT_FSR
};
@@ -185,32 +304,6 @@
+{
+ init_registers_microblaze ();
+}
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 8f41ba19351..d2112dc07e1 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -24,6 +24,7 @@
- /* Microblaze architecture-specific information. */
- struct microblaze_gregset
- {
-+ microblaze_gregset() {}
- unsigned int gregs[32];
- unsigned int fpregs[32];
- unsigned int pregs[16];
-diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
-index 13d5c6aff87..ff9ada71b0d 100644
---- a/gdbserver/configure.srv
-+++ b/gdbserver/configure.srv
-@@ -156,8 +156,7 @@ case "${gdbserver_host}" in
- srv_linux_thread_db=yes
- ;;
- microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
-- srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-- srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
- srv_xmlfiles="microblaze-linux.xml"
- srv_linux_regsets=yes
- srv_linux_usrregs=yes
--
2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
similarity index 80%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
index 1dc6b69..2cb1cc8 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
@@ -1,33 +1,33 @@
-From 928d8d1f05274ab6029e4da7d659312c769beded Mon Sep 17 00:00:00 2001
+From 90412eba37c683e0526470c39926318ae7f5bd27 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
+Subject: [PATCH 41/52] Adding 64 bit MB support Added new architecture to
+ Microblaze 64-bit support to GDB Signed-off-by :Nagaraju Mekala
+ <nmekala@xilix.com>
-Added new architecture to Microblaze 64-bit support to GDB
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+Conflicts:
+ gdb/Makefile.in
---
bfd/archures.c | 2 +
bfd/bfd-in2.h | 2 +
- bfd/cpu-microblaze.c | 16 +-
- bfd/elf32-microblaze.c | 9 +
- gas/config/tc-microblaze.c | 14 ++
+ bfd/cpu-microblaze.c | 8 +-
+ gas/config/tc-microblaze.c | 13 ++
gas/config/tc-microblaze.h | 4 +
gdb/features/Makefile | 3 +
gdb/features/microblaze-core.xml | 6 +-
- gdb/features/microblaze-with-stack-protect.c | 4 +-
+ gdb/features/microblaze-stack-protect.xml | 4 +-
+ gdb/features/microblaze-with-stack-protect.c | 8 +-
gdb/features/microblaze.c | 6 +-
- gdb/features/microblaze64-core.xml | 69 +++++++
- gdb/features/microblaze64-stack-protect.xml | 12 ++
- .../microblaze64-with-stack-protect.c | 79 ++++++++
- .../microblaze64-with-stack-protect.xml | 12 ++
- gdb/features/microblaze64.c | 77 ++++++++
- gdb/features/microblaze64.xml | 11 ++
- gdb/microblaze-linux-tdep.c | 29 ++-
- gdb/microblaze-tdep.c | 176 ++++++++++++++++--
- gdb/microblaze-tdep.h | 9 +-
+ gdb/features/microblaze64-core.xml | 69 ++++++
+ gdb/features/microblaze64-stack-protect.xml | 12 +
+ .../microblaze64-with-stack-protect.c | 79 +++++++
+ .../microblaze64-with-stack-protect.xml | 12 +
+ gdb/features/microblaze64.c | 77 +++++++
+ gdb/features/microblaze64.xml | 11 +
+ gdb/microblaze-tdep.c | 207 ++++++++++++++++--
+ gdb/microblaze-tdep.h | 8 +-
.../microblaze-with-stack-protect.dat | 4 +-
- 20 files changed, 504 insertions(+), 40 deletions(-)
+ 19 files changed, 491 insertions(+), 44 deletions(-)
create mode 100644 gdb/features/microblaze64-core.xml
create mode 100644 gdb/features/microblaze64-stack-protect.xml
create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -36,7 +36,7 @@
create mode 100644 gdb/features/microblaze64.xml
diff --git a/bfd/archures.c b/bfd/archures.c
-index 551ec8732f0..627d81261da 100644
+index 551ec8732f..627d81261d 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -522,6 +522,8 @@ DESCRIPTION
@@ -49,7 +49,7 @@
. bfd_arch_tilegx, {* Tilera TILE-Gx. *}
.#define bfd_mach_tilepro 1
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 8902d9c7939..0e5071c235d 100644
+index 05fbeb9b3a..788fb2b48b 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1922,6 +1922,8 @@ enum bfd_architecture
@@ -62,37 +62,28 @@
bfd_arch_tilegx, /* Tilera TILE-Gx. */
#define bfd_mach_tilepro 1
diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index f94dc2c177b..4dbc149155e 100644
+index 194920b20b..f3e8bbda75 100644
--- a/bfd/cpu-microblaze.c
+++ b/bfd/cpu-microblaze.c
-@@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
- 64, /* 32 bits in a word. */
+@@ -31,7 +31,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
64, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
-- bfd_arch_microblaze, /* Architecture. */
+ bfd_arch_microblaze, /* Architecture. */
- 0, /* Machine number - 0 for now. */
-+ bfd_arch_microblaze, /* Architecture. */
-+ bfd_mach_microblaze64, /* 64 bit Machine */
++ bfd_mach_microblaze64, /* 64 bit Machine */
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
- 0 /* Maximum offset of a reloc from the start of an insn. */
- },
- {
-- 32, /* Bits in a word. */
-- 32, /* Bits in an address. */
-- 8, /* Bits in a byte. */
-+ 32, /* 32 bits in a word. */
-+ 32, /* 32 bits in an address. */
-+ 8, /* 8 bits in a byte. */
+@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+ 32, /* Bits in an address. */
+ 8, /* Bits in a byte. */
bfd_arch_microblaze, /* Architecture number. */
- 0, /* Machine number - 0 for now. */
-+ bfd_mach_microblaze, /* 32 bit Machine */
++ bfd_mach_microblaze, /* 32 bit Machine */
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -63,7 +63,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_microblaze, /* Architecture. */
@@ -101,7 +92,7 @@
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -78,7 +78,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
64, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_microblaze, /* Architecture. */
@@ -110,37 +101,11 @@
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index a4b15882d77..d33f709b8b3 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -3585,6 +3585,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
- return TRUE;
- }
-
-+
-+static bfd_boolean
-+elf_microblaze_object_p (bfd *abfd)
-+{
-+ /* Set the right machine number for an s390 elf32 file. */
-+ return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze);
-+}
-+
- /* Hook called by the linker routine which adds symbols from an object
- file. We use it to put .comm items in .sbss, and not .bss. */
-
-@@ -3657,5 +3665,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
-
- #define elf_backend_grok_prstatus microblaze_elf_grok_prstatus
- #define elf_backend_grok_psinfo microblaze_elf_grok_psinfo
-+#define elf_backend_object_p elf_microblaze_object_p
-
- #include "elf32-target.h"
diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
-index 62daa56b47a..b22f6de2df6 100644
+index c6ca913f8b..df7088d6c3 100644
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
-@@ -437,6 +437,11 @@ md_begin (void)
+@@ -438,6 +438,11 @@ md_begin (void)
opcode_hash_control = hash_new ();
@@ -150,12 +115,12 @@
+ bfd_set_arch_mach (stdoutput, bfd_arch_microblaze, bfd_mach_microblaze);
+
/* Insert unique names into hash table. */
- for (opcode = (struct op_code_struct *)opcodes; opcode->name; opcode ++)
+ for (opcode = (struct opcodes *)opcodes; opcode->name; opcode ++)
{
-@@ -3494,6 +3499,15 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+@@ -3478,6 +3483,14 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED)
+ fprintf (stream, " -%-23s%s\n", "m64", N_("generate 64-bit elf"));
}
-
+unsigned long
+microblaze_mach (void)
+{
@@ -164,12 +129,11 @@
+ else
+ return bfd_mach_microblaze;
+}
-+
+
/* Create a fixup for a cons expression. If parse_cons_expression_microblaze
found a machine specific op in an expression,
- then we create relocs accordingly. */
diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h
-index 7435a70ef5e..90c2a4a5558 100644
+index 7435a70ef5..90c2a4a555 100644
--- a/gas/config/tc-microblaze.h
+++ b/gas/config/tc-microblaze.h
@@ -23,6 +23,10 @@
@@ -184,7 +148,7 @@
/* Used to initialise target_big_endian. */
#define TARGET_BYTES_BIG_ENDIAN 1
diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index d0af9a47b48..2c3cf91b69f 100644
+index d0af9a47b4..2c3cf91b69 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -46,6 +46,7 @@
@@ -206,7 +170,7 @@
mips-linux.xml \
mips64-dsp-linux.xml \
diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index f272650a41b..d1f2282fd1e 100644
+index f272650a41..a87f0f2319 100644
--- a/gdb/features/microblaze-core.xml
+++ b/gdb/features/microblaze-core.xml
@@ -8,7 +8,7 @@
@@ -231,11 +195,24 @@
<reg name="rtlbsx" bitsize="32"/>
<reg name="rtlblo" bitsize="32"/>
<reg name="rtlbhi" bitsize="32"/>
-+ <reg name="rslr" bitsize="32"/>
-+ <reg name="rshr" bitsize="32"/>
++ <reg name="slr" bitsize="32"/>
++ <reg name="shr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
+index 1b16223406..1a67f88c18 100644
+--- a/gdb/features/microblaze-stack-protect.xml
++++ b/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+- <reg name="rslr" bitsize="32"/>
+- <reg name="rshr" bitsize="32"/>
++ <reg name="slr" bitsize="32"/>
++ <reg name="shr" bitsize="32"/>
</feature>
diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa198874..ab162fd2588 100644
+index b39aa19887..609934e2b4 100644
--- a/gdb/features/microblaze-with-stack-protect.c
+++ b/gdb/features/microblaze-with-stack-protect.c
@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
@@ -256,8 +233,19 @@
tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+- tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
+
+ tdesc_microblaze_with_stack_protect = result;
+ }
diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc07700..7919ac96e62 100644
+index 6c86fc0770..ceb98ca8b8 100644
--- a/gdb/features/microblaze.c
+++ b/gdb/features/microblaze.c
@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
@@ -282,14 +270,14 @@
tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
tdesc_microblaze = result;
}
diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
new file mode 100644
-index 00000000000..b9adadfade6
+index 0000000000..96e99e2fb2
--- /dev/null
+++ b/gdb/features/microblaze64-core.xml
@@ -0,0 +1,69 @@
@@ -359,12 +347,12 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
-+ <reg name="rslr" bitsize="64"/>
-+ <reg name="rshr" bitsize="64"/>
++ <reg name="slr" bitsize="64"/>
++ <reg name="shr" bitsize="64"/>
+</feature>
diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
new file mode 100644
-index 00000000000..9d7ea8b9fd7
+index 0000000000..1bbf5fc3ce
--- /dev/null
+++ b/gdb/features/microblaze64-stack-protect.xml
@@ -0,0 +1,12 @@
@@ -377,12 +365,12 @@
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+ <reg name="rslr" bitsize="64"/>
-+ <reg name="rshr" bitsize="64"/>
++ <reg name="slr" bitsize="64"/>
++ <reg name="shr" bitsize="64"/>
+</feature>
diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
new file mode 100644
-index 00000000000..249cb534daa
+index 0000000000..f448c9a749
--- /dev/null
+++ b/gdb/features/microblaze64-with-stack-protect.c
@@ -0,0 +1,79 @@
@@ -460,14 +448,14 @@
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64_with_stack_protect = result;
+}
diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
new file mode 100644
-index 00000000000..0e9f01611f3
+index 0000000000..0e9f01611f
--- /dev/null
+++ b/gdb/features/microblaze64-with-stack-protect.xml
@@ -0,0 +1,12 @@
@@ -485,7 +473,7 @@
+</target>
diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
new file mode 100644
-index 00000000000..5d3e2c8cd91
+index 0000000000..1aa37c4512
--- /dev/null
+++ b/gdb/features/microblaze64.c
@@ -0,0 +1,77 @@
@@ -561,14 +549,14 @@
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64 = result;
+}
diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
new file mode 100644
-index 00000000000..515d18e65cf
+index 0000000000..515d18e65c
--- /dev/null
+++ b/gdb/features/microblaze64.xml
@@ -0,0 +1,11 @@
@@ -583,55 +571,8 @@
+<target>
+ <xi:include href="microblaze64-core.xml"/>
+</target>
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 0d5c08d24f6..a9a0eef3854 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-
- /* BFD target for core files. */
- if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+ {
-+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+ MICROBLAZE_REGISTER_SIZE=8;
-+ }
-+ else
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+ }
- else
-- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+ {
-+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+ MICROBLAZE_REGISTER_SIZE=8;
-+ }
-+ else
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+ }
-+
-+ switch (info.bfd_arch_info->mach)
-+ {
-+ case bfd_mach_microblaze64:
-+ set_gdbarch_ptr_bit (gdbarch, 64);
-+ break;
-+ }
-
-
- /* Shared library handling. */
-@@ -177,6 +198,8 @@ void _initialize_microblaze_linux_tdep ();
- void
- _initialize_microblaze_linux_tdep ()
- {
-- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX,
-+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX,
-+ microblaze_linux_init_abi);
-+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX,
- microblaze_linux_init_abi);
- }
diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 7462a1f7ce6..5dd0b3ea532 100644
+index 1b5cf38e45..f4ea3cc342 100644
--- a/gdb/microblaze-tdep.c
+++ b/gdb/microblaze-tdep.c
@@ -40,7 +40,9 @@
@@ -644,34 +585,57 @@
/* Instruction macros used for analyzing the prologue. */
/* This set of instruction macros need to be changed whenever the
-@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
+@@ -75,12 +77,13 @@ static const char *microblaze_register_names[] =
+ "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+ "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+ "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+- "rslr", "rshr"
++ "slr", "shr"
};
#define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--
-+
+
static unsigned int microblaze_debug_flag = 0;
-+int MICROBLAZE_REGISTER_SIZE = 4;
++int reg_size = 4;
static void ATTRIBUTE_PRINTF (1, 2)
microblaze_debug (const char *fmt, ...)
-@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
-
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regcache *regcache, int nargs,
+ error (_("store_arguments not implemented"));
+ return sp;
+ }
+#if 0
static int
microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
-@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ int val;
+ int bplen;
+ gdb_byte old_contents[BREAKPOINT_MAX];
+- struct cleanup *cleanup;
++ //struct cleanup *cleanup;
+ /* Determine appropriate breakpoint contents and size for this address. */
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ error (_("Software breakpoints not implemented for this target."));
+
+ /* Make sure we see the memory breakpoints. */
+- cleanup = make_show_memory_breakpoints_cleanup (1);
++ scoped_restore
++ cleanup = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
+@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
return val;
}
-+#endif
++#endif
/* Allocate and initialize a frame cache. */
-@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+ static struct microblaze_frame_cache *
+@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
gdb_byte *valbuf)
{
gdb_byte buf[8];
@@ -679,7 +643,19 @@
/* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
switch (TYPE_LENGTH (type))
{
-@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+ case 1: /* return last byte in the register. */
+ regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
++ memcpy(valbuf, buf + reg_size - 1, 1);
+ return;
+ case 2: /* return last 2 bytes in register. */
+ regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
++ memcpy(valbuf, buf + reg_size - 2, 2);
+ return;
+ case 4: /* for sizes 4 or 8, copy the required length. */
+ case 8:
+@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
return (TYPE_LENGTH (type) == 16);
}
@@ -791,14 +767,16 @@
+}
+#endif
+
++static void
++microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
++{
++ regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
++}
++
static int dwarf2_to_reg_map[78] =
{ 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
-@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
- return -1;
- }
-
-+#if 0
+@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
static void
microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
{
@@ -814,27 +792,46 @@
- tdesc_microblaze_with_stack_protect);
+ tdesc_microblaze64_with_stack_protect);
}
-+#endif
void
- microblaze_supply_gregset (const struct regset *regset,
+@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
struct regcache *regcache,
int regnum, const void *gregs)
{
-- const unsigned int *regs = (const unsigned int *)gregs;
+- unsigned int *regs = gregs;
+ const gdb_byte *regs = (const gdb_byte *) gregs;
if (regnum >= 0)
- regcache->raw_supply (regnum, regs + regnum);
+- regcache_raw_supply (regcache, regnum, regs + regnum);
++ regcache->raw_supply (regnum, regs + regnum);
-@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
+ if (regnum == -1) {
+ int i;
+
+ for (i = 0; i < 50; i++) {
+- regcache_raw_supply (regcache, i, regs + i);
++ regcache->raw_supply (regnum, regs + i);
+ }
+ }
+ }
+@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
}
--
++static void
++make_regs (struct gdbarch *arch)
++{
++ struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
++ int mach = gdbarch_bfd_arch_info (arch)->mach;
++
++ if (mach == bfd_mach_microblaze64)
++ {
++ set_gdbarch_ptr_bit (arch, 64);
++ }
++}
+
static struct gdbarch *
microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- {
-@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
if (arches != NULL)
return arches->gdbarch;
if (tdesc == NULL)
@@ -844,7 +841,7 @@
+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64)
+ {
+ tdesc = tdesc_microblaze64;
-+ MICROBLAZE_REGISTER_SIZE = 8;
++ reg_size = 8;
+ }
+ else
+ tdesc = tdesc_microblaze;
@@ -852,7 +849,7 @@
/* Check any target description for validity. */
if (tdesc_has_registers (tdesc))
{
-@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
int valid_p;
int i;
@@ -893,7 +890,7 @@
}
if (!valid_p)
-@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdesc_data_cleanup (tdesc_data);
return NULL;
}
@@ -901,7 +898,7 @@
}
/* Allocate space for the new architecture. */
-@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM);
@@ -919,7 +916,7 @@
/* Map Dwarf2 registers to GDB registers. */
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
-@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
microblaze_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
microblaze_breakpoint::bp_from_kind);
@@ -937,7 +934,21 @@
frame_base_set_default (gdbarch, µblaze_frame_base);
-@@ -841,6 +981,8 @@ _initialize_microblaze_tdep ()
+@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+ //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
+
+- /* If we have register sets, enable the generic core file support. */
++ /* If we have register sets, enable the generic core file support.
+ if (tdep->gregset) {
+ set_gdbarch_regset_from_core_section (gdbarch,
+ microblaze_regset_from_core_section);
+- }
++ }*/
+
+ return gdbarch;
+ }
+@@ -883,6 +1040,8 @@ _initialize_microblaze_tdep ()
initialize_tdesc_microblaze_with_stack_protect ();
initialize_tdesc_microblaze ();
@@ -947,7 +958,7 @@
add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
µblaze_debug_flag, _("\
diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index d2112dc07e1..bd03e969b9b 100644
+index 1234f8a36f..c0fc900733 100644
--- a/gdb/microblaze-tdep.h
+++ b/gdb/microblaze-tdep.h
@@ -27,7 +27,7 @@ struct microblaze_gregset
@@ -971,18 +982,17 @@
};
struct microblaze_frame_cache
-@@ -128,7 +128,8 @@ struct microblaze_frame_cache
+@@ -128,7 +128,7 @@ struct microblaze_frame_cache
struct trad_frame_saved_reg *saved_regs;
};
/* All registers are 32 bits. */
-#define MICROBLAZE_REGISTER_SIZE 4
-+extern int microblaze_reg_size;
-+#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
++//#define MICROBLAZE_REGISTER_SIZE 8
/* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
Only used for native debugging. */
diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd0..450e321d49e 100644
+index 8040a7b3fd..450e321d49 100644
--- a/gdb/regformats/microblaze-with-stack-protect.dat
+++ b/gdb/regformats/microblaze-with-stack-protect.dat
@@ -60,5 +60,5 @@ expedite:r1,rpc
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch
new file mode 100644
index 0000000..e115666
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0042-porting-GDB-for-linux.patch
@@ -0,0 +1,155 @@
+From c810c6e2a6ae66426444580d04659e8b2d0b2daa Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 12 Dec 2019 14:56:17 +0530
+Subject: [PATCH 42/52] porting GDB for linux
+
+---
+ gdb/features/microblaze-linux.xml | 12 ++++++++++
+ gdb/microblaze-linux-tdep.c | 39 ++++++++++++++++++++++++-------
+ gdbserver/Makefile.in | 2 ++
+ gdbserver/configure.srv | 3 ++-
+ 4 files changed, 47 insertions(+), 9 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
+
+diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
+new file mode 100644
+index 0000000000..8983e66eb3
+--- /dev/null
++++ b/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++ Copying and distribution of this file, with or without modification,
++ are permitted in any medium without royalty provided the copyright
++ notice and this notice are preserved. -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++ <osabi>GNU/Linux</osabi>
++ <xi:include href="microblaze-core.xml"/>
++</target>
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index a2e858d10f..a37c4c86f4 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -41,7 +41,7 @@
+
+ #ifndef REGSET_H
+ #define REGSET_H 1
+-
++int MICROBLAZE_REGISTER_SIZE=4;
+ struct gdbarch;
+ struct regcache;
+
+@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
+ va_end (args);
+ }
+ }
+-
++#if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+
+ /* Make sure we see the memory breakpoints. */
+- cleanup = make_show_memory_breakpoints_cleanup (1);
++ cleanup = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
+@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ do_cleanups (cleanup);
+ return val;
+ }
++#endif
+
+ static void
+ microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
+@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+
+ linux_init_abi (info, gdbarch);
+
+- set_gdbarch_memory_remove_breakpoint (gdbarch,
+- microblaze_linux_memory_remove_breakpoint);
++// set_gdbarch_memory_remove_breakpoint (gdbarch,
++// microblaze_linux_memory_remove_breakpoint);
+
+ /* Shared library handling. */
+ set_solib_svr4_fetch_link_map_offsets (gdbarch,
+@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+
+ /* BFD target for core files. */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++ {
++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++ MICROBLAZE_REGISTER_SIZE=8;
++ }
++ else
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++ }
+ else
+- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++ {
++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++ MICROBLAZE_REGISTER_SIZE=8;
++ }
++ else
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++ }
+
++ switch (info.bfd_arch_info->mach)
++ {
++ case bfd_mach_microblaze64:
++ set_gdbarch_ptr_bit (gdbarch, 64);
++ break;
++ }
+
+ /* Shared library handling. */
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+@@ -279,6 +300,8 @@ void _initialize_microblaze_linux_tdep ();
+ void
+ _initialize_microblaze_linux_tdep ()
+ {
+- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX,
++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX,
++ microblaze_linux_init_abi);
++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX,
+ microblaze_linux_init_abi);
+ }
+diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
+index df354d636c..680f536c06 100644
+--- a/gdbserver/Makefile.in
++++ b/gdbserver/Makefile.in
+@@ -559,6 +559,8 @@ target/%.o: ../gdb/target/%.c
+
+ %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh)
+ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+
+ #
+ # Dependency tracking.
+diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
+index 456f4b3349..ff9ada71b0 100644
+--- a/gdbserver/configure.srv
++++ b/gdbserver/configure.srv
+@@ -155,8 +155,9 @@ case "${gdbserver_host}" in
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
+- microblaze*-*-linux*) srv_regobj=microblaze-linux.o
++ microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
+ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
++ srv_xmlfiles="microblaze-linux.xml"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch
new file mode 100644
index 0000000..969ac2c
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0043-Binutils-security-check-is-causing-build-error-for-w.patch
@@ -0,0 +1,41 @@
+From 27c8f7f202ea66cd0f4745ca3a77b4f33b6f5990 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 11 Mar 2019 13:57:42 +0530
+Subject: [PATCH 43/52] Binutils security check is causing build error for
+ windows builds.commenting for now.
+
+---
+ bfd/elf-attrs.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
+index 070104c273..b135ac8f11 100644
+--- a/bfd/elf-attrs.c
++++ b/bfd/elf-attrs.c
+@@ -436,12 +436,15 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+ bfd_byte *p_end;
+ bfd_vma len;
+ const char *std_sec;
++#if 0
+ ufile_ptr filesize;
++#endif
+
+ /* PR 17512: file: 2844a11d. */
+ if (hdr->sh_size == 0)
+ return;
+
++#if 0
+ filesize = bfd_get_file_size (abfd);
+ if (filesize != 0 && hdr->sh_size > filesize)
+ {
+@@ -451,6 +454,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
+ bfd_set_error (bfd_error_invalid_operation);
+ return;
+ }
++#endif
+
+ contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
+ if (!contents)
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
new file mode 100644
index 0000000..48c9c2c
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
@@ -0,0 +1,146 @@
+From ba70b41346a8d5c9c1a4435f70edbb06e117564d Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Thu, 19 Dec 2019 12:22:04 +0530
+Subject: [PATCH 44/52] Correcting the register names from slr & shr to rslr &
+ rshr
+
+---
+ gdb/features/microblaze-core.xml | 4 ++--
+ gdb/features/microblaze-stack-protect.xml | 4 ++--
+ gdb/features/microblaze-with-stack-protect.c | 4 ++--
+ gdb/features/microblaze.c | 4 ++--
+ gdb/features/microblaze64-core.xml | 4 ++--
+ gdb/features/microblaze64-stack-protect.xml | 4 ++--
+ gdb/features/microblaze64-with-stack-protect.c | 4 ++--
+ gdb/features/microblaze64.c | 4 ++--
+ gdb/microblaze-tdep.c | 2 +-
+ 9 files changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
+index a87f0f2319..d1f2282fd1 100644
+--- a/gdb/features/microblaze-core.xml
++++ b/gdb/features/microblaze-core.xml
+@@ -64,6 +64,6 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
+- <reg name="slr" bitsize="32"/>
+- <reg name="shr" bitsize="32"/>
++ <reg name="rslr" bitsize="32"/>
++ <reg name="rshr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml
+index 1a67f88c18..1b16223406 100644
+--- a/gdb/features/microblaze-stack-protect.xml
++++ b/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+- <reg name="slr" bitsize="32"/>
+- <reg name="shr" bitsize="32"/>
++ <reg name="rslr" bitsize="32"/>
++ <reg name="rshr" bitsize="32"/>
+ </feature>
+diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
+index 609934e2b4..ab162fd258 100644
+--- a/gdb/features/microblaze-with-stack-protect.c
++++ b/gdb/features/microblaze-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
+
+ tdesc_microblaze_with_stack_protect = result;
+ }
+diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
+index ceb98ca8b8..7919ac96e6 100644
+--- a/gdb/features/microblaze.c
++++ b/gdb/features/microblaze.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze = result;
+ }
+diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
+index 96e99e2fb2..b9adadfade 100644
+--- a/gdb/features/microblaze64-core.xml
++++ b/gdb/features/microblaze64-core.xml
+@@ -64,6 +64,6 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
+- <reg name="slr" bitsize="64"/>
+- <reg name="shr" bitsize="64"/>
++ <reg name="rslr" bitsize="64"/>
++ <reg name="rshr" bitsize="64"/>
+ </feature>
+diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
+index 1bbf5fc3ce..9d7ea8b9fd 100644
+--- a/gdb/features/microblaze64-stack-protect.xml
++++ b/gdb/features/microblaze64-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze64.stack-protect">
+- <reg name="slr" bitsize="64"/>
+- <reg name="shr" bitsize="64"/>
++ <reg name="rslr" bitsize="64"/>
++ <reg name="rshr" bitsize="64"/>
+ </feature>
+diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
+index f448c9a749..249cb534da 100644
+--- a/gdb/features/microblaze64-with-stack-protect.c
++++ b/gdb/features/microblaze64-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack_protect (void)
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64_with_stack_protect = result;
+ }
+diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
+index 1aa37c4512..5d3e2c8cd9 100644
+--- a/gdb/features/microblaze64.c
++++ b/gdb/features/microblaze64.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64 = result;
+ }
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index f4ea3cc342..041ebf1fca 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -77,7 +77,7 @@ static const char *microblaze_register_names[] =
+ "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+ "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+ "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+- "slr", "shr"
++ "rslr", "rshr"
+ };
+
+ #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
new file mode 100644
index 0000000..46124c1
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
@@ -0,0 +1,24 @@
+From 5fac707a9894ec9d0fcac14bbf0eb3ff631d0499 Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Fri, 17 Jan 2020 15:45:48 +0530
+Subject: [PATCH 45/52] Removing the header "gdb_assert.h" from MB target file
+
+---
+ gdb/microblaze-linux-tdep.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
+index a37c4c86f4..68e73d2e56 100644
+--- a/gdb/microblaze-linux-tdep.c
++++ b/gdb/microblaze-linux-tdep.c
+@@ -37,7 +37,6 @@
+ #include "linux-tdep.h"
+ #include "glibc-tdep.h"
+
+-#include "gdb_assert.h"
+
+ #ifndef REGSET_H
+ #define REGSET_H 1
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
new file mode 100644
index 0000000..46d51dd
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
@@ -0,0 +1,39 @@
+From 1751b6fbc3170d29a3e2873b4394d058f8cb7d36 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 10:08:53 -0800
+Subject: [PATCH 46/52] bfd/cpu-microblaze.c: Enhance disassembler
+
+See commit aebcfb76fc165795e67917cb67cf985c4dfdc577 for why this is needed.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/cpu-microblaze.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
+index f3e8bbda75..f3501df0e2 100644
+--- a/bfd/cpu-microblaze.c
++++ b/bfd/cpu-microblaze.c
+@@ -39,7 +39,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
+- &bfd_microblaze_arch[1] /* Next in list. */
++ &bfd_microblaze_arch[1], /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+ },
+ {
+ 32, /* Bits in a word. */
+@@ -71,7 +72,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
+- &bfd_microblaze_arch[1] /* Next in list. */
++ &bfd_microblaze_arch[1], /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+ },
+ {
+ 64, /* 32 bits in a word. */
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
new file mode 100644
index 0000000..3bc5f04
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
@@ -0,0 +1,87 @@
+From 4500a281317093e78b7029e3dcb0037e7c628347 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:02:11 -0800
+Subject: [PATCH 47/52] bfd/elf64-microblaze.c: Fix build failures
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 338f16eeee..cf84e0db4e 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1572,7 +1572,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ {
+ BFD_FAIL ();
+ (*_bfd_error_handler)
+- (_("%B: probably compiled without -fPIC?"),
++ (_("%pB: probably compiled without -fPIC?"),
+ input_bfd);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+@@ -2691,7 +2691,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+ /* If this is a global symbol, we count the number of
+ relocations we need for this symbol. */
+ if (h != NULL)
+- head = &h->dyn_relocs;
++ head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
+ else
+ {
+ /* Track dynamic relocs needed for local syms too.
+@@ -2911,7 +2911,7 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
+
+ /* If we didn't find any dynamic relocs in read-only sections, then
+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */
+- if (!_bfd_elf_readonly_dynrelocs (h))
++ if (p == NULL)
+ {
+ h->non_got_ref = 0;
+ return TRUE;
+@@ -3096,7 +3096,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+ else
+ h->got.offset = (bfd_vma) -1;
+
+- if (h->dyn_relocs == NULL)
++ if (eh->dyn_relocs == NULL)
+ return TRUE;
+
+ /* In the shared -Bsymbolic case, discard space allocated for
+@@ -3113,7 +3113,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+ {
+ struct elf64_mb_dyn_relocs **pp;
+
+- for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
++ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
+ {
+ p->count -= p->pc_count;
+ p->pc_count = 0;
+@@ -3124,7 +3124,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+ }
+ }
+ else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
+- h->dyn_relocs = NULL;
++ eh->dyn_relocs = NULL;
+ }
+ else
+ {
+@@ -3154,13 +3154,13 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat)
+ goto keep;
+ }
+
+- h->dyn_relocs = NULL;
++ eh->dyn_relocs = NULL;
+
+ keep: ;
+ }
+
+ /* Finally, allocate space. */
+- for (p = h->dyn_relocs; p != NULL; p = p->next)
++ for (p = eh->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *sreloc = elf_section_data (p->sec)->sreloc;
+ sreloc->size += p->count * sizeof (Elf64_External_Rela);
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
new file mode 100644
index 0000000..7feaceb
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
@@ -0,0 +1,75 @@
+From 2f07425ca330dd357c374acdc30a27c6647454c9 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:23:26 -0800
+Subject: [PATCH 48/52] bfd/elf*-microblaze.c: Remove obsolete entries
+
+Replace microblaze_elf_merge_private_bfd_data with a direct call to
+_bfd_generic_verify_endian_match, this simplifies the implementation.
+
+Remove microblaze_elf_gc_sweep_hook, removed in 2017.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 29 +----------------------------
+ 1 file changed, 1 insertion(+), 28 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index cf84e0db4e..786f659232 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1690,21 +1690,6 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ return ret;
+ }
+
+-/* Merge backend specific data from an object file to the output
+- object file when linking.
+-
+- Note: We only use this hook to catch endian mismatches. */
+-static bfd_boolean
+-microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+-{
+- /* Check if we have the same endianess. */
+- if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+- return FALSE;
+-
+- return TRUE;
+-}
+-
+-
+ /* Calculate fixup value for reference. */
+
+ static int
+@@ -2427,17 +2412,6 @@ microblaze_elf_gc_mark_hook (asection *sec,
+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
+ }
+
+-/* Update the got entry reference counts for the section being removed. */
+-
+-static bfd_boolean
+-microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
+- struct bfd_link_info * info ATTRIBUTE_UNUSED,
+- asection * sec ATTRIBUTE_UNUSED,
+- const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
+-{
+- return TRUE;
+-}
+-
+ /* PIC support. */
+
+ #define PLT_ENTRY_SIZE 16
+@@ -3704,11 +3678,10 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
+ #define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name
+ #define elf_backend_relocate_section microblaze_elf_relocate_section
+ #define bfd_elf64_bfd_relax_section microblaze_elf_relax_section
+-#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match
+ #define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup
+
+ #define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook
+-#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook
+ #define elf_backend_check_relocs microblaze_elf_check_relocs
+ #define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol
+ #define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
new file mode 100644
index 0000000..5f4a271
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
@@ -0,0 +1,45 @@
+From a86506136a738c3ab64d42a876fbfdfa1d46ad64 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:02:25 -0800
+Subject: [PATCH 49/52] bfd/elf64-microblaze.c: Resolve various compiler
+ warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
+index 786f659232..70cd80cdf2 100644
+--- a/bfd/elf64-microblaze.c
++++ b/bfd/elf64-microblaze.c
+@@ -1258,6 +1258,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+ goto dogot;
+ case (int) R_MICROBLAZE_TLSLD:
+ tls_type = (TLS_TLS | TLS_LD);
++ /* Fall through. */
+ dogot:
+ case (int) R_MICROBLAZE_GOT_64:
+ {
+@@ -2569,6 +2570,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+ tls_type |= (TLS_TLS | TLS_LD);
+ dogottls:
+ sec->has_tls_reloc = 1;
++ /* Fall through. */
+ case R_MICROBLAZE_GOT_64:
+ if (htab->sgot == NULL)
+ {
+@@ -2802,10 +2804,8 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
+ struct elf64_mb_link_hash_table *htab;
+ struct elf64_mb_link_hash_entry * eh;
+ struct elf64_mb_dyn_relocs *p;
+- asection *sdynbss;
+ asection *s, *srel;
+ unsigned int power_of_two;
+- bfd *dynobj;
+
+ htab = elf64_mb_hash_table (info);
+ if (htab == NULL)
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
new file mode 100644
index 0000000..475a53b
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
@@ -0,0 +1,37 @@
+From de38a354e40a9dcc486c93faf02bee4b059fa34a Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:30:09 -0800
+Subject: [PATCH 50/52] opcodes/microblaze-dis.c: Fix compile warnings
+
+Two compiler warnings were evident, it appears both are likely real bugs.
+
+Missing type declaration for a function, and a case statement without a break.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ opcodes/microblaze-dis.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
+index 90d2328659..f1c33dca14 100644
+--- a/opcodes/microblaze-dis.c
++++ b/opcodes/microblaze-dis.c
+@@ -130,6 +130,7 @@ get_field_imm15 (struct string_buf *buf, long instr)
+ return p;
+ }
+
++static char *
+ get_field_imm16 (struct string_buf *buf, long instr)
+ {
+ char *p = strbuf (buf);
+@@ -329,6 +330,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
+ /* TODO: Also print symbol */
++ break;
+ case INST_TYPE_RD_R1_IMMS:
+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1(&buf, inst), get_field_imms (&buf, inst));
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
new file mode 100644
index 0000000..263f0a9
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
@@ -0,0 +1,99 @@
+From f1686db8735972637d2bbcc6e2fbf391c1e848d9 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 14:51:37 -0800
+Subject: [PATCH 51/52] gdb/microblaze-tdep.c: Remove unused functions
+
+Compiler warns the removed functions are not referenced anywhere.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ gdb/microblaze-tdep.c | 45 -------------------------------------------
+ 1 file changed, 45 deletions(-)
+
+diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
+index 041ebf1fca..28f79f9ffc 100644
+--- a/gdb/microblaze-tdep.c
++++ b/gdb/microblaze-tdep.c
+@@ -140,14 +140,6 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+-static CORE_ADDR
+-microblaze_store_arguments (struct regcache *regcache, int nargs,
+- struct value **args, CORE_ADDR sp,
+- int struct_return, CORE_ADDR struct_addr)
+-{
+- error (_("store_arguments not implemented"));
+- return sp;
+-}
+ #if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -555,12 +547,6 @@ microblaze_frame_base_address (struct frame_info *next_frame,
+ return cache->base;
+ }
+
+-static const struct frame_unwind *
+-microblaze_frame_sniffer (struct frame_info *next_frame)
+-{
+- return µblaze_frame_unwind;
+-}
+-
+ static const struct frame_base microblaze_frame_base =
+ {
+ µblaze_frame_unwind,
+@@ -759,12 +745,6 @@ microblaze_software_single_step (struct regcache *regcache)
+ }
+ #endif
+
+-static void
+-microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
+-{
+- regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
+-}
+-
+ static int dwarf2_to_reg_map[78] =
+ { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
+ 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
+@@ -796,19 +776,6 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
+ return -1;
+ }
+
+-static void
+-microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+-{
+-
+- register_remote_g_packet_guess (gdbarch,
+- 4 * MICROBLAZE_NUM_REGS,
+- tdesc_microblaze64);
+-
+- register_remote_g_packet_guess (gdbarch,
+- 4 * MICROBLAZE_NUM_REGS,
+- tdesc_microblaze64_with_stack_protect);
+-}
+-
+ void
+ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ struct regcache *regcache,
+@@ -873,18 +840,6 @@ microblaze_regset_from_core_section (struct gdbarch *gdbarch,
+ }
+
+
+-static void
+-make_regs (struct gdbarch *arch)
+-{
+- struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
+- int mach = gdbarch_bfd_arch_info (arch)->mach;
+-
+- if (mach == bfd_mach_microblaze64)
+- {
+- set_gdbarch_ptr_bit (arch, 64);
+- }
+-}
+-
+ static struct gdbarch *
+ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0052-sim-Allow-microblaze-architecture.patch
similarity index 80%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0052-sim-Allow-microblaze-architecture.patch
index 9671968..ee5caf0 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0001-sim-Allow-microblaze-architecture.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0052-sim-Allow-microblaze-architecture.patch
@@ -1,7 +1,7 @@
-From 501b60af6b36fc69987e1610645742f5593a6da2 Mon Sep 17 00:00:00 2001
+From 5fa859e73662f96c9cfaf21bd2cf01b92afc9c1c Mon Sep 17 00:00:00 2001
From: Mark Hatle <mark.hatle@kernel.crashing.org>
Date: Thu, 6 Aug 2020 15:37:52 -0500
-Subject: [PATCH 01/40] sim: Allow microblaze* architecture
+Subject: [PATCH 52/52] sim: Allow microblaze* architecture
Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
---
@@ -10,7 +10,7 @@
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sim/configure b/sim/configure
-index 72f95cd5c7a..9e28cc78687 100755
+index 72f95cd5c7..9e28cc7868 100755
--- a/sim/configure
+++ b/sim/configure
@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
@@ -23,7 +23,7 @@
sim_arch=microblaze
subdirs="$subdirs microblaze"
diff --git a/sim/configure.tgt b/sim/configure.tgt
-index 8a8e03d96f4..f6743fe8d41 100644
+index 8a8e03d96f..f6743fe8d4 100644
--- a/sim/configure.tgt
+++ b/sim/configure.tgt
@@ -59,7 +59,7 @@ case "${target}" in
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0053-gdb-Fix-microblaze-target-compilation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0053-gdb-Fix-microblaze-target-compilation.patch
new file mode 100644
index 0000000..af0e326
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0053-gdb-Fix-microblaze-target-compilation.patch
@@ -0,0 +1,288 @@
+From efa3750ffda1ae16caf071b8b8ea31f752a3324a Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Mon, 7 Dec 2020 12:03:25 -0600
+Subject: [PATCH] gdb: Fix microblaze target compilation
+
+Add microblaze-linux-nat.c to configure.nat
+
+Transition microblaze-linux-nat.c to use the new gdb C++ style functions.
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ gdb/configure.nat | 5 ++
+ gdb/microblaze-linux-nat.c | 96 ++++++++++++++------------------------
+ gdb/microblaze-tdep.h | 3 ++
+ 3 files changed, 43 insertions(+), 61 deletions(-)
+
+diff --git a/gdb/configure.nat b/gdb/configure.nat
+index 6ea2583495..1fba80f6c9 100644
+--- a/gdb/configure.nat
++++ b/gdb/configure.nat
+@@ -261,6 +261,11 @@ case ${gdb_host} in
+ # Host: Motorola m68k running GNU/Linux.
+ NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o"
+ ;;
++ microblaze)
++ # Host: Microblaze running GNU/Linux.
++ NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o"
++ NAT_CDEPS=
++ ;;
+ mips)
+ # Host: Linux/MIPS
+ NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
+diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
+index e9b8c9c522..bac4697e1e 100644
+--- a/gdb/microblaze-linux-nat.c
++++ b/gdb/microblaze-linux-nat.c
+@@ -36,13 +36,14 @@
+ #include "dwarf2-frame.h"
+ #include "osabi.h"
+
+-#include "gdb_assert.h"
+-#include "gdb_string.h"
++#include "gdbsupport/gdb_assert.h"
++#include <string.h>
+ #include "target-descriptions.h"
+ #include "opcodes/microblaze-opcm.h"
+ #include "opcodes/microblaze-dis.h"
+
+ #include "linux-nat.h"
++#include "linux-tdep.h"
+ #include "target-descriptions.h"
+
+ #include <sys/user.h>
+@@ -61,22 +62,17 @@
+ /* Defines ps_err_e, struct ps_prochandle. */
+ #include "gdb_proc_service.h"
+
+-/* On GNU/Linux, threads are implemented as pseudo-processes, in which
+- case we may be tracing more than one process at a time. In that
+- case, inferior_ptid will contain the main process ID and the
+- individual thread (process) ID. get_thread_id () is used to get
+- the thread id if it's available, and the process id otherwise. */
+-
+-int
+-get_thread_id (ptid_t ptid)
++class microblaze_linux_nat_target final : public linux_nat_target
+ {
+- int tid = TIDGET (ptid);
+- if (0 == tid)
+- tid = PIDGET (ptid);
+- return tid;
+-}
++public:
++ /* Add our register access methods. */
++ void fetch_registers (struct regcache *, int) override;
++ void store_registers (struct regcache *, int) override;
++
++ const struct target_desc *read_description () override;
++};
+
+-#define GET_THREAD_ID(PTID) get_thread_id (PTID)
++static microblaze_linux_nat_target the_microblaze_linux_nat_target;
+
+ /* Non-zero if our kernel may support the PTRACE_GETREGS and
+ PTRACE_SETREGS requests, for reading and writing the
+@@ -88,7 +84,6 @@ static int
+ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
+ {
+ int u_addr = -1;
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
+ interface, and not the wordsize of the program's ABI. */
+ int wordsize = sizeof (long);
+@@ -105,18 +100,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
+ static void
+ fetch_register (struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++ struct gdbarch *gdbarch = regcache->arch ();
+ /* This isn't really an address. But ptrace thinks of it as one. */
+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
+ int bytes_transferred;
+- unsigned int offset; /* Offset of registers within the u area. */
+- char buf[MAX_REGISTER_SIZE];
++ char buf[MICROBLAZE_MAX_REGISTER_SIZE];
+
+ if (regaddr == -1)
+ {
+ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */
+- regcache_raw_supply (regcache, regno, buf);
++ regcache->raw_supply (regno, buf);
+ return;
+ }
+
+@@ -149,14 +142,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
+ {
+ /* Little-endian values are always found at the left end of the
+ bytes transferred. */
+- regcache_raw_supply (regcache, regno, buf);
++ regcache->raw_supply (regno, buf);
+ }
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ {
+ /* Big-endian values are found at the right end of the bytes
+ transferred. */
+ size_t padding = (bytes_transferred - register_size (gdbarch, regno));
+- regcache_raw_supply (regcache, regno, buf + padding);
++ regcache->raw_supply (regno, buf + padding);
+ }
+ else
+ internal_error (__FILE__, __LINE__,
+@@ -175,8 +168,6 @@ fetch_register (struct regcache *regcache, int tid, int regno)
+ static int
+ fetch_all_gp_regs (struct regcache *regcache, int tid)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_gregset_t gregset;
+
+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
+@@ -204,8 +195,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid)
+ static void
+ fetch_gp_regs (struct regcache *regcache, int tid)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ if (have_ptrace_getsetregs)
+@@ -223,13 +212,12 @@ fetch_gp_regs (struct regcache *regcache, int tid)
+ static void
+ store_register (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++ struct gdbarch *gdbarch = regcache->arch ();
+ /* This isn't really an address. But ptrace thinks of it as one. */
+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
+ int i;
+ size_t bytes_to_transfer;
+- char buf[MAX_REGISTER_SIZE];
++ char buf[MICROBLAZE_MAX_REGISTER_SIZE];
+
+ if (regaddr == -1)
+ return;
+@@ -242,13 +230,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
+ {
+ /* Little-endian values always sit at the left end of the buffer. */
+- regcache_raw_collect (regcache, regno, buf);
++ regcache->raw_collect (regno, buf);
+ }
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ {
+ /* Big-endian values sit at the right end of the buffer. */
+ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
+- regcache_raw_collect (regcache, regno, buf + padding);
++ regcache->raw_collect (regno, buf + padding);
+ }
+
+ for (i = 0; i < bytes_to_transfer; i += sizeof (long))
+@@ -281,8 +269,6 @@ store_register (const struct regcache *regcache, int tid, int regno)
+ static int
+ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_gregset_t gregset;
+
+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
+@@ -319,8 +305,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
+ static void
+ store_gp_regs (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ if (have_ptrace_getsetregs)
+@@ -339,12 +323,12 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno)
+ regno == -1, otherwise fetch all general registers or all floating
+ point registers depending upon the value of regno. */
+
+-static void
+-microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
+- struct regcache *regcache, int regno)
++void
++microblaze_linux_nat_target::fetch_registers (struct regcache * regcache,
++ int regno)
+ {
+ /* Get the thread id for the ptrace call. */
+- int tid = GET_THREAD_ID (inferior_ptid);
++ int tid = regcache->ptid ().lwp ();
+
+ if (regno == -1)
+ fetch_gp_regs (regcache, tid);
+@@ -356,12 +340,12 @@ microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
+ regno == -1, otherwise store all general registers or all floating
+ point registers depending upon the value of regno. */
+
+-static void
+-microblaze_linux_store_inferior_registers (struct target_ops *ops,
+- struct regcache *regcache, int regno)
++void
++microblaze_linux_nat_target::store_registers (struct regcache *regcache,
++ int regno)
+ {
+ /* Get the thread id for the ptrace call. */
+- int tid = GET_THREAD_ID (inferior_ptid);
++ int tid = regcache->ptid ().lwp ();
+
+ if (regno >= 0)
+ store_register (regcache, tid, regno);
+@@ -398,12 +382,12 @@ supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
+ /* FIXME. */
+ }
+
+-static const struct target_desc *
+-microblaze_linux_read_description (struct target_ops *ops)
++const struct target_desc *
++microblaze_linux_nat_target::read_description ()
+ {
+- CORE_ADDR microblaze_hwcap = 0;
++ CORE_ADDR microblaze_hwcap = linux_get_hwcap (this);
+
+- if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1)
++ if (microblaze_hwcap != 1)
+ return NULL;
+
+ return NULL;
+@@ -415,17 +399,7 @@ void _initialize_microblaze_linux_nat (void);
+ void
+ _initialize_microblaze_linux_nat (void)
+ {
+- struct target_ops *t;
+-
+- /* Fill in the generic GNU/Linux methods. */
+- t = linux_target ();
+-
+- /* Add our register access methods. */
+- t->to_fetch_registers = microblaze_linux_fetch_inferior_registers;
+- t->to_store_registers = microblaze_linux_store_inferior_registers;
+-
+- t->to_read_description = microblaze_linux_read_description;
+-
+ /* Register the target. */
+- linux_nat_add_target (t);
++ linux_target = &the_microblaze_linux_nat_target;
++ add_inf_child_target (&the_microblaze_linux_nat_target);
+ }
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index c0fc900733..c777d93a95 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -106,6 +106,9 @@ enum microblaze_regnum
+ MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS
+ };
+
++/* Big enough to hold the size of the largest register in bytes. */
++#define MICROBLAZE_MAX_REGISTER_SIZE 64
++
+ struct microblaze_frame_cache
+ {
+ /* Base address. */
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
index af5a65c..e0f7b12 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch
@@ -1,26 +1,32 @@
-From d2ebb14b318166dd91fe35bf3531d758dcbc995a Mon Sep 17 00:00:00 2001
+From e3f148dff6d6d926d1f39802f54abd59bd9e887c Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 11 Jan 2017 13:13:57 +0530
-Subject: [PATCH 01/58] [LOCAL]: Testsuite - builtins tests require fpic
+Subject: [PATCH 01/54] LOCAL]: Testsuite - builtins tests require fpic
+ Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+Conflicts:
+
+ gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
---
- gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 5 +++++
- 1 file changed, 5 insertions(+)
+ gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 8 ++++++++
+ 1 file changed, 8 insertions(+)
diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index 594c9297958..4103d43748d 100644
+index 594c9297958..8350d9401d2 100644
--- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-@@ -48,6 +48,11 @@ if { [istarget *-*-eabi*]
+@@ -48,6 +48,14 @@ if { [istarget *-*-eabi*]
lappend additional_flags "-Wl,--allow-multiple-definition"
}
++<<<<<<< HEAD
++=======
+if [istarget "microblaze*-*-linux*"] {
+ lappend additional_flags "-Wl,-zmuldefs"
+ lappend additional_flags "-fPIC"
+}
+
++>>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic
foreach src [lsort [find $srcdir/$subdir *.c]] {
if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
c-torture-execute [list $src \
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
index 976896d..431dc7e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch
@@ -1,11 +1,10 @@
-From 54394232ffbaa9474f8a78c6882f08a48842242e Mon Sep 17 00:00:00 2001
+From bef1a4116efded9972e693ded5152f1d8670862e Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 11 Jan 2017 14:31:10 +0530
-Subject: [PATCH 02/58] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C
-
-This particular testcase fails with a timeout. Instead, fail it
-at compile-time for microblaze. This speeds up the testsuite without
-removing it from the FAIL reports.
+Subject: [PATCH 02/54] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This
+ particular testcase fails with a timeout. Instead, fail it at compile-time
+ for microblaze. This speeds up the testsuite without removing it from the
+ FAIL reports.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
new file mode 100644
index 0000000..a2dc7cc
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
@@ -0,0 +1,35 @@
+From a063597f875142af49003e2f28b6c0f56e3b914d Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Wed, 11 Jan 2017 15:46:28 +0530
+Subject: [PATCH 03/54] [LOCAL]: For dejagnu static testing on qemu, suppress
+ warnings about multiple definitions from the test function and libc in line
+ with method used by powerpc. Dynamic linking and using a qemu binary which
+ understands sysroot resolves all test failures with builtins
+
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+---
+ gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
+index 8350d9401d2..d7c9b281d01 100644
+--- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
++++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
+@@ -48,14 +48,10 @@ if { [istarget *-*-eabi*]
+ lappend additional_flags "-Wl,--allow-multiple-definition"
+ }
+
+-<<<<<<< HEAD
+-=======
+ if [istarget "microblaze*-*-linux*"] {
+ lappend additional_flags "-Wl,-zmuldefs"
+- lappend additional_flags "-fPIC"
+ }
+
+->>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic
+ foreach src [lsort [find $srcdir/$subdir *.c]] {
+ if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} {
+ c-torture-execute [list $src \
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch
deleted file mode 100644
index 8e6d22d..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From f0a446bcb453630d8116b30f542aee79407228ea Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 11 Jan 2017 15:28:38 +0530
-Subject: [PATCH 03/58] [LOCAL]: Testsuite - explicitly add -fivopts for tests
- that depend on it
-
-(test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt exist in 4.6 branch)
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
----
- gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +-
- gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 2 +-
- gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +-
- 8 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-index 438db882043..ede883eb284 100644
---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
-@@ -1,5 +1,5 @@
- /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
--/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
-+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */
-
- void test (int *b, int *e, int stride)
- {
-diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-index cbb6c850baa..34248021c23 100644
---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
-@@ -1,5 +1,5 @@
- // { dg-do compile }
--// { dg-options "-O2 -fdump-tree-ivopts-details" }
-+// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" }
-
- class MinimalVec3
- {
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-index bda25167353..22c8a5dcffe 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
-@@ -1,7 +1,7 @@
- /* A test for strength reduction and induction variable elimination. */
-
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
- /* { dg-require-effective-target size32plus } */
-
- /* Size of this structure should be sufficiently weird so that no memory
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-index f0770abdbbc..65d74c8e620 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
-@@ -1,7 +1,7 @@
- /* A test for strength reduction and induction variable elimination. */
-
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
- /* { dg-require-effective-target size32plus } */
-
- /* Size of this structure should be sufficiently weird so that no memory
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-index 5f42857fe13..9bc86ee0d23 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
-@@ -1,7 +1,7 @@
- /* A test for induction variable merging. */
-
- /* { dg-do compile } */
--/* { dg-options "-O1 -fdump-tree-optimized" } */
-+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */
-
- void foo(long);
-
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-index 50d86a00485..1e3eacd33d1 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-O2 -fopt-info-loop-missed" } */
-+/* { dg-options "-O2 -fivopts -fopt-info-loop-missed" } */
- extern void g(void);
-
- void
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-index 2c6cfc6f831..648e6e67e80 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-O2 -fdump-tree-ivopts" } */
-+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */
-
- void vnum_test8(int *data)
- {
-diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-index e911bfcd521..5d3e7e0801a 100644
---- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
-@@ -1,5 +1,5 @@
- /* { dg-do compile } */
--/* { dg-options "-Os -fdump-tree-optimized" } */
-+/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */
-
- /* Slightly changed testcase from PR middle-end/40815. */
- void bar(char*, char*, int);
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
deleted file mode 100644
index 4974462..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From f8809fdebc3ef3927695c84224d3446fa13447d6 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 11 Jan 2017 15:46:28 +0530
-Subject: [PATCH 04/58] [LOCAL]: For dejagnu static testing on qemu, suppress
- warnings
-
-about multiple definitions from the test function and libc in line
-with method used by powerpc. Dynamic linking and using a qemu binary
-which understands sysroot resolves all test failures with builtins
-
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-index 4103d43748d..d7c9b281d01 100644
---- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp
-@@ -50,7 +50,6 @@ if { [istarget *-*-eabi*]
-
- if [istarget "microblaze*-*-linux*"] {
- lappend additional_flags "-Wl,-zmuldefs"
-- lappend additional_flags "-fPIC"
- }
-
- foreach src [lsort [find $srcdir/$subdir *.c]] {
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
similarity index 79%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
index c21492e..661417d 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch
@@ -1,8 +1,8 @@
-From 802078fa3e76ea7fdb29f3baf1d4d9baae42bc0b Mon Sep 17 00:00:00 2001
+From c1028bcb40ccd8d61afc1ab798198948fbf74aa0 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 11 Jan 2017 15:50:35 +0530
-Subject: [PATCH 05/58] [Patch, testsuite]: Add MicroBlaze to target-supports
- for atomic builtin tests
+Subject: [PATCH 04/54] [Patch, testsuite]: Add MicroBlaze to target-supports
+ for atomic buil. .tin tests
MicroBlaze added to supported targets for atomic builtin tests.
@@ -19,10 +19,10 @@
1 file changed, 1 insertion(+)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index 13761491e63..d2f65dac32c 100644
+index 0dfe3ae0651..86caf6db9a9 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
-@@ -7581,6 +7581,7 @@ proc check_effective_target_sync_int_long { } {
+@@ -7468,6 +7468,7 @@ proc check_effective_target_sync_int_long { } {
&& [check_effective_target_arm_acq_rel])
|| [istarget bfin*-*linux*]
|| [istarget hppa*-*linux*]
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch
index 9c8cce9..d34988c 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch
@@ -1,9 +1,8 @@
-From 8c24cb4f95f46793ac7500a5d6181d93f2b0d2c5 Mon Sep 17 00:00:00 2001
+From ae5ce07a67df89dabba61414ba7dabbdabc1ee1b Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 11 Jan 2017 16:20:01 +0530
-Subject: [PATCH 06/58] [Patch, testsuite]: Update MicroBlaze strings test
-
-for new scan-assembly output resulting in use of $LC label
+Subject: [PATCH 05/54] [Patch, testsuite]: Update MicroBlaze strings test for
+ new scan-assembly output resulting in use of $LC label
ChangeLog/testsuite
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
similarity index 91%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
index 4d1e201..4b45fcf 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch
@@ -1,11 +1,9 @@
-From 38ece4b2dc5d34c1b88b6ea8dd8e62a0986f8f6c Mon Sep 17 00:00:00 2001
+From 49cf9cd3fedce80a63e9d03d42482dd4596c27a7 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:14:15 +0530
-Subject: [PATCH 07/58] [Patch, testsuite]: Allow MicroBlaze .weakext pattern
- in regex match
-
-Extend regex pattern to include optional ext at the end of
-.weak to match the MicroBlaze weak label .weakext
+Subject: [PATCH 06/54] [Patch, testsuite]: Allow MicroBlaze .weakext pattern
+ in regex match Extend regex pattern to include optional ext at the end of
+ .weak to match the MicroBlaze weak label .weakext
ChangeLog/testsuite
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
similarity index 69%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
index f96d7d5..8fa324a 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch
@@ -1,11 +1,10 @@
-From bc5f423bcfa24aa8c15548379bfc6b3f49e57c15 Mon Sep 17 00:00:00 2001
+From dc6cbb4e18a3f31441403146b8f159554c329897 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:34:27 +0530
-Subject: [PATCH 08/58] [Patch, testsuite]: Add MicroBlaze to
- check_profiling_available
-
-Testsuite, add microblaze*-*-* target in check_profiling_available
-inline with other archs setting profiling_available_saved to 0
+Subject: [PATCH 07/54] [Patch, testsuite]: Add MicroBlaze to
+ check_profiling_available Testsuite, add microblaze*-*-* target in
+ check_profiling_available inline with other archs setting
+ profiling_available_saved to 0
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
---
@@ -13,7 +12,7 @@
1 file changed, 1 insertion(+)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
-index d2f65dac32c..d949fbd8464 100644
+index 86caf6db9a9..cbd9024ece9 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -707,6 +707,7 @@ proc check_profiling_available { test_what } {
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-microblaze-Fix-atomic-side-effects.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-microblaze-Fix-atomic-side-effects.patch
index 45d93ce..1fa5572 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-side-effects.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0008-Patch-microblaze-Fix-atomic-side-effects.patch
@@ -1,12 +1,11 @@
-From eeeb8ecda7cb71c033c850ce36162c92c7d0b781 Mon Sep 17 00:00:00 2001
+From 602713d07d2e1b3a33a7f097baff270266aa4254 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:41:43 +0530
-Subject: [PATCH 09/58] [Patch, microblaze]: Fix atomic side effects.
-
-In atomic_compare_and_swapsi, add side effects to prevent incorrect
-assumptions during optimization. Previously, the outputs were
-considered unused; this generated assembly code with
-undefined side effects after invocation of the atomic.
+Subject: [PATCH 08/54] [Patch, microblaze]: Fix atomic side effects. In
+ atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions
+ during optimization. Previously, the outputs were considered unused; this
+ generated assembly code with undefined side effects after invocation of the
+ atomic.
Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch
similarity index 83%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch
index 48f7721..666d344 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch
@@ -1,11 +1,9 @@
-From 834448fc3493be56cc6a4f6b504569142f7f6070 Mon Sep 17 00:00:00 2001
+From d3d065c9645d795e03dab6db827c08231e011a1f Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:45:45 +0530
-Subject: [PATCH 10/58] [Patch, microblaze]: Fix atomic boolean return value.
-
-In atomic_compare_and_swapsi, fix boolean return value.
-Previously, it contained zero if successful and non-zero
-if unsuccessful.
+Subject: [PATCH 09/54] [Patch, microblaze]: Fix atomic boolean return value.
+ In atomic_compare_and_swapsi, fix boolean return value. Previously, it
+ contained zero if successful and non-zero if unsuccessful.
Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
similarity index 65%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
index e60e6f2..22bf521 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch
@@ -1,14 +1,13 @@
-From 19457459592123c41c3ce9e084e165525e4d7bb0 Mon Sep 17 00:00:00 2001
+From 8d9d1f457e1e270250d8a6700d4a1e1fa09465df Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:50:17 +0530
-Subject: [PATCH 11/58] [Patch, microblaze]: Fix the Microblaze crash with
- msmall-divides flag
-
-Compiler is crashing when we use msmall-divides and mxl-barrel-shift flag.
-This is because when use above flags microblaze_expand_divide function will be
-called for division operation. In microblaze_expand_divide function we are
-using sub_reg but MicroBlaze doesn't have subreg register due to this compiler
-was crashing. Changed the logic to avoid sub_reg call
+Subject: [PATCH 10/54] [Patch, microblaze]: Fix the Microblaze crash with
+ msmall-divides flag Compiler is crashing when we use msmall-divides and
+ mxl-barrel-shift flag. This is because when use above flags
+ microblaze_expand_divide function will be called for division operation. In
+ microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't
+ have subreg register due to this compiler was crashing. Changed the logic to
+ avoid sub_reg call
Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
similarity index 81%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
index b9e3992..cce812b 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch
@@ -1,11 +1,10 @@
-From 9da28a01ffb778fc5cb5df27332cef21f890a63f Mon Sep 17 00:00:00 2001
+From 03429c91d1db134e1deda4c8e58bc0939d5fedf9 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 16:52:56 +0530
-Subject: [PATCH 12/58] [Patch, microblaze]: Added ashrsi3_with_size_opt
-
-Added ashrsi3_with_size_opt pattern to optimize the sra instructions
-when the -Os optimization is used. lshrsi3_with_size_opt is
-being removed as it has conflicts with unsigned int variables
+Subject: [PATCH 11/54] [Patch, microblaze]: Added ashrsi3_with_size_opt Added
+ ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os
+ optimization is used. lshrsi3_with_size_opt is being removed as it has
+ conflicts with unsigned int variables
Signed-off-by:Nagaraju Mekala <nmekala@xilix.com>
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch
similarity index 79%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch
index 36af265..e393f0f 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch
@@ -1,9 +1,9 @@
-From 07a5c8b22a1cef99b2d4570ea080c503260161e4 Mon Sep 17 00:00:00 2001
+From 6803fbc540db39865037994daa122cf10c0eb33a Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 10:57:19 +0530
-Subject: [PATCH 13/58] [Patch, microblaze]: Use bralid for profiler calls
+Subject: [PATCH 12/54] [Patch, microblaze]: Use bralid for profiler calls
+ Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
gcc/config/microblaze/microblaze.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Removed-moddi3-routinue.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Removed-moddi3-routinue.patch
index e7fb939..b601c98 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Removed-moddi3-routinue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0013-Patch-microblaze-Removed-moddi3-routinue.patch
@@ -1,14 +1,10 @@
-From c2a6652176751bc95e2f990179e90cfe58026feb Mon Sep 17 00:00:00 2001
+From 5de3888c460a341667150d569548b3309188e7e8 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Thu, 12 Jan 2017 17:36:16 +0530
-Subject: [PATCH 15/58] [Patch, microblaze]: Removed moddi3 routinue
-
-Using the default moddi3 function as the existing implementation has many bugs
+Subject: [PATCH 13/54] [Patch, microblaze]: Removed moddi3 routinue Using the
+ default moddi3 function as the existing implementation has many bugs
Signed-off-by:Nagaraju <nmekala@xilix.com>
-
-Conflicts:
- libgcc/config/microblaze/moddi3.S
---
libgcc/config/microblaze/moddi3.S | 121 --------------------------
libgcc/config/microblaze/t-microblaze | 3 +-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Add-INIT_PRIORITY-support.patch
similarity index 94%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Add-INIT_PRIORITY-support.patch
index 13c3ccd..3bd6efd 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Add-INIT_PRIORITY-support.patch
@@ -1,9 +1,8 @@
-From 9a4253a92a5e1811693ea1707b5fc272908ec556 Mon Sep 17 00:00:00 2001
+From b9a9e8f9d0994c76819ec605a0b7cd113f3b2cf0 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 14:41:58 +0530
-Subject: [PATCH 16/58] [Patch, microblaze]: Add INIT_PRIORITY support
-
-Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.
+Subject: [PATCH 14/54] [Patch, microblaze]: Add INIT_PRIORITY support Added
+ TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.
These macros allows users to control the order of initialization
of objects defined at namespace scope with the init_priority
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch
deleted file mode 100644
index 51563ec..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0014-Patch-microblaze-Disable-fivopts-by-default.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 616f16089f0b01ab02008d7291df0972a99782e0 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 11:10:21 +0530
-Subject: [PATCH 14/58] [Patch, microblaze]: Disable fivopts by default
-
-Turn off ivopts by default. Interferes with cse.
-
-Changelog
-
-2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com>
-
- * gcc/common/config/microblaze/microblaze-common.c
- (microblaze_option_optimization_table): Disable fivopts by default.
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- gcc/common/config/microblaze/microblaze-common.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index 4391f939626..0b9d5a1b453 100644
---- a/gcc/common/config/microblaze/microblaze-common.c
-+++ b/gcc/common/config/microblaze/microblaze-common.c
-@@ -24,6 +24,15 @@
- #include "common/common-target.h"
- #include "common/common-target-def.h"
-
-+/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
-+static const struct default_options microblaze_option_optimization_table[] =
-+ {
-+ /* Turn off ivopts by default. It messes up cse. */
-+ { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 },
-+ { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
-+ { OPT_LEVELS_NONE, 0, NULL, 0 }
-+ };
-+
- #undef TARGET_DEFAULT_TARGET_FLAGS
- #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
-
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Add-optimized-lshrsi3.patch
similarity index 90%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Add-optimized-lshrsi3.patch
index cfc06f7..ba20cf0 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Add-optimized-lshrsi3.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0015-Patch-microblaze-Add-optimized-lshrsi3.patch
@@ -1,11 +1,9 @@
-From 27c27a8876152bac78059a1b2d5a6f0ac9b8cee2 Mon Sep 17 00:00:00 2001
+From f448485f5e0507a7ab8be7f83c08f807200a3501 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 15:23:57 +0530
-Subject: [PATCH 17/58] [Patch, microblaze]: Add optimized lshrsi3
-
-When barrel shifter is not present, the immediate value
-is greater than #5 and optimization is -OS, the
-compiler will generate shift operation using loop.
+Subject: [PATCH 15/54] [Patch, microblaze]: Add optimized lshrsi3 When barrel
+ shifter is not present, the immediate value is greater than #5 and
+ optimization is -OS, the compiler will generate shift operation using loop.
Changelog
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-cbranchsi4_reg.patch
similarity index 94%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-cbranchsi4_reg.patch
index b78a981..0c86522 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Add-cbranchsi4_reg.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0016-Patch-microblaze-Add-cbranchsi4_reg.patch
@@ -1,11 +1,10 @@
-From f43cb8572131074c7ce43a1d39c7ba6c85611e18 Mon Sep 17 00:00:00 2001
+From 386b8dcef2d774e9138515814be0fd579ade5af5 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 17:04:37 +0530
-Subject: [PATCH 19/58] [Patch, microblaze]: Add cbranchsi4_reg
-
-This patch optimizes the generation of pcmpne/pcmpeq instruction if the
-compare instruction has no immediate values.For the immediate values the
-xor instruction is generated
+Subject: [PATCH 16/54] [Patch, microblaze]: Add cbranchsi4_reg This patch
+ optimizes the generation of pcmpne/pcmpeq instruction if the compare
+ instruction has no immediate values.For the immediate values the xor
+ instruction is generated
Signed-off-by: Nagaraju Mekala <nmekala@xilix.com>
Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com>
@@ -31,7 +30,7 @@
7 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 96f7bb67f6c..76ffc682df2 100644
+index 982b2abd2d4..c2f88813a8d 100644
--- a/gcc/config/microblaze/microblaze-protos.h
+++ b/gcc/config/microblaze/microblaze-protos.h
@@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *);
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
new file mode 100644
index 0000000..504083f
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
@@ -0,0 +1,58 @@
+From b6298861681965533c9b6dac5e26fbd62b52839d Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 17 Jan 2017 17:11:04 +0530
+Subject: [PATCH 17/54] [Patch,microblaze]: Inline Expansion of fsqrt builtin.
+ The changes are made in the patch for the inline expansion of the fsqrt
+ builtin with fqrt instruction. The sqrt math function takes double as
+ argument and return double as argument. The pattern is selected while
+ expanding the unary op through expand_unop which passes DFmode and the DFmode
+ pattern was not there returning zero. Thus the sqrt math function is not
+ inlined and expanded. The pattern with DFmode argument is added. Also the
+ source and destination argument is not same the DF through two different
+ consecutive registers with lower 32 bit is the argument passed to sqrt and
+ the higher 32 bit is zero. If the source and destinations are different the
+ DFmode 64 bits registers is not set properly giving the problem in runtime.
+ Such changes are taken care in the implementation of the pattern for DFmode
+ for inline expansion of the sqrt.
+
+ChangeLog:
+2015-06-16 Ajit Agarwal <ajitkum@xilinx.com>
+ Nagaraju Mekala <nmekala@xilinx.com>
+
+ * config/microblaze/microblaze.md (sqrtdf2): New
+ pattern.
+
+Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
+ Nagaraju Mekala nmekala@xilinx.com
+---
+ gcc/config/microblaze/microblaze.md | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
+index 8f9baec826b..986d9c3aa25 100644
+--- a/gcc/config/microblaze/microblaze.md
++++ b/gcc/config/microblaze/microblaze.md
+@@ -451,6 +451,20 @@
+ (set_attr "mode" "SF")
+ (set_attr "length" "4")])
+
++(define_insn "sqrtdf2"
++ [(set (match_operand:DF 0 "register_operand" "=d")
++ (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))]
++ "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT"
++ {
++ if (REGNO (operands[0]) == REGNO (operands[1]))
++ return "fsqrt\t%0,%1";
++ else
++ return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0";
++ }
++ [(set_attr "type" "fsqrt")
++ (set_attr "mode" "SF")
++ (set_attr "length" "4")])
++
+ (define_insn "fix_truncsfsi2"
+ [(set (match_operand:SI 0 "register_operand" "=d")
+ (fix:SI (match_operand:SF 1 "register_operand" "d")))]
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
similarity index 75%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
index 2e5afed..14095d8 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch
@@ -1,17 +1,14 @@
-From b066cb189302814fcd91b38f2f9da830a2c5b8fe Mon Sep 17 00:00:00 2001
+From a8c6c13cc322ecc300bb2cdf22e3d6f1680e56be Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 18:07:24 +0530
-Subject: [PATCH 22/58] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3'
- insn definitions
-
-Change adddi3 to handle DI immediates as the second operand, this
-requires modification to the output template however reduces the need to
-specify seperate templates for 16-bit positive/negative immediate
-operands. The use of 32-bit immediates for the addi and addic
-instructions is handled by the assembler, which will emit the imm
-instructions when required. This conveniently handles the optimizable
-cases where the immediate constant value does not need the higher half
-words of the operands upper/lower words.
+Subject: [PATCH 18/54] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3'
+ insn definitions Change adddi3 to handle DI immediates as the second operand,
+ this requires modification to the output template however reduces the need to
+ specify seperate templates for 16-bit positive/negative immediate operands.
+ The use of 32-bit immediates for the addi and addic instructions is handled
+ by the assembler, which will emit the imm instructions when required. This
+ conveniently handles the optimizable cases where the immediate constant value
+ does not need the higher half words of the operands upper/lower words.
Change the constraints of the subdi3 instruction definition such that it
does not match the second operand as an immediate value. This is because
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
similarity index 63%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
index fa16749..4a49011 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch
@@ -1,13 +1,11 @@
-From 98018d020d9fbae38ea19627dec64d03d7f21fac Mon Sep 17 00:00:00 2001
+From 3a9ee185eb462f880ceb4ddd125d4a98e0759873 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 17 Jan 2017 18:18:41 +0530
-Subject: [PATCH 23/58] [Patch, microblaze]: Update ashlsi3 & movsf patterns
-
-This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in
-print_operand of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay
-and movsf_internal patterns beacuse HOST_WIDE_INT_PRINT_HEX
-is generating 64-bit value which our instruction doesn't support
-so using gen_int_mode function
+Subject: [PATCH 19/54] [Patch, microblaze]: Update ashlsi3 & movsf patterns
+ This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand
+ of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal
+ patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our
+ instruction doesn't support so using gen_int_mode function
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
:Ajit Agarwal <ajitkum@xilinx.com>
@@ -24,9 +22,23 @@
updated the 'F' case to use "unsinged int" instead
of HOST_WIDE_INT_PRINT_HEX
---
+ gcc/config/microblaze/microblaze.c | 2 +-
gcc/config/microblaze/microblaze.md | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
+ 2 files changed, 9 insertions(+), 3 deletions(-)
+diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
+index 9eae5515c60..0a4619eec0c 100644
+--- a/gcc/config/microblaze/microblaze.c
++++ b/gcc/config/microblaze/microblaze.c
+@@ -2468,7 +2468,7 @@ print_operand (FILE * file, rtx op, int letter)
+ unsigned long value_long;
+ REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op),
+ value_long);
+- fprintf (file, "0x%lx", value_long);
++ fprintf (file, "0x%08x", (unsigned int) value_long);
+ }
+ else
+ {
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
index efd2c34e0b7..be8bbda2bfb 100644
--- a/gcc/config/microblaze/microblaze.md
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
similarity index 79%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
index 8e0eda3..07cf635 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch
@@ -1,61 +1,28 @@
-From 3f98e90620e0ae6d76a1ba18e97389feb095c3e4 Mon Sep 17 00:00:00 2001
+From bfdb38133201f7df01d09dc7e7ee3043a35c1d3e Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 19:50:34 +0530
-Subject: [PATCH 24/58] [Patch, microblaze]: 8-stage pipeline for microblaze
+Date: Mon, 9 Nov 2020 19:54:39 +0530
+Subject: [PATCH 20/54] [Patch, microblaze]: 8-stage pipeline for microblaze
This patch adds the support for the 8-stage pipeline. The new 8-stage
pipeline reduces the latencies of float & integer division drastically
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-ChangeLog:
-2016-01-18 Nagaraju Mekala <nmekala@xilix.com>
-
- *microblaze.md (define_automaton mbpipe_8): New
-
- *microblaze.c (microblaze_option_override): Update
- Updated the logic to generate only when MB version is 10.0
-
- *microblaze.h (pipeline_type): Update
- Update the enum with MICROBLAZE_PIPE_8
-
- *microblaze.opt (mxl-frequency): New
- New flag added for 8-stage pipeline
---
- gcc/config/microblaze/microblaze.c | 18 ++++++-
+ gcc/config/microblaze/microblaze.c | 11 ++++
gcc/config/microblaze/microblaze.h | 3 +-
gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++-
gcc/config/microblaze/microblaze.opt | 4 ++
- 4 files changed, 100 insertions(+), 4 deletions(-)
+ 4 files changed, 94 insertions(+), 3 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index a4bdf66f045..a3996119bd7 100644
+index 0a4619eec0c..0dc96e481b7 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay;
- /* Set to one if the targeted core has the CLZ insn. */
- int microblaze_has_clz = 0;
-
-+/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */
-+int microblaze_has_bitfield = 0;
-+
- /* Which CPU pipeline do we use. We haven't really standardized on a CPU
- version having only a particular type of pipeline. There can still be
- options on the CPU to scale pipeline features up or down. :(
-@@ -1739,7 +1742,7 @@ microblaze_option_override (void)
- register int i, start;
- register int regno;
- register machine_mode mode;
-- int ver;
-+ int ver,ver_int;
-
- microblaze_section_threshold = (global_options_set.x_g_switch_value
- ? g_switch_value
-@@ -1840,6 +1843,19 @@ microblaze_option_override (void)
+@@ -1840,6 +1840,17 @@ microblaze_option_override (void)
"%<-mcpu=v8.30.a%>");
TARGET_REORDER = 0;
}
-+ ver = ver_int - microblaze_version_to_int("v10.0");
++ ver = microblaze_version_to_int("v10.0");
+ if (ver < 0)
+ {
+ if (TARGET_AREA_OPTIMIZED_2)
@@ -65,14 +32,12 @@
+ {
+ if (TARGET_AREA_OPTIMIZED_2)
+ microblaze_pipe = MICROBLAZE_PIPE_8;
-+ if (TARGET_BARREL_SHIFT)
-+ microblaze_has_bitfield = 1;
+ }
if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>");
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 1e155e4041c..8b0db2c1718 100644
+index 8aa3f155790..8a668278337 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -27,7 +27,8 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
deleted file mode 100644
index cc1c3d7..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 1bbf48097cf2da98e03139b499a5a74bc68e6abc Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 17:11:04 +0530
-Subject: [PATCH 20/58] [Patch,microblaze]: Inline Expansion of fsqrt builtin.
-
-The changes are made in the patch for the inline expansion of
-the fsqrt builtin with fqrt instruction. The sqrt math function
-takes double as argument and return double as argument. The
-pattern is selected while expanding the unary op through
-expand_unop which passes DFmode and the DFmode pattern was
-not there returning zero. Thus the sqrt math function is not
-inlined and expanded. The pattern with DFmode argument is added.
-Also the source and destination argument is not same the DF
-through two different consecutive registers with lower 32 bit
-is the argument passed to sqrt and the higher 32 bit is zero.
-If the source and destinations are different the DFmode 64 bits
-registers is not set properly giving the problem in runtime. Such
-changes are taken care in the implementation of the pattern for
-DFmode for inline expansion of the sqrt.
-
-ChangeLog:
-2015-06-16 Ajit Agarwal <ajitkum@xilinx.com>
- Nagaraju Mekala <nmekala@xilinx.com>
-
- * config/microblaze/microblaze.md (sqrtdf2): New
- pattern.
-
-Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
- Nagaraju Mekala nmekala@xilinx.com
----
- gcc/config/microblaze/microblaze.md | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 8f9baec826b..986d9c3aa25 100644
---- a/gcc/config/microblaze/microblaze.md
-+++ b/gcc/config/microblaze/microblaze.md
-@@ -451,6 +451,20 @@
- (set_attr "mode" "SF")
- (set_attr "length" "4")])
-
-+(define_insn "sqrtdf2"
-+ [(set (match_operand:DF 0 "register_operand" "=d")
-+ (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))]
-+ "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT"
-+ {
-+ if (REGNO (operands[0]) == REGNO (operands[1]))
-+ return "fsqrt\t%0,%1";
-+ else
-+ return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0";
-+ }
-+ [(set_attr "type" "fsqrt")
-+ (set_attr "mode" "SF")
-+ (set_attr "length" "4")])
-+
- (define_insn "fix_truncsfsi2"
- [(set (match_operand:SI 0 "register_operand" "=d")
- (fix:SI (match_operand:SF 1 "register_operand" "d")))]
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch
deleted file mode 100644
index b4d0317..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From fe7962c6cc54a5d5f80db90ccc06b8603ddeb74f Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 17:33:31 +0530
-Subject: [PATCH 21/58] [Patch] OPT: Update heuristics for loop-invariant for
- address arithmetic
-
-The changes are made in the patch to update the heuristics
-for loop invariant for address arithmetic. The heuristics is
-changed to calculate the estimated register pressure cost when
-ira based register pressure is not enabled. The estimated
-register pressure cost modifies the existing calculation cost
-associated to perform the Loop invariant code motion for address
-arithmetic.
-
-ChangeLog:
-2015-06-17 Ajit Agarwal <ajitkum@xilinx.com>
- Nagaraju Mekala <nmekala@xilinx.com>
-
- * loop-invariant.c (gain_for_invariant): update the
- heuristics for estimate_reg_pressure_cost.
-
-Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
- Nagaraju Mekala nmekala@xilinx.com
----
- gcc/loop-invariant.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
-index 37ae6549e56..f6385d6cf43 100644
---- a/gcc/loop-invariant.c
-+++ b/gcc/loop-invariant.c
-@@ -1465,10 +1465,8 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
-
- if (! flag_ira_loop_pressure)
- {
-- size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
-- regs_used, speed, call_p)
-- - estimate_reg_pressure_cost (new_regs[0],
-- regs_used, speed, call_p));
-+ size_cost = estimate_reg_pressure_cost (regs_needed[0],
-+ regs_used, speed, call_p);
- }
- else if (ret < 0)
- return -1;
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Correct-the-const-high-double-immed.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Correct-the-const-high-double-immed.patch
new file mode 100644
index 0000000..f362cea
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0021-Patch-microblaze-Correct-the-const-high-double-immed.patch
@@ -0,0 +1,58 @@
+From af01da22797795408d45dcf03076dc8153c7029e Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 9 Nov 2020 21:14:54 +0530
+Subject: [PATCH 21/54] [Patch, microblaze]: Correct the const high double
+ immediate value with this patch the loading of the DI mode immediate values
+ will be using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE
+ functions, as CONST_DOUBLE_HIGH was returning the sign extension value even
+ of the unsigned long long constants also
+
+Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+ Ajit Agarwal <ajitkum@xilinx.com>
+---
+ gcc/config/microblaze/microblaze.c | 6 ++++--
+ gcc/testsuite/gcc.target/microblaze/others/long.c | 9 +++++++++
+ 2 files changed, 13 insertions(+), 2 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/microblaze/others/long.c
+
+diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
+index 0dc96e481b7..5d395f047f7 100644
+--- a/gcc/config/microblaze/microblaze.c
++++ b/gcc/config/microblaze/microblaze.c
+@@ -2452,14 +2452,16 @@ print_operand (FILE * file, rtx op, int letter)
+ else if (letter == 'h' || letter == 'j')
+ {
+ long val[2];
++ long l[2];
+ if (code == CONST_DOUBLE)
+ {
+ if (GET_MODE (op) == DFmode)
+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
+ else
+ {
+- val[0] = CONST_DOUBLE_HIGH (op);
+- val[1] = CONST_DOUBLE_LOW (op);
++ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
++ val[1] = l[WORDS_BIG_ENDIAN == 0];
++ val[0] = l[WORDS_BIG_ENDIAN != 0];
+ }
+ }
+ else if (code == CONST_INT)
+diff --git a/gcc/testsuite/gcc.target/microblaze/others/long.c b/gcc/testsuite/gcc.target/microblaze/others/long.c
+new file mode 100644
+index 00000000000..b6b55d5ad65
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/microblaze/others/long.c
+@@ -0,0 +1,9 @@
++#define BASEADDR 0xF0000000ULL
++int main ()
++{
++ unsigned long long start;
++ start = (unsigned long long) BASEADDR;
++ return 0;
++}
++/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */
++/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */
+--
+2.17.1
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
similarity index 69%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
index 3869db1..3faef05 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch
@@ -1,12 +1,11 @@
-From ea79d97f430d554921d94d30cb8db851cce6664b Mon Sep 17 00:00:00 2001
+From 7349def8102c09fd09e735daa9fc890bee323e79 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 18 Jan 2017 11:49:58 +0530
-Subject: [PATCH 27/58] [Fix, microblaze]: Fix internal compiler error with
- msmall-divides
-
-This patch will fix the internal error microblaze_expand_divide function which comes because
-of rtx PLUS where the mem_rtx is of type SI and the operand is of type QImode.
-This patch modifies the mem_rtx as QImode and Plus as QImode to fix the error.
+Subject: [PATCH 22/54] [Fix, microblaze]: Fix internal compiler error with
+ msmall-divides This patch will fix the internal error
+ microblaze_expand_divide function which comes because of rtx PLUS where the
+ mem_rtx is of type SI and the operand is of type QImode. This patch modifies
+ the mem_rtx as QImode and Plus as QImode to fix the error.
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
Ajit Agarwal <ajitkum@xilinx.com>
@@ -20,10 +19,10 @@
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 73d0e010cda..f7c29ef28f5 100644
+index 5d395f047f7..29b2f6b016b 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -3902,7 +3902,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3767,7 +3767,7 @@ microblaze_expand_divide (rtx operands[])
emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4)));
emit_insn (gen_addsi3 (regt1, regt1, operands[2]));
mem_rtx = gen_rtx_MEM (QImode,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
similarity index 85%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
index 3f9dd69..1c4f8ca 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch
@@ -1,8 +1,8 @@
-From fa067a4b7b65aae3671bb02d77c580c9e35fc384 Mon Sep 17 00:00:00 2001
+From ad3d0a29a4895351008ce959138c13b8f5924464 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 18 Jan 2017 12:03:39 +0530
-Subject: [PATCH 28/58] [patch,microblaze]: Fix the calculation of high word in
- a long long 64-bit
+Subject: [PATCH 23/54] [patch,microblaze]: Fix the calculation of high word in
+ a long long 6. .4-bit
This patch will change the calculation of high word in a long long 64-bit.
Earlier to this patch the high word of long long word (0xF0000000ULL) is
@@ -27,10 +27,10 @@
1 file changed, 3 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index f7c29ef28f5..0a73a6c32b4 100644
+index 29b2f6b016b..4710def18cf 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -2603,9 +2603,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2468,9 +2468,6 @@ print_operand (FILE * file, rtx op, int letter)
{
val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32;
val[1] = INTVAL (op) & 0x00000000ffffffffLL;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-Add-new-bit-field-instructions.patch
similarity index 74%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-Add-new-bit-field-instructions.patch
index dfdb479..590cb38 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-microblaze-Add-new-bit-field-instructions.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0024-Patch-microblaze-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 341bf8ad4e55693d00d4d8c916f4c347e7186dd4 Mon Sep 17 00:00:00 2001
+From 50f5f8341ba39f2e12eef4a149e59f71f032f7d3 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 18 Jan 2017 12:14:51 +0530
-Subject: [PATCH 29/58] [Patch, microblaze]: Add new bit-field instructions
+Date: Tue, 10 Nov 2020 09:51:24 +0530
+Subject: [PATCH 24/54] [Patch, microblaze]: Add new bit-field instructions
This patches adds new bsefi and bsifi instructions.
BSEFI- The instruction shall extract a bit field from a
@@ -12,18 +12,37 @@
The rest of the bits in the destination register shall be unchanged
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-ChangeLog:
- 2016-02-03 Nagaraju Mekala <nmekala@xilix.com>
-
- *microblaze.md (Update): Added new patterns
---
+ gcc/config/microblaze/microblaze.c | 5 ++
gcc/config/microblaze/microblaze.h | 2 +
gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++
- 2 files changed, 75 insertions(+)
+ 3 files changed, 80 insertions(+)
+diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
+index 4710def18cf..14c652325a8 100644
+--- a/gcc/config/microblaze/microblaze.c
++++ b/gcc/config/microblaze/microblaze.c
+@@ -164,6 +164,9 @@ int microblaze_no_unsafe_delay;
+ /* Set to one if the targeted core has the CLZ insn. */
+ int microblaze_has_clz = 0;
+
++/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */
++int microblaze_has_bitfield = 0;
++
+ /* Which CPU pipeline do we use. We haven't really standardized on a CPU
+ version having only a particular type of pipeline. There can still be
+ options on the CPU to scale pipeline features up or down. :(
+@@ -1850,6 +1853,8 @@ microblaze_option_override (void)
+ {
+ if (TARGET_AREA_OPTIMIZED_2)
+ microblaze_pipe = MICROBLAZE_PIPE_8;
++ if (TARGET_BARREL_SHIFT)
++ microblaze_has_bitfield = 1;
+ }
+
+ if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL)
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 8b0db2c1718..b5b7b22cec9 100644
+index 8a668278337..857cb1cd9d0 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[];
@@ -34,16 +53,16 @@
extern enum pipeline_type microblaze_pipe;
#define OBJECT_FORMAT_ELF
-@@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe;
-
+@@ -63,6 +64,7 @@ extern enum pipeline_type microblaze_pipe;
/* Do we have CLZ? */
#define TARGET_HAS_CLZ (TARGET_PATTERN_COMPARE && microblaze_has_clz)
-+#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield)
++#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield)
/* The default is to support PIC. */
#define TARGET_SUPPORTS_PIC 1
+
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index c407a81c51e..fa6aabdb9d4 100644
+index c407a81c51e..3e6e2b9276d 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -982,6 +982,8 @@
@@ -72,7 +91,7 @@
+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "immediate_operand" "I")
+ (match_operand:SI 3 "immediate_operand" "I")))]
-+"TARGET_HAS_BITFIELD"
++""
+"
+{
+ unsigned HOST_WIDE_INT len = UINTVAL (operands[2]);
@@ -98,7 +117,7 @@
+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
+ (match_operand:SI 2 "immediate_operand" "I")
+ (match_operand:SI 3 "immediate_operand" "I")))]
-+ "TARGET_HAS_BITFIELD && (UINTVAL (operands[2]) > 0)
++ "TARGET_BARREL_SHIFT && (UINTVAL (operands[2]) > 0)
+ && ((UINTVAL (operands[2]) + UINTVAL (operands[3])) <= 32)"
+ "bsefi %0,%1,%2,%3"
+ [(set_attr "type" "bshift")
@@ -109,7 +128,7 @@
+ (match_operand:SI 1 "immediate_operand" "I")
+ (match_operand:SI 2 "immediate_operand" "I"))
+ (match_operand:SI 3 "register_operand" "r"))]
-+ "TARGET_HAS_BITFIELD"
++ ""
+ "
+{
+ unsigned HOST_WIDE_INT len = UINTVAL (operands[1]);
@@ -131,7 +150,7 @@
+ (match_operand:SI 1 "immediate_operand" "I")
+ (match_operand:SI 2 "immediate_operand" "I"))
+ (match_operand:SI 3 "register_operand" "r"))]
-+ "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0
++ "TARGET_BARREL_SHIFT && UINTVAL (operands[1]) > 0
+ && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32"
+ "bsifi %0, %3, %1, %2"
+ [(set_attr "type" "bshift")
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
similarity index 89%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
index bb77323..da24f11 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch
@@ -1,20 +1,18 @@
-From df38540af411564f428079335c8d1e695dc1d723 Mon Sep 17 00:00:00 2001
+From cb67b2e64c0d5bd32d36cb32def5f889122fc37a Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 18 Jan 2017 12:42:10 +0530
-Subject: [PATCH 30/58] [Patch, microblaze]: Fix bug in MB version calculation
-
-This patch fixes the bug in microblaze_version_to_int function.
-Earlier the conversion of vXX.YY.Z to int has a bug which is
-fixed now.
+Subject: [PATCH 25/54] [Patch, microblaze]: Fix bug in MB version calculation
+ This patch fixes the bug in microblaze_version_to_int function. Earlier the
+ conversion of vXX.YY.Z to int has a bug which is fixed now.
Signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com>
Nagaraju Mekala <nmekala@xilix.com>
---
- gcc/config/microblaze/microblaze.c | 145 ++++++++++++++---------------
- 1 file changed, 69 insertions(+), 76 deletions(-)
+ gcc/config/microblaze/microblaze.c | 147 ++++++++++++++---------------
+ 1 file changed, 70 insertions(+), 77 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 0a73a6c32b4..4b5699671e8 100644
+index 14c652325a8..451db9c79b0 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -242,6 +242,63 @@ section *sdata2_section;
@@ -101,7 +99,7 @@
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (3);
-@@ -1677,65 +1732,6 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
+@@ -1677,72 +1732,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v,
return 0;
}
@@ -167,6 +165,14 @@
static void
microblaze_option_override (void)
{
+ register int i, start;
+ register int regno;
+ register machine_mode mode;
+- int ver;
++ int ver,ver_int;
+
+ microblaze_section_threshold = (global_options_set.x_g_switch_value
+ ? g_switch_value
@@ -1763,13 +1759,13 @@ microblaze_option_override (void)
/* Check the MicroBlaze CPU version for any special action to be done. */
if (microblaze_select_cpu == NULL)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch
deleted file mode 100644
index f1b793f..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From eca67041b3d6e20663313732df0038d75fd2da8d Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 18 Jan 2017 11:08:40 +0530
-Subject: [PATCH 25/58] [Patch,rtl Optimization]: Better register pressure
- estimate for loop invariant code motion
-
-Calculate the loop liveness used for regs for calculating the register pressure
-in the cost estimation. Loop liveness is based on the following properties.
-We only need to find the set of objects that are live at the birth or the header
-of the loop. We don't need to calculate the live through the loop by considering
-live in and live out of all the basic blocks of the loop. This is based on the
-point that the set of objects that are live-in at the birth or header of the loop
-will be live-in at every node in the loop.
-
-If a v live is out at the header of the loop then the variable is live-in at every node
-in the loop. To prove this, consider a loop L with header h such that the variable v
-defined at d is live-in at h. Since v is live at h, d is not part of L. This follows i
-from the dominance property, i.e. h is strictly dominated by d. Furthermore, there
-exists a path from h to a use of v which does not go through d. For every node p in
-the loop, since the loop is strongly connected and node is a component of the CFG,
-there exists a path, consisting only of nodes of L from p to h. Concatenating these
-two paths proves that v is live-in and live-out of p.
-
-Calculate the live-out and live-in for the exit edge of the loop. This patch considers
-liveness for not only the loop latch but also the liveness outside the loops.
-
-ChangeLog:
-2016-01-22 Ajit Agarwal <ajitkum@xilinx.com>
-
- * loop-invariant.c
- (find_invariants_to_move): Add the logic of regs_used based
- on liveness.
- * cfgloopanal.c
- (estimate_reg_pressure_cost): Update the heuristics in presence
- of call_p.
-
-Signed-off-by:Ajit Agarwal ajitkum@xilinx.com.
----
- gcc/cfgloopanal.c | 4 ++-
- gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++-----------
- 2 files changed, 50 insertions(+), 17 deletions(-)
-
-diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c
-index 0b33e8272a7..7be8606e4f0 100644
---- a/gcc/cfgloopanal.c
-+++ b/gcc/cfgloopanal.c
-@@ -418,7 +418,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed,
- if (regs_needed + target_res_regs <= available_regs)
- return 0;
-
-- if (regs_needed <= available_regs)
-+ if ((regs_needed <= available_regs)
-+ || (call_p && (regs_needed <=
-+ (available_regs + target_clobbered_regs))))
- /* If we are close to running out of registers, try to preserve
- them. */
- cost = target_reg_cost [speed] * n_new;
-diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c
-index f6385d6cf43..8596b5c984d 100644
---- a/gcc/loop-invariant.c
-+++ b/gcc/loop-invariant.c
-@@ -1519,7 +1519,7 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
- size_cost = 0;
- }
-
-- return comp_cost - size_cost;
-+ return comp_cost - size_cost + 1;
- }
-
- /* Finds invariant with best gain for moving. Returns the gain, stores
-@@ -1613,22 +1613,53 @@ find_invariants_to_move (bool speed, bool call_p)
- /* REGS_USED is actually never used when the flag is on. */
- regs_used = 0;
- else
-- /* We do not really do a good job in estimating number of
-- registers used; we put some initial bound here to stand for
-- induction variables etc. that we do not detect. */
-+ /* The logic used in estimating the number of regs_used is changed.
-+ Now it will be based on liveness of the loop. */
- {
-- unsigned int n_regs = DF_REG_SIZE (df);
--
-- regs_used = 2;
--
-- for (i = 0; i < n_regs; i++)
-- {
-- if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i))
-- {
-- /* This is a value that is used but not changed inside loop. */
-- regs_used++;
-- }
-- }
-+ int i;
-+ edge e;
-+ vec<edge> edges;
-+ bitmap_head regs_live;
-+
-+ bitmap_initialize (®s_live, ®_obstack);
-+ edges = get_loop_exit_edges (curr_loop);
-+
-+ /* Loop liveness is based on the following properties.
-+ We only need to find the set of objects that are live at the
-+ birth or the header of the loop.
-+ We don't need to calculate the live through the loop considering
-+ live-in and live-out of all the basic blocks of the loop. This is
-+ based on the point that the set of objects that are live-in at the
-+ birth or header of the loop will be live-in at every block in the
-+ loop.
-+
-+ If a v live out at the header of the loop then the variable is
-+ live-in at every node in the Loop. To prove this, consider a loop
-+ L with header h such that the variable v defined at d is live-in
-+ at h. Since v is live at h, d is not part of L. This follows from
-+ the dominance property, i.e. h is strictly dominated by d. Furthermore,
-+ there exists a path from h to a use of v which does not go through d.
-+ For every node of the loop, p, since the loop is strongly connected
-+ component of the CFG, there exists a path, consisting only of nodes
-+ of L from p to h. Concatenating these two paths prove that v is
-+ live-in and live-out of p. */
-+
-+ bitmap_ior_into (®s_live, DF_LR_IN (curr_loop->header));
-+ bitmap_ior_into (®s_live, DF_LR_OUT (curr_loop->header));
-+
-+ /* Calculate the live-out and live-in for the exit edge of the loop.
-+ This considers liveness for not only the loop latch but also the
-+ liveness outside the loops. */
-+
-+ FOR_EACH_VEC_ELT (edges, i, e)
-+ {
-+ bitmap_ior_into (®s_live, DF_LR_OUT (e->src));
-+ bitmap_ior_into (®s_live, DF_LR_IN (e->dest));
-+ }
-+
-+ regs_used = bitmap_count_bits (®s_live) + 2;
-+ bitmap_clear (®s_live);
-+ edges.release ();
- }
-
- if (! flag_ira_loop_pressure)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Fixing-the-issue-with-the-builtin_alloc.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Fixing-the-issue-with-the-builtin_alloc.patch
index 0c80cf8..c0719f6 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-Fixing-the-issue-with-the-builtin_alloc.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Fixing-the-issue-with-the-builtin_alloc.patch
@@ -1,10 +1,9 @@
-From 87da245d89fffe6a025037b4a53f66dafa7e1f84 Mon Sep 17 00:00:00 2001
+From fdb2f23a69182da516c7bf89a9e0011e55120f94 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 23 Feb 2017 17:09:04 +0530
-Subject: [PATCH 31/58] Fixing the issue with the builtin_alloc.
-
-register r18 was not properly handling the stack pattern
-which was resolved by using free available register
+Subject: [PATCH 26/54] Fixing the issue with the builtin_alloc. register r18
+ was not properly handling the stack pattern which was resolved by using free
+ available register
signed-off-by:nagaraju mekala <nmekala@xilinx.com>
---
@@ -12,7 +11,7 @@
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index fa6aabdb9d4..9de46d0ce24 100644
+index 3e6e2b9276d..d938efcd762 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -2078,10 +2078,10 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch
deleted file mode 100644
index cbc1b7b..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0026-Patch-microblaze-Correct-the-const-high-double-immed.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 711652dd187e5b8d7aa12ecc9f569f10b1521bd1 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Wed, 18 Jan 2017 11:25:48 +0530
-Subject: [PATCH 26/58] [Patch, microblaze]: Correct the const high double
- immediate value
-
-With this patch the loading of the DI mode immediate values will be
-using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE
-functions, as CONST_DOUBLE_HIGH was returning the sign extension value
-even of the unsigned long long constants also
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
- Ajit Agarwal <ajitkum@xilinx.com>
-
-ChangeLog:
-2016-02-03 Nagaraju Mekala <nmekala@xilix.com>
- Ajit Agarwal <ajitkum@xilinx.com>
-
- *microblaze.c (print_operand): Use REAL_VALUE_FROM_CONST_DOUBLE &
- REAL_VALUE_TO_TARGET_DOUBLE
- *long.c (new): Added new testcase
----
- gcc/config/microblaze/microblaze.c | 6 ++++--
- gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++
- 2 files changed, 14 insertions(+), 2 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c
-
-diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index a3996119bd7..73d0e010cda 100644
---- a/gcc/config/microblaze/microblaze.c
-+++ b/gcc/config/microblaze/microblaze.c
-@@ -2587,14 +2587,16 @@ print_operand (FILE * file, rtx op, int letter)
- else if (letter == 'h' || letter == 'j')
- {
- long val[2];
-+ long l[2];
- if (code == CONST_DOUBLE)
- {
- if (GET_MODE (op) == DFmode)
- REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
- else
- {
-- val[0] = CONST_DOUBLE_HIGH (op);
-- val[1] = CONST_DOUBLE_LOW (op);
-+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
-+ val[1] = l[WORDS_BIG_ENDIAN == 0];
-+ val[0] = l[WORDS_BIG_ENDIAN != 0];
- }
- }
- else if (code == CONST_INT)
-diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c
-new file mode 100644
-index 00000000000..4d4518619d1
---- /dev/null
-+++ b/gcc/testsuite/gcc.target/microblaze/long.c
-@@ -0,0 +1,10 @@
-+/* { dg-options "-O0" } */
-+#define BASEADDR 0xF0000000ULL
-+int main ()
-+{
-+ unsigned long long start;
-+ start = (unsigned long long) BASEADDR;
-+ return 0;
-+}
-+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */
-+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
similarity index 80%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
index 458af56..7627b76 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch
@@ -1,15 +1,17 @@
-From 3e8779308d1901b273b2b360bea719aa72d24ab9 Mon Sep 17 00:00:00 2001
+From 336d984c580345eccdeb889af8ef8c986afc1dad Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 19 Feb 2018 18:06:16 +0530
-Subject: [PATCH 32/58] [Patch,Microblaze]: update in constraints for bitfield
+Subject: [PATCH 27/54] [Patch,Microblaze]: update in constraints for bitfield
insert and extract instructions.
+Conflicts:
+ gcc/config/microblaze/microblaze.md
---
- gcc/config/microblaze/microblaze.md | 43 +++++------------------------
- 1 file changed, 7 insertions(+), 36 deletions(-)
+ gcc/config/microblaze/microblaze.md | 45 +++++------------------------
+ 1 file changed, 8 insertions(+), 37 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 9de46d0ce24..fe94807182b 100644
+index d938efcd762..63ad94b972f 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -2492,33 +2492,17 @@
@@ -22,7 +24,8 @@
(zero_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "immediate_operand" "I")
(match_operand:SI 3 "immediate_operand" "I")))]
- "TARGET_HAS_BITFIELD"
++"TARGET_HAS_BITFIELD"
+ ""
-"
-{
- unsigned HOST_WIDE_INT len = UINTVAL (operands[2]);
@@ -42,7 +45,6 @@
- operands[2], operands[3]));
- DONE;
-}")
-+""
+)
-(define_insn "extv_32"
@@ -51,10 +53,11 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(zero_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "immediate_operand" "I")
-@@ -2535,21 +2519,8 @@
+@@ -2534,22 +2518,9 @@
+ (match_operand:SI 1 "immediate_operand" "I")
(match_operand:SI 2 "immediate_operand" "I"))
(match_operand:SI 3 "register_operand" "r"))]
- "TARGET_HAS_BITFIELD"
+- ""
- "
-{
- unsigned HOST_WIDE_INT len = UINTVAL (operands[1]);
@@ -70,6 +73,7 @@
- operands[2], operands[3]));
- DONE;
-}")
++ "TARGET_HAS_BITFIELD"
+""
+)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
similarity index 86%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
index 3243347..f12cea2 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0028-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch
@@ -1,7 +1,7 @@
-From eb90da1d616dfb7481b3f7c74a2be40e921a24f2 Mon Sep 17 00:00:00 2001
+From e4f5435e6e77afe0150bf36ec9d3d055cf25a089 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 4 Jun 2018 10:10:18 +0530
-Subject: [PATCH 33/58] [Patch,Microblaze] : Removed fsqrt generation for
+Subject: [PATCH 28/54] [Patch,Microblaze] : Removed fsqrt generation for
double values.
---
@@ -9,7 +9,7 @@
1 file changed, 14 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index fe94807182b..a527da70f8a 100644
+index 63ad94b972f..7695b105baa 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -526,20 +526,6 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch
similarity index 94%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch
index acf14b2..d960372 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Intial-commit-of-64-bit-Microblaze.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0029-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch
@@ -1,24 +1,23 @@
-From 9600049313b095d6d7d8ea46a7ab783fabae71a2 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Tue, 3 Apr 2018 16:48:39 +0530
-Subject: [PATCH 34/58] Intial commit of 64-bit Microblaze
+From 1a7fda96cb247bad0a4df61cd8fd3e65c0e6f35d Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 10 Nov 2020 12:52:54 +0530
+Subject: [PATCH 29/54] [Patch,MicroBlaze]: Intial commit of 64-bit Microblaze
-Added load store pattern movdi and also adding missing files
---
- gcc/config/microblaze/constraints.md | 5 +
+ gcc/config/microblaze/constraints.md | 6 +
gcc/config/microblaze/microblaze-protos.h | 1 +
gcc/config/microblaze/microblaze.c | 109 ++++--
gcc/config/microblaze/microblaze.h | 4 +-
- gcc/config/microblaze/microblaze.md | 394 +++++++++++++++++++++-
+ gcc/config/microblaze/microblaze.md | 395 +++++++++++++++++++++-
gcc/config/microblaze/microblaze.opt | 7 +-
gcc/config/microblaze/t-microblaze | 7 +-
- 7 files changed, 490 insertions(+), 37 deletions(-)
+ 7 files changed, 492 insertions(+), 37 deletions(-)
diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index b9fc6e3fae2..f636b035280 100644
+index b9fc6e3fae2..123395717e0 100644
--- a/gcc/config/microblaze/constraints.md
+++ b/gcc/config/microblaze/constraints.md
-@@ -52,6 +52,11 @@
+@@ -52,6 +52,12 @@
(and (match_code "const_int")
(match_test "ival > 0 && ival < 0x10000")))
@@ -27,11 +26,12 @@
+ (and (match_code "const_int")
+ (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL")))
+
++
;; Define floating point constraints
(define_constraint "G"
diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 76ffc682df2..b8a3321dbdf 100644
+index c2f88813a8d..460feac4ac5 100644
--- a/gcc/config/microblaze/microblaze-protos.h
+++ b/gcc/config/microblaze/microblaze-protos.h
@@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *);
@@ -43,10 +43,10 @@
extern void print_operand (FILE *, rtx, int);
extern void print_operand_address (FILE *, rtx);
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 4b5699671e8..8a3ccae558a 100644
+index 451db9c79b0..99a1cd5c0be 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -3562,11 +3562,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3432,11 +3432,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
op0 = operands[0];
op1 = operands[1];
@@ -61,7 +61,7 @@
emit_move_insn (op0, temp);
return true;
}
-@@ -3631,12 +3631,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
+@@ -3501,12 +3501,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[])
&& (flag_pic == 2 || microblaze_tls_symbol_p (p0)
|| !SMALL_INT (p1)))))
{
@@ -76,7 +76,7 @@
return true;
}
}
-@@ -3767,7 +3767,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3637,7 +3637,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
rtx cmp_op0 = operands[1];
rtx cmp_op1 = operands[2];
rtx label1 = operands[3];
@@ -85,7 +85,7 @@
rtx condition;
gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG));
-@@ -3776,23 +3776,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3646,23 +3646,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
if (cmp_op1 == const0_rtx)
{
comp_reg = cmp_op0;
@@ -128,7 +128,7 @@
}
}
-@@ -3803,7 +3816,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3673,7 +3686,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
rtx cmp_op0 = operands[1];
rtx cmp_op1 = operands[2];
rtx label1 = operands[3];
@@ -137,7 +137,7 @@
rtx condition;
gcc_assert ((GET_CODE (cmp_op0) == REG)
-@@ -3814,30 +3827,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3684,30 +3697,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
{
comp_reg = cmp_op0;
condition = gen_rtx_fmt_ee (signed_condition (code),
@@ -213,7 +213,7 @@
}
}
-@@ -3854,6 +3900,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3724,6 +3770,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
emit_jump_insn (gen_condjump (condition, operands[3]));
}
@@ -234,7 +234,7 @@
static bool
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index b5b7b22cec9..4931895e650 100644
+index 857cb1cd9d0..c0358603380 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe;
@@ -263,7 +263,7 @@
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index a527da70f8a..bcf2b9244f8 100644
+index 7695b105baa..4d8429d9a90 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -497,7 +497,6 @@
@@ -456,7 +456,7 @@
;; Those for integer source operand are ordered
;; widest source type first.
-@@ -1011,6 +1122,31 @@
+@@ -1011,6 +1122,32 @@
)
@@ -485,10 +485,11 @@
+ [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store")
+ (set_attr "mode" "DI")
+ (set_attr "length" "8,8,8,8,12,8,12")])
++
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
-@@ -1423,6 +1559,36 @@
+@@ -1423,6 +1560,36 @@
(set_attr "length" "4,4")]
)
@@ -525,7 +526,7 @@
;; The following patterns apply when there is no barrel shifter present
(define_insn "*ashlsi3_with_mul_delay"
-@@ -1548,6 +1714,36 @@
+@@ -1548,6 +1715,36 @@
;;----------------------------------------------------------------
;; 32-bit right shifts
;;----------------------------------------------------------------
@@ -562,7 +563,7 @@
(define_expand "ashrsi3"
[(set (match_operand:SI 0 "register_operand" "=&d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -1657,6 +1853,36 @@
+@@ -1657,6 +1854,36 @@
;;----------------------------------------------------------------
;; 32-bit right shifts (logical)
;;----------------------------------------------------------------
@@ -599,7 +600,7 @@
(define_expand "lshrsi3"
[(set (match_operand:SI 0 "register_operand" "=&d")
-@@ -1803,6 +2029,8 @@
+@@ -1803,6 +2030,8 @@
(set_attr "length" "4")]
)
@@ -608,7 +609,7 @@
;;----------------------------------------------------------------
;; Setting a register from an floating point comparison.
;;----------------------------------------------------------------
-@@ -1818,6 +2046,18 @@
+@@ -1818,6 +2047,18 @@
(set_attr "length" "4")]
)
@@ -627,7 +628,7 @@
;;----------------------------------------------------------------
;; Conditional branches
;;----------------------------------------------------------------
-@@ -1930,6 +2170,115 @@
+@@ -1930,6 +2171,115 @@
(set_attr "length" "12")]
)
@@ -743,7 +744,7 @@
;;----------------------------------------------------------------
;; Unconditional branches
;;----------------------------------------------------------------
-@@ -2478,17 +2827,33 @@
+@@ -2478,17 +2828,33 @@
DONE;
}")
@@ -782,7 +783,7 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(zero_extract:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "immediate_operand" "I")
-@@ -2505,8 +2870,21 @@
+@@ -2505,8 +2871,21 @@
(match_operand:SI 2 "immediate_operand" "I"))
(match_operand:SI 3 "register_operand" "r"))]
"TARGET_HAS_BITFIELD"
@@ -822,7 +823,7 @@
+MicroBlaze 64-bit mode.
+
diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 41fa9a92081..7671f63c5b5 100644
+index 41fa9a92081..e9a1921ae26 100644
--- a/gcc/config/microblaze/t-microblaze
+++ b/gcc/config/microblaze/t-microblaze
@@ -1,8 +1,11 @@
@@ -834,8 +835,8 @@
MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian
+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64
MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian
-+#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
-+#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
++MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
++MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
# Extra files
microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Intial-commit-for-64bit-MB-sources.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Intial-commit-for-64bit-MB-sources.patch
index e7872d5..88a0d0b 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Intial-commit-for-64bit-MB-sources.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0030-Intial-commit-for-64bit-MB-sources.patch
@@ -1,16 +1,16 @@
-From 8660e76d664ee4b42a83a4c15344b072d3c879df Mon Sep 17 00:00:00 2001
+From 53799d63bd26a04265a55f68ca57e3462ed6eeb7 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 27 Jul 2018 15:23:41 +0530
-Subject: [PATCH 35/58] Intial commit for 64bit-MB sources.
+Subject: [PATCH 30/54] Intial commit for 64bit-MB sources. Need to cleanup the
+ code later.
-Need to cleanup the code later.
---
gcc/config/microblaze/constraints.md | 2 +-
gcc/config/microblaze/microblaze-c.c | 6 +
gcc/config/microblaze/microblaze.c | 218 ++++++---
gcc/config/microblaze/microblaze.h | 63 ++-
gcc/config/microblaze/microblaze.md | 606 ++++++++++++++++++------
- gcc/config/microblaze/t-microblaze | 7 +-
+ gcc/config/microblaze/t-microblaze | 3 +-
libgcc/config/microblaze/crti.S | 4 +-
libgcc/config/microblaze/crtn.S | 4 +-
libgcc/config/microblaze/divdi3.S | 98 ++++
@@ -20,7 +20,7 @@
libgcc/config/microblaze/t-microblaze | 11 +-
libgcc/config/microblaze/udivdi3.S | 107 +++++
libgcc/config/microblaze/umoddi3.S | 110 +++++
- 15 files changed, 1232 insertions(+), 236 deletions(-)
+ 15 files changed, 1230 insertions(+), 234 deletions(-)
create mode 100644 libgcc/config/microblaze/divdi3.S
create mode 100644 libgcc/config/microblaze/divdi3_table.c
create mode 100644 libgcc/config/microblaze/moddi3.S
@@ -29,7 +29,7 @@
create mode 100644 libgcc/config/microblaze/umoddi3.S
diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index f636b035280..c2b0a21c53b 100644
+index 123395717e0..b8ef1650f92 100644
--- a/gcc/config/microblaze/constraints.md
+++ b/gcc/config/microblaze/constraints.md
@@ -55,7 +55,7 @@
@@ -39,8 +39,8 @@
- (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL")))
+ (match_test "ival > (long)-549755813888 && ival < (long)549755813887")))
- ;; Define floating point constraints
+ ;; Define floating point constraints
diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c
index d8c88e510e5..dbcd21fc6ee 100644
--- a/gcc/config/microblaze/microblaze-c.c
@@ -57,7 +57,7 @@
+ }
}
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 8a3ccae558a..3ecda553fe6 100644
+index 99a1cd5c0be..3c815444574 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -383,10 +383,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED)
@@ -141,7 +141,7 @@
break;
case E_QImode:
-@@ -2285,7 +2299,7 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2155,7 +2169,7 @@ compute_frame_size (HOST_WIDE_INT size)
if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM)
/* Don't account for link register. It is accounted specially below. */
@@ -150,7 +150,7 @@
mask |= (1L << (regno - GP_REG_FIRST));
}
-@@ -2554,7 +2568,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2424,7 +2438,7 @@ print_operand (FILE * file, rtx op, int letter)
if ((letter == 'M' && !WORDS_BIG_ENDIAN)
|| (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D')
@@ -159,7 +159,7 @@
fprintf (file, "%s", reg_names[regnum]);
}
-@@ -2580,6 +2594,7 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2450,6 +2464,7 @@ print_operand (FILE * file, rtx op, int letter)
else if (letter == 'h' || letter == 'j')
{
long val[2];
@@ -167,8 +167,8 @@
long l[2];
if (code == CONST_DOUBLE)
{
-@@ -2592,12 +2607,12 @@ print_operand (FILE * file, rtx op, int letter)
- val[0] = l[WORDS_BIG_ENDIAN != 0];
+@@ -2462,12 +2477,12 @@ print_operand (FILE * file, rtx op, int letter)
+ val[0] = l[WORDS_BIG_ENDIAN != 0];
}
}
- else if (code == CONST_INT)
@@ -184,7 +184,7 @@
}
else if (code == CONST_DOUBLE)
{
-@@ -2791,7 +2806,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
+@@ -2661,7 +2676,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority)
switch_to_section (get_section (section, 0, NULL));
assemble_align (POINTER_SIZE);
@@ -196,7 +196,7 @@
output_addr_const (asm_out_file, symbol);
fputs ("\n", asm_out_file);
}
-@@ -2814,7 +2832,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
+@@ -2684,7 +2702,10 @@ microblaze_asm_destructor (rtx symbol, int priority)
switch_to_section (get_section (section, 0, NULL));
assemble_align (POINTER_SIZE);
@@ -208,7 +208,7 @@
output_addr_const (asm_out_file, symbol);
fputs ("\n", asm_out_file);
}
-@@ -2880,7 +2901,7 @@ save_restore_insns (int prologue)
+@@ -2750,7 +2771,7 @@ save_restore_insns (int prologue)
/* For interrupt_handlers, need to save/restore the MSR. */
if (microblaze_is_interrupt_variant ())
{
@@ -217,7 +217,7 @@
gen_rtx_PLUS (Pmode, base_reg_rtx,
GEN_INT (current_frame_info.
gp_offset -
-@@ -2888,8 +2909,8 @@ save_restore_insns (int prologue)
+@@ -2758,8 +2779,8 @@ save_restore_insns (int prologue)
/* Do not optimize in flow analysis. */
MEM_VOLATILE_P (isr_mem_rtx) = 1;
@@ -228,7 +228,7 @@
}
if (microblaze_is_interrupt_variant () && !prologue)
-@@ -2897,8 +2918,8 @@ save_restore_insns (int prologue)
+@@ -2767,8 +2788,8 @@ save_restore_insns (int prologue)
emit_move_insn (isr_reg_rtx, isr_mem_rtx);
emit_move_insn (isr_msr_rtx, isr_reg_rtx);
/* Do not optimize in flow analysis. */
@@ -239,7 +239,7 @@
}
for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-@@ -2909,9 +2930,9 @@ save_restore_insns (int prologue)
+@@ -2779,9 +2800,9 @@ save_restore_insns (int prologue)
/* Don't handle here. Already handled as the first register. */
continue;
@@ -251,7 +251,7 @@
if (microblaze_is_interrupt_variant () || save_volatiles)
/* Do not optimize in flow analysis. */
MEM_VOLATILE_P (mem_rtx) = 1;
-@@ -2926,7 +2947,7 @@ save_restore_insns (int prologue)
+@@ -2796,7 +2817,7 @@ save_restore_insns (int prologue)
insn = emit_move_insn (reg_rtx, mem_rtx);
}
@@ -260,7 +260,7 @@
}
}
-@@ -2936,8 +2957,8 @@ save_restore_insns (int prologue)
+@@ -2806,8 +2827,8 @@ save_restore_insns (int prologue)
emit_move_insn (isr_mem_rtx, isr_reg_rtx);
/* Do not optimize in flow analysis. */
@@ -271,7 +271,7 @@
}
/* Done saving and restoring */
-@@ -3027,7 +3048,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
+@@ -2897,7 +2918,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor)
switch_to_section (s);
assemble_align (POINTER_SIZE);
@@ -283,7 +283,7 @@
output_addr_const (asm_out_file, symbol);
fputs ("\n", asm_out_file);
}
-@@ -3171,10 +3195,10 @@ microblaze_expand_prologue (void)
+@@ -3041,10 +3065,10 @@ microblaze_expand_prologue (void)
{
if (offset != 0)
ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
@@ -297,7 +297,7 @@
}
}
-@@ -3183,15 +3207,23 @@ microblaze_expand_prologue (void)
+@@ -3053,15 +3077,23 @@ microblaze_expand_prologue (void)
rtx fsiz_rtx = GEN_INT (fsiz);
rtx_insn *insn = NULL;
@@ -323,7 +323,7 @@
gen_rtx_PLUS (Pmode, stack_pointer_rtx,
const0_rtx));
-@@ -3199,7 +3231,7 @@ microblaze_expand_prologue (void)
+@@ -3069,7 +3101,7 @@ microblaze_expand_prologue (void)
/* Do not optimize in flow analysis. */
MEM_VOLATILE_P (mem_rtx) = 1;
@@ -332,7 +332,7 @@
insn = emit_move_insn (mem_rtx, reg_rtx);
RTX_FRAME_RELATED_P (insn) = 1;
}
-@@ -3309,12 +3341,12 @@ microblaze_expand_epilogue (void)
+@@ -3179,12 +3211,12 @@ microblaze_expand_epilogue (void)
if (!crtl->is_leaf || interrupt_handler)
{
mem_rtx =
@@ -347,7 +347,7 @@
emit_move_insn (reg_rtx, mem_rtx);
}
-@@ -3330,15 +3362,25 @@ microblaze_expand_epilogue (void)
+@@ -3200,15 +3232,25 @@ microblaze_expand_epilogue (void)
/* _restore_ registers for epilogue. */
save_restore_insns (0);
emit_insn (gen_blockage ());
@@ -377,7 +377,7 @@
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
MB_ABI_SUB_RETURN_ADDR_REGNUM)));
}
-@@ -3505,9 +3547,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3375,9 +3417,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
else
this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM);
@@ -394,7 +394,7 @@
/* Apply the offset from the vtable, if required. */
if (vcall_offset)
-@@ -3520,7 +3567,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3390,7 +3437,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx);
emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc));
@@ -406,7 +406,7 @@
}
/* Generate a tail call to the target function. */
-@@ -3696,7 +3746,7 @@ microblaze_eh_return (rtx op0)
+@@ -3566,7 +3616,7 @@ microblaze_eh_return (rtx op0)
/* Queue an .ident string in the queue of top-level asm statements.
If the string size is below the threshold, put it into .sdata2.
If the front-end is done, we must be being called from toplev.c.
@@ -415,7 +415,7 @@
void
microblaze_asm_output_ident (const char *string)
{
-@@ -3751,9 +3801,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
+@@ -3621,9 +3671,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
emit_block_move (m_tramp, assemble_trampoline_template (),
GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL);
@@ -427,7 +427,7 @@
emit_move_insn (mem, fnaddr);
}
-@@ -3777,7 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3647,7 +3697,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
{
comp_reg = cmp_op0;
condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -436,7 +436,7 @@
emit_jump_insn (gen_condjump (condition, label1));
else
emit_jump_insn (gen_long_condjump (condition, label1));
-@@ -3896,7 +3946,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
+@@ -3766,7 +3816,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[])
rtx comp_reg = gen_reg_rtx (SImode);
emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
@@ -445,7 +445,7 @@
emit_jump_insn (gen_condjump (condition, operands[3]));
}
-@@ -3906,10 +3956,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3776,10 +3826,10 @@ microblaze_expand_conditional_branch_df (rtx operands[])
rtx condition;
rtx cmp_op0 = XEXP (operands[0], 0);
rtx cmp_op1 = XEXP (operands[0], 1);
@@ -458,7 +458,7 @@
emit_jump_insn (gen_long_condjump (condition, operands[3]));
}
-@@ -3930,8 +3980,8 @@ microblaze_expand_divide (rtx operands[])
+@@ -3800,8 +3850,8 @@ microblaze_expand_divide (rtx operands[])
{
/* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */
@@ -469,7 +469,7 @@
rtx regqi = gen_reg_rtx (QImode);
rtx_code_label *div_label = gen_label_rtx ();
rtx_code_label *div_end_label = gen_label_rtx ();
-@@ -3939,17 +3989,31 @@ microblaze_expand_divide (rtx operands[])
+@@ -3809,17 +3859,31 @@ microblaze_expand_divide (rtx operands[])
rtx mem_rtx;
rtx ret;
rtx_insn *jump, *cjump, *insn;
@@ -508,7 +508,7 @@
mem_rtx = gen_rtx_MEM (QImode,
gen_rtx_PLUS (QImode, regt1, div_table_rtx));
-@@ -4096,7 +4160,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -3966,7 +4030,7 @@ insert_wic_for_ilb_runout (rtx_insn *first)
{
insn =
emit_insn_before (gen_iprefetch
@@ -517,7 +517,7 @@
before_4);
recog_memoized (insn);
INSN_LOCATION (insn) = INSN_LOCATION (before_4);
-@@ -4106,7 +4170,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
+@@ -3976,7 +4040,27 @@ insert_wic_for_ilb_runout (rtx_insn *first)
}
}
}
@@ -546,7 +546,7 @@
/* Insert instruction prefetch instruction at the fall
through path of the function call. */
-@@ -4259,6 +4343,17 @@ microblaze_starting_frame_offset (void)
+@@ -4129,6 +4213,17 @@ microblaze_starting_frame_offset (void)
#undef TARGET_LRA_P
#define TARGET_LRA_P hook_bool_void_false
@@ -564,7 +564,7 @@
#undef TARGET_FRAME_POINTER_REQUIRED
#define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required
-@@ -4268,6 +4363,9 @@ microblaze_starting_frame_offset (void)
+@@ -4138,6 +4233,9 @@ microblaze_starting_frame_offset (void)
#undef TARGET_TRAMPOLINE_INIT
#define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init
@@ -575,7 +575,7 @@
#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 4931895e650..1f6e2059545 100644
+index c0358603380..f6ad4d9fc21 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe;
@@ -672,9 +672,9 @@
#define ARG_POINTER_CFA_OFFSET(FNDECL) 0
+#define DWARF_CIE_DATA_ALIGNMENT -1
- #define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL)
+ #define REG_PARM_STACK_SPACE(FNDECL) (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
- #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
+ #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
-#define STACK_BOUNDARY 32
+#define STACK_BOUNDARY (TARGET_MB_64 ? 64 : 32)
@@ -744,7 +744,7 @@
/* Default to -G 8 */
#ifndef MICROBLAZE_DEFAULT_GVALUE
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index bcf2b9244f8..bef750c026a 100644
+index 4d8429d9a90..33a8b12ef3b 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -26,6 +26,7 @@
@@ -1054,7 +1054,7 @@
(define_insn "extendsidi2"
[(set (match_operand:DI 0 "register_operand" "=d,d,d")
(sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,R,m")))]
-@@ -1090,68 +1135,117 @@
+@@ -1090,69 +1135,118 @@
;; Unlike most other insns, the move insns can't be split with
;; different predicates, because register spilling and other parts of
;; the compiler, have memoized the insn number already.
@@ -1200,6 +1200,7 @@
+ (set_attr "length" "4,4,12,4,8,4,8")])
+
+
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o")
(match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))]
@@ -1208,7 +1209,7 @@
{
switch (which_alternative)
{
-@@ -1183,7 +1277,8 @@
+@@ -1184,7 +1278,8 @@
"reload_completed
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
&& GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
@@ -1218,7 +1219,7 @@
[(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))
(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))]
-@@ -1195,12 +1290,22 @@
+@@ -1196,12 +1291,22 @@
"reload_completed
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
&& GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
@@ -1242,7 +1243,7 @@
;; Unlike most other insns, the move insns can't be split with
;; different predicates, because register spilling and other parts of
;; the compiler, have memoized the insn number already.
-@@ -1272,6 +1377,8 @@
+@@ -1273,6 +1378,8 @@
(set_attr "length" "4,4,8,4,8,4,8")])
@@ -1251,7 +1252,7 @@
;; 16-bit Integer moves
;; Unlike most other insns, the move insns can't be split with
-@@ -1304,8 +1411,8 @@
+@@ -1305,8 +1412,8 @@
"@
addik\t%0,r0,%1\t# %X1
addk\t%0,%1,r0
@@ -1262,7 +1263,7 @@
sh%i0\t%z1,%0
sh%i0\t%z1,%0"
[(set_attr "type" "arith,move,load,no_delay_load,store,no_delay_store")
-@@ -1348,7 +1455,7 @@
+@@ -1349,7 +1456,7 @@
lbu%i1\t%0,%1
lbu%i1\t%0,%1
sb%i0\t%z1,%0
@@ -1271,7 +1272,7 @@
[(set_attr "type" "arith,arith,move,load,no_delay_load,store,no_delay_store")
(set_attr "mode" "QI")
(set_attr "length" "4,4,8,4,8,4,8")])
-@@ -1421,7 +1528,7 @@
+@@ -1422,7 +1529,7 @@
addik\t%0,r0,%F1
lw%i1\t%0,%1
sw%i0\t%z1,%0
@@ -1280,7 +1281,7 @@
[(set_attr "type" "move,no_delay_load,load,no_delay_load,no_delay_load,store,no_delay_store")
(set_attr "mode" "SF")
(set_attr "length" "4,4,4,4,4,4,4")])
-@@ -1460,6 +1567,33 @@
+@@ -1461,6 +1568,33 @@
;; movdf_internal
;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT
;;
@@ -1314,7 +1315,7 @@
(define_insn "*movdf_internal"
[(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,o")
(match_operand:DF 1 "general_operand" "dG,o,F,T,d"))]
-@@ -1494,7 +1628,8 @@
+@@ -1495,7 +1629,8 @@
"reload_completed
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
&& GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
@@ -1324,7 +1325,7 @@
[(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))
(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))]
"")
-@@ -1505,7 +1640,8 @@
+@@ -1506,7 +1641,8 @@
"reload_completed
&& GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0]))
&& GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))
@@ -1334,7 +1335,7 @@
[(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))
(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))]
"")
-@@ -2005,6 +2141,31 @@ else
+@@ -2006,6 +2142,31 @@ else
"
)
@@ -1366,7 +1367,7 @@
(define_insn "seq_internal_pat"
[(set (match_operand:SI 0 "register_operand" "=d")
(eq:SI
-@@ -2065,8 +2226,8 @@ else
+@@ -2066,8 +2227,8 @@ else
(define_expand "cbranchsi4"
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
@@ -1377,7 +1378,7 @@
(label_ref (match_operand 3 ""))
(pc)))]
""
-@@ -2078,13 +2239,13 @@ else
+@@ -2079,13 +2240,13 @@ else
(define_expand "cbranchsi4_reg"
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
@@ -1394,7 +1395,7 @@
DONE;
})
-@@ -2109,6 +2270,26 @@ else
+@@ -2110,6 +2271,26 @@ else
(label_ref (match_operand 1))
(pc)))])
@@ -1421,7 +1422,7 @@
(define_insn "branch_zero"
[(set (pc)
(if_then_else (match_operator:SI 0 "ordered_comparison_operator"
-@@ -2129,6 +2310,47 @@ else
+@@ -2130,6 +2311,47 @@ else
(set_attr "length" "4")]
)
@@ -1469,7 +1470,7 @@
(define_insn "branch_compare"
[(set (pc)
(if_then_else (match_operator:SI 0 "cmp_op"
-@@ -2312,7 +2534,7 @@ else
+@@ -2313,7 +2535,7 @@ else
;; Indirect jumps. Jump to register values. Assuming absolute jumps
(define_insn "indirect_jump_internal1"
@@ -1478,7 +1479,7 @@
""
"bra%?\t%0"
[(set_attr "type" "jump")
-@@ -2325,7 +2547,7 @@ else
+@@ -2326,7 +2548,7 @@ else
(use (label_ref (match_operand 1 "" "")))]
""
{
@@ -1487,7 +1488,7 @@
if (!flag_pic || TARGET_PIC_DATA_TEXT_REL)
emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
-@@ -2337,7 +2559,7 @@ else
+@@ -2338,7 +2560,7 @@ else
(define_insn "tablejump_internal1"
[(set (pc)
@@ -1496,7 +1497,7 @@
(use (label_ref (match_operand 1 "" "")))]
""
"bra%?\t%0 "
-@@ -2347,9 +2569,9 @@ else
+@@ -2348,9 +2570,9 @@ else
(define_expand "tablejump_internal3"
[(parallel [(set (pc)
@@ -1509,7 +1510,7 @@
""
""
)
-@@ -2410,7 +2632,7 @@ else
+@@ -2411,7 +2633,7 @@ else
(minus (reg 1) (match_operand 1 "register_operand" "")))
(set (reg 1)
(minus (reg 1) (match_dup 1)))]
@@ -1518,7 +1519,7 @@
{
rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
rtx reg = gen_reg_rtx (Pmode);
-@@ -2435,7 +2657,7 @@ else
+@@ -2436,7 +2658,7 @@ else
(define_expand "save_stack_block"
[(match_operand 0 "register_operand" "")
(match_operand 1 "register_operand" "")]
@@ -1527,7 +1528,7 @@
{
emit_move_insn (operands[0], operands[1]);
DONE;
-@@ -2445,7 +2667,7 @@ else
+@@ -2446,7 +2668,7 @@ else
(define_expand "restore_stack_block"
[(match_operand 0 "register_operand" "")
(match_operand 1 "register_operand" "")]
@@ -1536,7 +1537,7 @@
{
rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
rtx rtmp = gen_rtx_REG (SImode, R_TMP);
-@@ -2492,7 +2714,7 @@ else
+@@ -2493,7 +2715,7 @@ else
(define_insn "<optab>_internal"
[(any_return)
@@ -1545,7 +1546,7 @@
""
{
if (microblaze_is_break_handler ())
-@@ -2525,7 +2747,7 @@ else
+@@ -2526,7 +2748,7 @@ else
(define_expand "call"
[(parallel [(call (match_operand 0 "memory_operand" "m")
(match_operand 1 "" "i"))
@@ -1554,7 +1555,7 @@
(use (match_operand 2 "" ""))
(use (match_operand 3 "" ""))])]
""
-@@ -2546,12 +2768,12 @@ else
+@@ -2547,12 +2769,12 @@ else
if (GET_CODE (XEXP (operands[0], 0)) == UNSPEC)
emit_call_insn (gen_call_internal_plt0 (operands[0], operands[1],
@@ -1569,7 +1570,7 @@
GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)));
DONE;
-@@ -2561,7 +2783,7 @@ else
+@@ -2562,7 +2784,7 @@ else
(define_expand "call_internal0"
[(parallel [(call (match_operand 0 "" "")
(match_operand 1 "" ""))
@@ -1578,7 +1579,7 @@
""
{
}
-@@ -2570,18 +2792,34 @@ else
+@@ -2571,18 +2793,34 @@ else
(define_expand "call_internal_plt0"
[(parallel [(call (match_operand 0 "" "")
(match_operand 1 "" ""))
@@ -1619,7 +1620,7 @@
"flag_pic"
{
register rtx target2 = gen_rtx_REG (Pmode,
-@@ -2593,10 +2831,41 @@ else
+@@ -2594,10 +2832,41 @@ else
(set_attr "mode" "none")
(set_attr "length" "4")])
@@ -1663,7 +1664,7 @@
""
{
register rtx target = operands[0];
-@@ -2630,7 +2899,7 @@ else
+@@ -2631,7 +2900,7 @@ else
[(parallel [(set (match_operand 0 "register_operand" "=d")
(call (match_operand 1 "memory_operand" "m")
(match_operand 2 "" "i")))
@@ -1672,7 +1673,7 @@
(use (match_operand 3 "" ""))])] ;; next_arg_reg
""
{
-@@ -2651,13 +2920,13 @@ else
+@@ -2652,13 +2921,13 @@ else
if (GET_CODE (XEXP (operands[1], 0)) == UNSPEC)
emit_call_insn (gen_call_value_intern_plt0 (operands[0], operands[1],
operands[2],
@@ -1688,7 +1689,7 @@
GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)));
DONE;
-@@ -2669,7 +2938,7 @@ else
+@@ -2670,7 +2939,7 @@ else
[(parallel [(set (match_operand 0 "" "")
(call (match_operand 1 "" "")
(match_operand 2 "" "")))
@@ -1697,7 +1698,7 @@
])]
""
{}
-@@ -2679,18 +2948,35 @@ else
+@@ -2680,18 +2949,35 @@ else
[(parallel[(set (match_operand 0 "" "")
(call (match_operand 1 "" "")
(match_operand 2 "" "")))
@@ -1739,7 +1740,7 @@
"flag_pic"
{
register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM);
-@@ -2702,11 +2988,46 @@ else
+@@ -2703,11 +2989,46 @@ else
(set_attr "mode" "none")
(set_attr "length" "4")])
@@ -1788,7 +1789,7 @@
""
{
register rtx target = operands[1];
-@@ -2880,7 +3201,6 @@ else
+@@ -2881,7 +3202,6 @@ else
;;if (!register_operand (operands[0], VOIDmode))
;; FAIL;
@@ -1797,10 +1798,10 @@
operands[2], operands[3]));
DONE;
diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze
-index 7671f63c5b5..9fc80b142ce 100644
+index e9a1921ae26..9fc80b142ce 100644
--- a/gcc/config/microblaze/t-microblaze
+++ b/gcc/config/microblaze/t-microblaze
-@@ -2,10 +2,11 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en
+@@ -2,7 +2,8 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en
MULTILIB_DIRNAMES = bs m mh le m64
MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high
MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian
@@ -1808,13 +1809,8 @@
+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian/m64
+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 mxl-multiply-high
MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian
--#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
--#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
-+MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
-+MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
-
- # Extra files
- microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \
+ MULTILIB_EXCEPTIONS += mxl-multiply-high/m64
+ MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64
diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
index d0146083db6..005825f1ec5 100644
--- a/libgcc/config/microblaze/crti.S
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-re-arrangement-of-the-compare-branches.patch
similarity index 92%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-re-arrangement-of-the-compare-branches.patch
index 6329012..0113c65 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-re-arrangement-of-the-compare-branches.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0031-re-arrangement-of-the-compare-branches.patch
@@ -1,7 +1,7 @@
-From e259b63769bf3cc437a665059add98d9480d942c Mon Sep 17 00:00:00 2001
+From 67d89be9ace8f658354fb1378e986451ef435d60 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 3 Aug 2018 15:41:39 +0530
-Subject: [PATCH 36/58] re-arrangement of the compare branches
+Subject: [PATCH 31/54] re-arrangement of the compare branches
---
gcc/config/microblaze/microblaze.c | 28 ++----
@@ -9,10 +9,10 @@
2 files changed, 73 insertions(+), 96 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 3ecda553fe6..cba5d86225c 100644
+index 3c815444574..046bfd05558 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -3827,11 +3827,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3697,11 +3697,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
{
comp_reg = cmp_op0;
condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -25,7 +25,7 @@
}
else if (code == EQ || code == NE)
-@@ -3842,10 +3838,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
+@@ -3712,10 +3708,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[])
else
emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1));
condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx);
@@ -37,7 +37,7 @@
}
else
{
-@@ -3878,10 +3871,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3748,10 +3741,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
comp_reg = cmp_op0;
condition = gen_rtx_fmt_ee (signed_condition (code),
mode, comp_reg, const0_rtx);
@@ -49,7 +49,7 @@
}
else if (code == EQ)
{
-@@ -3896,10 +3886,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3766,10 +3756,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
cmp_op1));
}
condition = gen_rtx_EQ (mode, comp_reg, const0_rtx);
@@ -61,7 +61,7 @@
}
else if (code == NE)
-@@ -3915,10 +3902,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
+@@ -3785,10 +3772,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[])
cmp_op1));
}
condition = gen_rtx_NE (mode, comp_reg, const0_rtx);
@@ -73,7 +73,7 @@
}
else
{
-@@ -3960,7 +3944,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
+@@ -3830,7 +3814,7 @@ microblaze_expand_conditional_branch_df (rtx operands[])
emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1));
condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx);
@@ -83,10 +83,10 @@
/* Implement TARGET_FRAME_POINTER_REQUIRED. */
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index bef750c026a..29ebbfc0c03 100644
+index 33a8b12ef3b..cfe9e5312d1 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
-@@ -2270,7 +2270,27 @@ else
+@@ -2271,7 +2271,27 @@ else
(label_ref (match_operand 1))
(pc)))])
@@ -115,7 +115,7 @@
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
[(match_operand 1 "register_operand" "d")
-@@ -2281,9 +2301,9 @@ else
+@@ -2282,9 +2302,9 @@ else
"TARGET_MB_64"
{
if (operands[3] == pc_rtx)
@@ -127,7 +127,7 @@
}
[(set_attr "type" "branch")
(set_attr "mode" "none")
-@@ -2312,9 +2332,9 @@ else
+@@ -2313,9 +2333,9 @@ else
(define_insn "branch_compare64"
[(set (pc)
@@ -140,7 +140,7 @@
])
(label_ref (match_operand 3))
(pc)))
-@@ -2351,6 +2371,47 @@ else
+@@ -2352,6 +2372,47 @@ else
(set_attr "length" "12")]
)
@@ -188,7 +188,7 @@
(define_insn "branch_compare"
[(set (pc)
(if_then_else (match_operator:SI 0 "cmp_op"
-@@ -2433,74 +2494,6 @@ else
+@@ -2434,74 +2495,6 @@ else
})
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-previous-commit-broke-the-handling-.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-previous-commit-broke-the-handling-.patch
index 9be0478..b74c79e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0032-Patch-Microblaze-previous-commit-broke-the-handling-.patch
@@ -1,7 +1,7 @@
-From 589c4453ab01570d47e6e37e4e546d65398cf58e Mon Sep 17 00:00:00 2001
+From 410348f4fd9b641afa24e6c6b6a62a4c74d18862 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 8 Aug 2018 17:37:26 +0530
-Subject: [PATCH 37/58] [Patch,Microblaze] : previous commit broke the
+Subject: [PATCH 32/54] [Patch,Microblaze] : previous commit broke the
handling of SI Branch compare for Microblaze 32-bit..
---
@@ -9,10 +9,10 @@
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 29ebbfc0c03..1a8853056d7 100644
+index cfe9e5312d1..592757baf2f 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
-@@ -2226,8 +2226,8 @@ else
+@@ -2227,8 +2227,8 @@ else
(define_expand "cbranchsi4"
[(set (pc)
(if_then_else (match_operator 0 "ordered_comparison_operator"
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Support-of-multilibs-with-m64.patch
similarity index 96%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Support-of-multilibs-with-m64.patch
index 464b5a6..353bfa9 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0033-Patch-Microblaze-Support-of-multilibs-with-m64.patch
@@ -1,7 +1,7 @@
-From cfc6628cdf81a7ab268d2699c9bbc465865681c5 Mon Sep 17 00:00:00 2001
+From 802c136f1a41ebfed3b25419e48331038f284e2b Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 11 Sep 2018 13:43:48 +0530
-Subject: [PATCH 38/58] [Patch, Microblaze] : Support of multilibs with m64 ...
+Subject: [PATCH 33/54] [Patch, Microblaze] : Support of multilibs with m64 ...
---
gcc/config/microblaze/microblaze-c.c | 1 +
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Fixed-issues-like.patch
similarity index 80%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Fixed-issues-like.patch
index c9d4b8c..c508b15 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-Fix-various-issues.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0034-Fixed-issues-like.patch
@@ -1,21 +1,19 @@
-From 0405777c25bb8110ebfd8ea69c7df062a4c03d6b Mon Sep 17 00:00:00 2001
+From 2b2c6e96c3aefc86c880be05d93685a4ce97c9f1 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 11 Sep 2018 14:58:00 +0530
-Subject: [PATCH 39/58] Fix various issues
+Subject: [PATCH 34/54] Fixed issues like: 1 Interrupt alignment issue 2 Sign
+ extension issue
-Fixed issues like:
-1 Interrupt alignment issue
-2 Sign extension issue
---
gcc/config/microblaze/microblaze.c | 16 ++++++++++------
gcc/config/microblaze/microblaze.md | 2 +-
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index cba5d86225c..b94902b8fbb 100644
+index 046bfd05558..498c8ca191f 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -2307,9 +2307,14 @@ compute_frame_size (HOST_WIDE_INT size)
+@@ -2177,9 +2177,14 @@ compute_frame_size (HOST_WIDE_INT size)
total_size += gp_reg_size;
@@ -32,7 +30,7 @@
/* No space to be allocated for link register in leaf functions with no other
stack requirements. */
-@@ -2594,7 +2599,6 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2464,7 +2469,6 @@ print_operand (FILE * file, rtx op, int letter)
else if (letter == 'h' || letter == 'j')
{
long val[2];
@@ -40,7 +38,7 @@
long l[2];
if (code == CONST_DOUBLE)
{
-@@ -2609,10 +2613,10 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2479,10 +2483,10 @@ print_operand (FILE * file, rtx op, int letter)
}
else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF)
{
@@ -55,7 +53,7 @@
else if (code == CONST_DOUBLE)
{
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 1a8853056d7..7cc26e7d786 100644
+index 592757baf2f..e7c7cf3e8b5 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -1096,7 +1096,7 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixed-below-issues.patch
similarity index 93%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixed-below-issues.patch
index d5fbf70..61d3526 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-Fixed-below-issues.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0035-Fixed-below-issues.patch
@@ -1,11 +1,14 @@
-From c4d60b379c8d0a5621a0dc2a3a12fb40fe45e83e Mon Sep 17 00:00:00 2001
+From 051d744c06ed3f11f603e37768eece57784c2583 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 26 Nov 2019 17:26:15 +0530
-Subject: [PATCH 40/58] Fixed below issues:
+Subject: [PATCH 35/54] Fixed below issues:
- Floating point print issues in 64bit mode
- Dejagnu Jump related issues
- Added dbl instruction
+
+Conflicts:
+ gcc/config/microblaze/microblaze.md
---
gcc/config/microblaze/microblaze.c | 12 +++-
gcc/config/microblaze/microblaze.h | 7 +++
@@ -15,10 +18,10 @@
5 files changed, 125 insertions(+), 17 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index b94902b8fbb..12b1da852dd 100644
+index 498c8ca191f..e32de46fa62 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -2603,7 +2603,12 @@ print_operand (FILE * file, rtx op, int letter)
+@@ -2473,7 +2473,12 @@ print_operand (FILE * file, rtx op, int letter)
if (code == CONST_DOUBLE)
{
if (GET_MODE (op) == DFmode)
@@ -31,8 +34,8 @@
+ }
else
{
- REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
-@@ -4006,7 +4011,10 @@ microblaze_expand_divide (rtx operands[])
+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
+@@ -3876,7 +3881,10 @@ microblaze_expand_divide (rtx operands[])
gen_rtx_PLUS (QImode, regt1, div_table_rtx));
insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
@@ -45,7 +48,7 @@
LABEL_NUSES (div_end_label) = 1;
emit_barrier ();
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 1f6e2059545..a36e06316aa 100644
+index f6ad4d9fc21..60c552958b8 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -888,10 +888,17 @@ do { \
@@ -67,7 +70,7 @@
/* We need to group -lm as well, since some Newlib math functions
reference __errno! */
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 7cc26e7d786..013c77651c3 100644
+index e7c7cf3e8b5..74bb30cb9e8 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -527,6 +527,15 @@
@@ -86,7 +89,7 @@
(define_insn "fix_truncsfsi2"
[(set (match_operand:SI 0 "register_operand" "=d")
(fix:SI (match_operand:SF 1 "register_operand" "d")))]
-@@ -1300,7 +1309,7 @@
+@@ -1301,7 +1310,7 @@
(define_insn "movdi_long_int"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d")
(match_operand:DI 1 "general_operand" "i"))]
@@ -95,7 +98,7 @@
"addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
[(set_attr "type" "no_delay_arith")
(set_attr "mode" "DI")
-@@ -1583,7 +1592,7 @@
+@@ -1584,7 +1593,7 @@
return "ll%i1\t%0,%1";
case 3:
{
@@ -104,7 +107,7 @@
}
case 5:
return "sl%i0\t%1,%0";
-@@ -2373,9 +2382,9 @@ else
+@@ -2374,9 +2383,9 @@ else
(define_insn "long_branch_compare"
[(set (pc)
@@ -117,7 +120,7 @@
])
(label_ref (match_operand 3))
(pc)))
-@@ -2497,6 +2506,20 @@ else
+@@ -2498,6 +2507,20 @@ else
;;----------------------------------------------------------------
;; Unconditional branches
;;----------------------------------------------------------------
@@ -138,7 +141,7 @@
(define_insn "jump"
[(set (pc)
(label_ref (match_operand 0 "" "")))]
-@@ -2542,17 +2565,25 @@ else
+@@ -2543,17 +2566,25 @@ else
{
//gcc_assert (GET_MODE (operands[0]) == Pmode);
@@ -169,7 +172,7 @@
(use (label_ref (match_operand 1 "" "")))]
""
"bra%?\t%0 "
-@@ -2560,11 +2591,21 @@ else
+@@ -2561,11 +2592,21 @@ else
(set_attr "mode" "none")
(set_attr "length" "4")])
@@ -194,7 +197,7 @@
""
""
)
-@@ -2595,6 +2636,23 @@ else
+@@ -2596,6 +2637,23 @@ else
""
)
@@ -218,7 +221,7 @@
;;----------------------------------------------------------------
;; Function prologue/epilogue and stack allocation
;;----------------------------------------------------------------
-@@ -3101,7 +3159,7 @@ else
+@@ -3102,7 +3160,7 @@ else
;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference
;; between "mfs" and "addik" instructions.
(define_insn "set_got"
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Added-double-arith-instructions.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Added-double-arith-instructions.patch
index 75ee48f..3f52e87 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-Fix-various.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0036-Added-double-arith-instructions.patch
@@ -1,17 +1,16 @@
-From 90edf612331af9b7e99105112c2067a3f085daef Mon Sep 17 00:00:00 2001
+From 2bb5cef1a85d63ebf155bcb0070492b0ad298dd8 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 9 Oct 2018 10:07:08 +0530
-Subject: [PATCH 41/58] Fix various
+Subject: [PATCH 36/54] -Added double arith instructions -Fixed prologue stack
+ pointer decrement issue
--Added double arith instructions
--Fixed prologue stack pointer decrement issue
---
gcc/config/microblaze/microblaze.md | 78 +++++++++++++++++++++++++----
gcc/config/microblaze/t-microblaze | 7 +++
2 files changed, 76 insertions(+), 9 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 013c77651c3..645f48f2847 100644
+index 74bb30cb9e8..1401d6b77ff 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -527,6 +527,66 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
similarity index 84%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
index 2e66625..2253b75 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0037-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch
@@ -1,7 +1,7 @@
-From c7f6fb9d81ce322f71cbef7cc1f5cb2fb8956a27 Mon Sep 17 00:00:00 2001
+From 2feba7c8902be8d5c4cc99feca0581472c16de0c Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 12 Oct 2018 16:07:36 +0530
-Subject: [PATCH 42/58] Fixed the issue in the delay slot with swap
+Subject: [PATCH 37/54] Fixed the issue in the delay slot with swap
instructions
---
@@ -9,7 +9,7 @@
1 file changed, 6 insertions(+)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 645f48f2847..6a1e45a5b66 100644
+index 1401d6b77ff..a91108cf0e5 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -443,6 +443,9 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
similarity index 97%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
index 3d532c6..57905e6 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0038-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch
@@ -1,7 +1,7 @@
-From 16a9a232ae430e691c13157dd5988f9c5c7dfb71 Mon Sep 17 00:00:00 2001
+From 10d59c50195cff30c4e74959ef4cebc9065808a4 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sat, 13 Oct 2018 21:12:43 +0530
-Subject: [PATCH 43/58] Fixed the load store issue with the 32bit arith
+Subject: [PATCH 38/54] Fixed the load store issue with the 32bit arith
libraries
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-extending-the-Dwarf-support-to-64bit-Microblaze.patch
similarity index 80%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-extending-the-Dwarf-support-to-64bit-Microblaze.patch
index d34c103..8f46859 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0039-extending-the-Dwarf-support-to-64bit-Microblaze.patch
@@ -1,14 +1,14 @@
-From b3766742c4e1d401d4f7cdc55a90262681689a20 Mon Sep 17 00:00:00 2001
+From e51fb2d87f412d1f7045050c5c2df664766de706 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 15 Oct 2018 12:00:10 +0530
-Subject: [PATCH 44/58] extending the Dwarf support to 64bit Microblaze
+Subject: [PATCH 39/54] extending the Dwarf support to 64bit Microblaze
---
gcc/config/microblaze/microblaze.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index a36e06316aa..8504a841406 100644
+index 60c552958b8..747adcc7a70 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-fixing-the-typo-errors-in-umodsi3-file.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-fixing-the-typo-errors-in-umodsi3-file.patch
index a69c71d..e7e581e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-fixing-the-typo-errors-in-umodsi3-file.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0040-fixing-the-typo-errors-in-umodsi3-file.patch
@@ -1,7 +1,7 @@
-From bdc9429b5f2300e39ecdf1db63f4d35f8e18a932 Mon Sep 17 00:00:00 2001
+From 61be4b342d470aeb7ad1c0cc5e90f5afdc906c00 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 16 Oct 2018 07:55:46 +0530
-Subject: [PATCH 45/58] fixing the typo errors in umodsi3 file
+Subject: [PATCH 40/54] fixing the typo errors in umodsi3 file
---
libgcc/config/microblaze/umodsi3.S | 6 +++---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-fixing-the-32bit-LTO-related-issue9-1014024.patch
similarity index 92%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-fixing-the-32bit-LTO-related-issue9-1014024.patch
index a5f7afb..9f9afdb 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-fixing-the-32bit-LTO-related-issue9-1014024.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0041-fixing-the-32bit-LTO-related-issue9-1014024.patch
@@ -1,14 +1,14 @@
-From 2226c8b836bdc9d0e2a281d971288e4bcb50d503 Mon Sep 17 00:00:00 2001
+From b1eb7b1f6c33246ded3501364279a5f002cd8de0 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 17 Oct 2018 16:56:14 +0530
-Subject: [PATCH 46/58] fixing the 32bit LTO related issue9(1014024)
+Subject: [PATCH 41/54] fixing the 32bit LTO related issue9(1014024)
---
gcc/config/microblaze/microblaze.h | 24 ++++++++++++++----------
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 8504a841406..0c493b6f6e4 100644
+index 747adcc7a70..bfa7bc9a01c 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
similarity index 81%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
index 4229639..fb31d66 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0042-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch
@@ -1,7 +1,7 @@
-From 8ed304d49f66bc36b39dac8e804a7cdeda642739 Mon Sep 17 00:00:00 2001
+From e0820fe8c8d9b7504595794fe6e65151d22e2acf Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 19 Oct 2018 14:26:25 +0530
-Subject: [PATCH 47/58] Fixed the missing stack adjustment in prologue of
+Subject: [PATCH 42/54] Fixed the missing stack adjustment in prologue of
modsi3 function
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
similarity index 83%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
index 92fa9e5..ce8b138 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0043-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch
@@ -1,7 +1,7 @@
-From d12f2da2ae7fa7946aef94c161730c7b851c086a Mon Sep 17 00:00:00 2001
+From 1f288ec920d938accb084dc0d1d6f6115950c014 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 24 Oct 2018 18:31:04 +0530
-Subject: [PATCH 48/58] [Patch,Microblaze] : corrected SPN for dlong
+Subject: [PATCH 43/54] [Patch,Microblaze] : corrected SPN for dlong
instruction mapping.
---
@@ -9,7 +9,7 @@
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 6a1e45a5b66..53dbe4e4060 100644
+index a91108cf0e5..19801f8edcc 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -602,9 +602,9 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-fixing-the-long-long-long-mingw-toolchain-issue.patch
similarity index 91%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-fixing-the-long-long-long-mingw-toolchain-issue.patch
index 346157c..fec0a2a 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0044-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,7 +1,7 @@
-From dfe4f5aa180a7b4c15b4b586b253541aa9d29e52 Mon Sep 17 00:00:00 2001
+From eed2bf4db9bdfc0da1c3f77ce746fb5bfa460b3c Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 29 Nov 2018 17:55:08 +0530
-Subject: [PATCH 49/58] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 44/54] fixing the long & long long mingw toolchain issue
---
gcc/config/microblaze/constraints.md | 2 +-
@@ -9,7 +9,7 @@
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index c2b0a21c53b..4a6cf419671 100644
+index b8ef1650f92..89db511c453 100644
--- a/gcc/config/microblaze/constraints.md
+++ b/gcc/config/microblaze/constraints.md
@@ -55,7 +55,7 @@
@@ -19,10 +19,10 @@
- (match_test "ival > (long)-549755813888 && ival < (long)549755813887")))
+ (match_test "ival > (long long)-549755813888 && ival < (long long)549755813887")))
- ;; Define floating point constraints
+ ;; Define floating point constraints
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 53dbe4e4060..5d277014e42 100644
+index 19801f8edcc..8f0ae901b77 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -648,8 +648,8 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fix-the-MB-64-bug-of-handling-QI-objects.patch
similarity index 87%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fix-the-MB-64-bug-of-handling-QI-objects.patch
index 360bdb5..15acc1c 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0045-Fix-the-MB-64-bug-of-handling-QI-objects.patch
@@ -1,17 +1,17 @@
-From b21e115bc1af625b2ae1acb893027af6af3c2d16 Mon Sep 17 00:00:00 2001
+From 682f65fa3a6b37c207b0d727dd22b6f8cc5d8d3d Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Thu, 14 Mar 2019 18:11:04 +0530
-Subject: [PATCH 50/58] Fix the MB-64 bug of handling QI objects
+Subject: [PATCH 45/54] Fix the MB-64 bug of handling QI objects
---
gcc/config/microblaze/microblaze.md | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 5d277014e42..a1363935c42 100644
+index 8f0ae901b77..207d2bf1b55 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
-@@ -2347,11 +2347,11 @@ else
+@@ -2348,11 +2348,11 @@ else
(define_insn "branch_zero_64"
[(set (pc)
@@ -26,7 +26,7 @@
]
"TARGET_MB_64"
{
-@@ -2367,11 +2367,11 @@ else
+@@ -2368,11 +2368,11 @@ else
(define_insn "long_branch_zero"
[(set (pc)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
similarity index 91%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
index 6b7bb2a..eebf6ee 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0046-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch
@@ -1,17 +1,15 @@
-From ed17f79b22769e5a256e3990715e32e943bfd929 Mon Sep 17 00:00:00 2001
+From 444a09859149f8d21777a1c859ef2305ff86b211 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Fri, 29 Mar 2019 12:08:39 +0530
-Subject: [PATCH 51/58] [Patch,Microblaze] : Check the possibiity of peephole2
- opt
+Subject: [PATCH 46/54] [Patch,Microblaze] : We will check the possibility of
+ peephole2 optimization,if we can then we will fix the compiler issue.
-We will check the possibility of peephole2
-optimization,if we can then we will fix the compiler issue.
---
gcc/config/microblaze/microblaze.md | 63 +++++++++++++++++------------
1 file changed, 38 insertions(+), 25 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index a1363935c42..626eade9468 100644
+index 207d2bf1b55..9b88666c0a6 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -882,31 +882,44 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
similarity index 99%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
index 45505cf..3437881 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0047-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
@@ -1,7 +1,7 @@
-From d845981b381b0174d97dda8a78d82cf8fcae7ca1 Mon Sep 17 00:00:00 2001
+From 7cc6db7ad5bf2fac80a81711c70ac1147ab87b2c Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Wed, 17 Apr 2019 12:36:16 +0530
-Subject: [PATCH 52/58] [Patch,MicroBlaze]: fixed typos in mul,div and mod
+Subject: [PATCH 47/54] [Patch,MicroBlaze]: fixed typos in mul,div and mod
assembly files.
---
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Author-Nagaraju-nmekala-xilinx.com.patch
similarity index 93%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Author-Nagaraju-nmekala-xilinx.com.patch
index 8dce847..94be6af 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0048-Author-Nagaraju-nmekala-xilinx.com.patch
@@ -1,24 +1,25 @@
-From e3b95d5646d4197bff81105c12bcbc5e7dba1725 Mon Sep 17 00:00:00 2001
+From f6b896effc198b8d9d1e6f33889f029da5e5d96c Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Thu, 18 Apr 2019 16:00:37 +0530
-Subject: [PATCH 53/58] [Patch, microblaze]: MB-64 removal of barrel-shift
- instructions from default
+Subject: [PATCH 48/54] Author: Nagaraju <nmekala@xilinx.com> Date: Wed Apr
+ 17 14:11:00 2019 +0530
-By default MB-64 is generatting barrel-shift instructions. It has been
-removed from default. Barrel-shift instructions will be generated only if
-barrel-shifter is enabled. Similarly to double instructions as well.
+ [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default
+ By default MB-64 is generatting barrel-shift instructions. It has been
+ removed from default. Barrel-shift instructions will be generated only if
+ barrel-shifter is enabled. Similarly to double instructions as well.
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+ Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
---
gcc/config/microblaze/microblaze.c | 2 +-
gcc/config/microblaze/microblaze.md | 269 ++++++++++++++++++++++++++--
2 files changed, 252 insertions(+), 19 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 12b1da852dd..5b4c21af365 100644
+index e32de46fa62..7b48c011550 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -4000,7 +4000,7 @@ microblaze_expand_divide (rtx operands[])
+@@ -3870,7 +3870,7 @@ microblaze_expand_divide (rtx operands[])
emit_insn (gen_rtx_CLOBBER (Pmode, reg18));
if (TARGET_MB_64) {
@@ -28,7 +29,7 @@
}
else {
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 626eade9468..6cc62666269 100644
+index 9b88666c0a6..60afd9be288 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -547,7 +547,7 @@
@@ -146,7 +147,7 @@
else
return "addlik\t%0,r0,%1";
case 3:
-@@ -1388,7 +1424,7 @@
+@@ -1389,7 +1425,7 @@
(define_insn "movdi_long_int"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d")
(match_operand:DI 1 "general_operand" "i"))]
@@ -155,7 +156,7 @@
"addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
[(set_attr "type" "no_delay_arith")
(set_attr "mode" "DI")
-@@ -1655,6 +1691,33 @@
+@@ -1656,6 +1692,33 @@
;; movdf_internal
;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT
;;
@@ -189,7 +190,7 @@
(define_insn "*movdf_internal_64"
[(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m")
(match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))]
-@@ -1671,7 +1734,13 @@
+@@ -1672,7 +1735,13 @@
return "ll%i1\t%0,%1";
case 3:
{
@@ -204,7 +205,7 @@
}
case 5:
return "sl%i0\t%1,%0";
-@@ -1791,11 +1860,21 @@
+@@ -1792,11 +1861,21 @@
"TARGET_MB_64"
{
;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
@@ -227,7 +228,7 @@
else
FAIL;
}
-@@ -1805,7 +1884,7 @@ else
+@@ -1806,7 +1885,7 @@ else
[(set (match_operand:DI 0 "register_operand" "=d,d")
(ashift:DI (match_operand:DI 1 "register_operand" "d,d")
(match_operand:DI 2 "arith_operand" "I,d")))]
@@ -236,7 +237,7 @@
"@
bsllli\t%0,%1,%2
bslll\t%0,%1,%2"
-@@ -1813,6 +1892,51 @@ else
+@@ -1814,6 +1893,51 @@ else
(set_attr "mode" "DI,DI")
(set_attr "length" "4,4")]
)
@@ -288,7 +289,7 @@
;; The following patterns apply when there is no barrel shifter present
(define_insn "*ashlsi3_with_mul_delay"
-@@ -1946,11 +2070,21 @@ else
+@@ -1947,11 +2071,21 @@ else
"TARGET_MB_64"
{
;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
@@ -311,7 +312,7 @@
else
FAIL;
}
-@@ -1960,7 +2094,7 @@ else
+@@ -1961,7 +2095,7 @@ else
[(set (match_operand:DI 0 "register_operand" "=d,d")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d")
(match_operand:DI 2 "arith_operand" "I,d")))]
@@ -320,7 +321,7 @@
"@
bslrai\t%0,%1,%2
bslra\t%0,%1,%2"
-@@ -1968,6 +2102,51 @@ else
+@@ -1969,6 +2103,51 @@ else
(set_attr "mode" "DI,DI")
(set_attr "length" "4,4")]
)
@@ -372,7 +373,7 @@
(define_expand "ashrsi3"
[(set (match_operand:SI 0 "register_operand" "=&d")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -2085,11 +2264,21 @@ else
+@@ -2086,11 +2265,21 @@ else
"TARGET_MB_64"
{
;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65)
@@ -395,7 +396,7 @@
else
FAIL;
}
-@@ -2099,7 +2288,7 @@ else
+@@ -2100,7 +2289,7 @@ else
[(set (match_operand:DI 0 "register_operand" "=d,d")
(lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d")
(match_operand:DI 2 "arith_operand" "I,d")))]
@@ -404,7 +405,7 @@
"@
bslrli\t%0,%1,%2
bslrl\t%0,%1,%2"
-@@ -2108,6 +2297,50 @@ else
+@@ -2109,6 +2298,50 @@ else
(set_attr "length" "4,4")]
)
@@ -455,7 +456,7 @@
(define_expand "lshrsi3"
[(set (match_operand:SI 0 "register_operand" "=&d")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "d")
-@@ -2235,7 +2468,7 @@ else
+@@ -2236,7 +2469,7 @@ else
(eq:DI
(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")))]
@@ -464,7 +465,7 @@
"pcmpleq\t%0,%1,%2"
[(set_attr "type" "arith")
(set_attr "mode" "DI")
-@@ -2247,7 +2480,7 @@ else
+@@ -2248,7 +2481,7 @@ else
(ne:DI
(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")))]
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Added-new-MB-64-single-register-arithmetic-instructi.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Added-new-MB-64-single-register-arithmetic-instructi.patch
index 4ab3cec..81ecbf8 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0055-Added-new-MB-64-single-register-arithmetic-instructi.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0049-Added-new-MB-64-single-register-arithmetic-instructi.patch
@@ -1,14 +1,14 @@
-From 3198a31122bb0436d298d29e986bb69bc3c526a9 Mon Sep 17 00:00:00 2001
+From adb1b8d8cc2a8fb99f474d9166db9f68b8f3f8b4 Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Fri, 23 Aug 2019 16:16:53 +0530
-Subject: [PATCH 55/58] Added new MB-64 single register arithmetic instructions
+Subject: [PATCH 49/54] Added new MB-64 single register arithmetic instructions
---
gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 6cc62666269..696be7b300f 100644
+index 60afd9be288..1ad139cbd44 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -654,6 +654,18 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
similarity index 89%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
index afe3ae9..d452b98 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0050-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch
@@ -1,7 +1,7 @@
-From 1dadde6d9a49010a495529c9b5ea6c2bb75cc5f1 Mon Sep 17 00:00:00 2001
+From 797697692635d4c536181cb007b3b0d63d2431c1 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 26 Aug 2019 15:55:22 +0530
-Subject: [PATCH 56/58] [Patch,MicroBlaze] : Added support for 64 bit Immediate
+Subject: [PATCH 50/54] [Patch,MicroBlaze] : Added support for 64 bit Immediate
values.
---
@@ -10,7 +10,7 @@
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md
-index 4a6cf419671..2432b480a2c 100644
+index 89db511c453..9ad2b099310 100644
--- a/gcc/config/microblaze/constraints.md
+++ b/gcc/config/microblaze/constraints.md
@@ -53,9 +53,9 @@
@@ -23,10 +23,10 @@
- (match_test "ival > (long long)-549755813888 && ival < (long long)549755813887")))
+ (match_test "ival > (long long)-9223372036854775808 && ival < (long long)9223372036854775807")))
- ;; Define floating point constraints
+ ;; Define floating point constraints
diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
-index 696be7b300f..f0a9701ab18 100644
+index 1ad139cbd44..93de8d831fd 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -1334,8 +1334,7 @@
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
similarity index 90%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
index ebd707c..3e0c483 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch
@@ -1,7 +1,7 @@
-From ab73daf6bf1bc652e9557386cba5eb237af66350 Mon Sep 17 00:00:00 2001
+From 697db2e2c2519f27011fbd1960cd8860133aaa84 Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Thu, 9 Jan 2020 12:30:41 +0530
-Subject: [PATCH 57/58] [Patch, microblaze]: Fix Compiler crash with
+Subject: [PATCH 51/54] [Patch, microblaze]: Fix Compiler crash with
-freg-struct-return This patch fixes a bug in MB GCC regarding the passing
struct values in registers. Currently we are only handling SImode With this
patch all other modes are handled properly
@@ -23,10 +23,10 @@
2 files changed, 10 insertions(+), 20 deletions(-)
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 5b4c21af365..31869982d27 100644
+index 7b48c011550..1bba77dab6d 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -4038,7 +4038,16 @@ microblaze_function_value (const_tree valtype,
+@@ -3908,7 +3908,16 @@ microblaze_function_value (const_tree valtype,
const_tree func ATTRIBUTE_UNUSED,
bool outgoing ATTRIBUTE_UNUSED)
{
@@ -45,7 +45,7 @@
/* Implement TARGET_SCHED_ADJUST_COST. */
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 0c493b6f6e4..5eb95c2600a 100644
+index bfa7bc9a01c..d467a7ee65d 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
@@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
similarity index 62%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
index 70e0511..91c7c02 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0052-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch
@@ -1,7 +1,7 @@
-From 6bdb6f300593c4a633a8ec485ac2744a97b51460 Mon Sep 17 00:00:00 2001
+From d7d6835bd839150e864cbb0d9c9c7a497e93bbb8 Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Wed, 8 May 2019 14:12:03 +0530
-Subject: [PATCH 54/58] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
+Subject: [PATCH 52/54] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and
disable fivopts by default
Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default.
@@ -10,26 +10,30 @@
(microblaze_option_optimization_table): Disable fivopts by default.
Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
+
+Conflicts:
+ gcc/common/config/microblaze/microblaze-common.c
---
- gcc/common/config/microblaze/microblaze-common.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
+ gcc/common/config/microblaze/microblaze-common.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
-index 0b9d5a1b453..cf2db8afe36 100644
+index 4391f939626..cf2db8afe36 100644
--- a/gcc/common/config/microblaze/microblaze-common.c
+++ b/gcc/common/config/microblaze/microblaze-common.c
-@@ -27,13 +27,15 @@
- /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
- static const struct default_options microblaze_option_optimization_table[] =
- {
-- /* Turn off ivopts by default. It messes up cse. */
+@@ -24,7 +24,18 @@
+ #include "common/common-target.h"
+ #include "common/common-target-def.h"
+
++/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
++static const struct default_options microblaze_option_optimization_table[] =
++ {
+ /* Turn off ivopts by default. It messes up cse.
+ { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, */
- { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 },
-- { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
- { OPT_LEVELS_NONE, 0, NULL, 0 }
- };
-
++ { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 },
++ { OPT_LEVELS_NONE, 0, NULL, 0 }
++ };
++
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
similarity index 83%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
index 1f8decc..377154d 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0053-Patch-microblaze-Reducing-Stack-space-for-arguments.patch
@@ -1,7 +1,7 @@
-From 59273a71f1f180456d87eb4a1a5f95fcc6d17003 Mon Sep 17 00:00:00 2001
+From e146b21e18e51ab6ce77af2c39cdf3375606c1eb Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 17 Jan 2017 16:42:44 +0530
-Subject: [PATCH 18/58] [Patch, microblaze]: Reducing Stack space for arguments
+Date: Tue, 24 Nov 2020 12:26:32 +0530
+Subject: [PATCH 53/54] [Patch, microblaze]: Reducing Stack space for arguments
Currently in Microblaze target stack space for arguments in register is being
allocated even if there are no arguments in the function.
@@ -9,13 +9,6 @@
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
:Ajit Agarwal <ajitkum@xilinx.com>
-
-ChangeLog:
-2015-04-17 Nagaraju Mekala <nmekala@xilix.com>
- Ajit Agarwal <ajitkum@xilinx.com>
-
- *microblaze.c (microblaze_parm_needs_stack, microblaze_function_parms_need_stack): New
- *microblaze.c (REG_PARM_STACK_SPACE): Modify
---
gcc/config/microblaze/microblaze-protos.h | 1 +
gcc/config/microblaze/microblaze.c | 132 +++++++++++++++++++++-
@@ -23,10 +16,10 @@
3 files changed, 134 insertions(+), 3 deletions(-)
diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
-index 982b2abd2d4..96f7bb67f6c 100644
+index 460feac4ac5..b8a3321dbdf 100644
--- a/gcc/config/microblaze/microblaze-protos.h
+++ b/gcc/config/microblaze/microblaze-protos.h
-@@ -59,6 +59,7 @@ extern int symbol_mentioned_p (rtx);
+@@ -60,6 +60,7 @@ extern int symbol_mentioned_p (rtx);
extern int label_mentioned_p (rtx);
extern bool microblaze_cannot_force_const_mem (machine_mode, rtx);
extern void microblaze_eh_return (rtx op0);
@@ -35,10 +28,10 @@
/* Declare functions in microblaze-c.c. */
diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
-index 9eae5515c60..a4bdf66f045 100644
+index 1bba77dab6d..dac0596bc7d 100644
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
-@@ -2057,6 +2057,136 @@ microblaze_must_save_register (int regno)
+@@ -2080,6 +2080,136 @@ microblaze_must_save_register (int regno)
return 0;
}
@@ -120,8 +113,8 @@
+ args_so_far = pack_cumulative_args (&args_so_far_v);
+
+ /* When incoming, we will have been passed the function decl.
-+ * It is necessary to use the decl to handle K&R style functions,
-+ * where TYPE_ARG_TYPES may not be available. */
++ * * It is necessary to use the decl to handle K&R style functions,
++ * * where TYPE_ARG_TYPES may not be available. */
+ if (incoming)
+ {
+ gcc_assert (DECL_P (fun));
@@ -153,7 +146,7 @@
+
+ FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter)
+ {
-+ num_of_args++;
++ num_of_args;
+ if (microblaze_parm_needs_stack (args_so_far, arg_type))
+ return true;
+ }
@@ -175,30 +168,30 @@
/* Return the bytes needed to compute the frame pointer from the current
stack pointer.
-@@ -3403,7 +3533,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
+@@ -3470,7 +3600,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
emit_insn (gen_indirect_jump (temp2));
/* Run just enough of rest_of_compilation. This sequence was
- "borrowed" from rs6000.c. */
-+ "borrowed" from microblaze.c. */
++ "borrowed" from microblaze.c */
insn = get_insns ();
shorten_branches (insn);
assemble_start_function (thunk_fndecl, fnname);
diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 8aa3f155790..1e155e4041c 100644
+index d467a7ee65d..be6c798c889 100644
--- a/gcc/config/microblaze/microblaze.h
+++ b/gcc/config/microblaze/microblaze.h
-@@ -434,9 +434,9 @@ extern struct microblaze_frame_info current_frame_info;
-
+@@ -447,9 +447,9 @@ extern struct microblaze_frame_info current_frame_info;
#define ARG_POINTER_CFA_OFFSET(FNDECL) 0
+ #define DWARF_CIE_DATA_ALIGNMENT -1
-#define REG_PARM_STACK_SPACE(FNDECL) (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
-+#define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL)
++#define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL)
-#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
-+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
++#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
- #define STACK_BOUNDARY 32
+ #define STACK_BOUNDARY (TARGET_MB_64 ? 64 : 32)
--
2.17.1
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch
deleted file mode 100644
index e3c4b87..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From dd73d8ba32c0c24f17a54538b9bb54beb5d8d4e0 Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@kernel.crashing.org>
-Date: Thu, 13 Aug 2020 16:28:57 -0500
-Subject: [PATCH 58/58] microblaze: Avoid UINTPTR_TYPE macro redefinition
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- gcc/config/microblaze/microblaze.h | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
-index 5eb95c2600a..4cb98bac849 100644
---- a/gcc/config/microblaze/microblaze.h
-+++ b/gcc/config/microblaze/microblaze.h
-@@ -246,11 +246,6 @@ extern enum pipeline_type microblaze_pipe;
- #undef PTRDIFF_TYPE
- #define PTRDIFF_TYPE (TARGET_MB_64 ? "long int" : "int")
-
--/*#undef INTPTR_TYPE
--#define INTPTR_TYPE (TARGET_MB_64 ? "long int" : "int")*/
--#undef UINTPTR_TYPE
--#define UINTPTR_TYPE (TARGET_MB_64 ? "long unsigned int" : "unsigned int")
--
- #define DATA_ALIGNMENT(TYPE, ALIGN) \
- ((((ALIGN) < BITS_PER_WORD) \
- && (TREE_CODE (TYPE) == ARRAY_TYPE \
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/microblaze-mulitlib-hack.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/microblaze-mulitlib-hack.patch
new file mode 100644
index 0000000..af8ebf3
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/microblaze-mulitlib-hack.patch
@@ -0,0 +1,58 @@
+Microblaze Mulitlib hack
+
+Based on the patch:
+
+From c2081c51db589471ea713870c72f13999abda815 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Fri, 29 Mar 2013 09:10:06 +0400
+Subject: [PATCH 04/36] 64-bit multilib hack.
+
+GCC has internal multilib handling code but it assumes a very specific rigid directory
+layout. The build system implementation of multilib layout is very generic and allows
+complete customisation of the library directories.
+
+This patch is a partial solution to allow any custom directories to be passed into gcc
+and handled correctly. It forces gcc to use the base_libdir (which is the current
+directory, "."). We need to do this for each multilib that is configured as we don't
+know which compiler options may be being passed into the compiler. Since we have a compiler
+per mulitlib at this point that isn't an issue.
+
+The one problem is the target compiler is only going to work for the default multlilib at
+this point. Ideally we'd figure out which multilibs were being enabled with which paths
+and be able to patch these entries with a complete set of correct paths but this we
+don't have such code at this point. This is something the target gcc recipe should do
+and override these platform defaults in its build config.
+
+Do same for riscv64 and aarch64
+
+RP 15/8/11
+
+Upstream-Status: Inappropriate[OE-Specific]
+
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+Signed-off-by: Elvis Dowson <elvis.dowson@gmail.com>
+Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+
+Index: gcc-9.2.0/gcc/config/microblaze/t-microblaze
+===================================================================
+--- gcc-9.2.0.orig/gcc/config/microblaze/t-microblaze
++++ gcc-9.2.0/gcc/config/microblaze/t-microblaze
+@@ -1,5 +1,6 @@
+ MULTILIB_OPTIONS = m64 mxl-barrel-shift mlittle-endian mno-xl-soft-mul mxl-multiply-high
+-MULTILIB_DIRNAMES = m64 bs le m mh
++#MULTILIB_DIRNAMES = m64 bs le m mh
++MULTILIB_DIRNAMES = . . . . .
+ MULTILIB_EXCEPTIONS = *m64/mxl-multiply-high mxl-multiply-high
+ MULTILIB_EXCEPTIONS += *m64
+ MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift
+Index: gcc-9.2.0/gcc/config/microblaze/t-microblaze-linux
+===================================================================
+--- gcc-9.2.0.orig/gcc/config/microblaze/t-microblaze-linux
++++ gcc-9.2.0/gcc/config/microblaze/t-microblaze-linux
+@@ -1,3 +1,4 @@
+ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high
+-MULTILIB_DIRNAMES = bs m mh
++#MULTILIB_DIRNAMES = bs m mh
++MULTILIB_DIRNAMES = . . .
+ MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
index 79b895f..f1ba2ea 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-source_10.%.bbappend
@@ -4,60 +4,56 @@
SRC_URI_append_microblaze = " \
file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \
file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \
- file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \
- file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \
- file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \
- file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \
- file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \
- file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \
- file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \
- file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \
- file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \
- file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \
- file://0013-Patch-microblaze-Use-bralid-for-profiler-calls.patch \
- file://0014-Patch-microblaze-Disable-fivopts-by-default.patch \
- file://0015-Patch-microblaze-Removed-moddi3-routinue.patch \
- file://0016-Patch-microblaze-Add-INIT_PRIORITY-support.patch \
- file://0017-Patch-microblaze-Add-optimized-lshrsi3.patch \
- file://0018-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \
- file://0019-Patch-microblaze-Add-cbranchsi4_reg.patch \
- file://0020-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \
- file://0021-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \
- file://0022-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \
- file://0023-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \
- file://0024-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \
- file://0025-Patch-rtl-Optimization-Better-register-pressure-esti.patch \
- file://0026-Patch-microblaze-Correct-the-const-high-double-immed.patch \
- file://0027-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \
- file://0028-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \
- file://0029-Patch-microblaze-Add-new-bit-field-instructions.patch \
- file://0030-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \
- file://0031-Fixing-the-issue-with-the-builtin_alloc.patch \
- file://0032-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \
- file://0033-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \
- file://0034-Intial-commit-of-64-bit-Microblaze.patch \
- file://0035-Intial-commit-for-64bit-MB-sources.patch \
- file://0036-re-arrangement-of-the-compare-branches.patch \
- file://0037-Patch-Microblaze-previous-commit-broke-the-handling-.patch \
- file://0038-Patch-Microblaze-Support-of-multilibs-with-m64.patch \
- file://0039-Fix-various-issues.patch \
- file://0040-Fixed-below-issues.patch \
- file://0041-Fix-various.patch \
- file://0042-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
- file://0043-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
- file://0044-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
- file://0045-fixing-the-typo-errors-in-umodsi3-file.patch \
- file://0046-fixing-the-32bit-LTO-related-issue9-1014024.patch \
- file://0047-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
- file://0048-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \
- file://0049-fixing-the-long-long-long-mingw-toolchain-issue.patch \
- file://0050-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
- file://0051-Patch-Microblaze-Check-the-possibiity-of-peephole2-o.patch \
- file://0052-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \
- file://0053-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch \
- file://0054-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \
- file://0055-Added-new-MB-64-single-register-arithmetic-instructi.patch \
- file://0056-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \
- file://0057-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \
- file://0058-microblaze-Avoid-UINTPTR_TYPE-macro-redefinition.patch \
+ file://0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \
+ file://0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \
+ file://0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch \
+ file://0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \
+ file://0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \
+ file://0008-Patch-microblaze-Fix-atomic-side-effects.patch \
+ file://0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch \
+ file://0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \
+ file://0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \
+ file://0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch \
+ file://0013-Patch-microblaze-Removed-moddi3-routinue.patch \
+ file://0014-Patch-microblaze-Add-INIT_PRIORITY-support.patch \
+ file://0015-Patch-microblaze-Add-optimized-lshrsi3.patch \
+ file://0016-Patch-microblaze-Add-cbranchsi4_reg.patch \
+ file://0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \
+ file://0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \
+ file://0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \
+ file://0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \
+ file://0021-Patch-microblaze-Correct-the-const-high-double-immed.patch \
+ file://0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \
+ file://0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \
+ file://0024-Patch-microblaze-Add-new-bit-field-instructions.patch \
+ file://0025-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \
+ file://0026-Fixing-the-issue-with-the-builtin_alloc.patch \
+ file://0027-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \
+ file://0028-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \
+ file://0029-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch \
+ file://0030-Intial-commit-for-64bit-MB-sources.patch \
+ file://0031-re-arrangement-of-the-compare-branches.patch \
+ file://0032-Patch-Microblaze-previous-commit-broke-the-handling-.patch \
+ file://0033-Patch-Microblaze-Support-of-multilibs-with-m64.patch \
+ file://0034-Fixed-issues-like.patch \
+ file://0035-Fixed-below-issues.patch \
+ file://0036-Added-double-arith-instructions.patch \
+ file://0037-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \
+ file://0038-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \
+ file://0039-extending-the-Dwarf-support-to-64bit-Microblaze.patch \
+ file://0040-fixing-the-typo-errors-in-umodsi3-file.patch \
+ file://0041-fixing-the-32bit-LTO-related-issue9-1014024.patch \
+ file://0042-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \
+ file://0043-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \
+ file://0044-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+ file://0045-Fix-the-MB-64-bug-of-handling-QI-objects.patch \
+ file://0046-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \
+ file://0047-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \
+ file://0048-Author-Nagaraju-nmekala-xilinx.com.patch \
+ file://0049-Added-new-MB-64-single-register-arithmetic-instructi.patch \
+ file://0050-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \
+ file://0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \
+ file://0052-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \
+ file://0053-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \
+ file://microblaze-mulitlib-hack.patch \
"
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
index 906ef4d..4ba5d98 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc
@@ -5,35 +5,54 @@
FILESEXTRAPATHS_append := ":${THISDIR}/gdb"
SRC_URI_append_microblaze = " \
- file://0001-sim-Allow-microblaze-architecture.patch \
- file://0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
- file://0004-Disable-the-warning-message-for-eh_frame_hdr.patch \
- file://0005-Fix-relaxation-of-assembler-resolved-references.patch \
- file://0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch \
- file://0007-upstream-change-to-garbage-collection-sweep-causes-m.patch \
- file://0008-Fix-bug-in-TLSTPREL-Relocation.patch \
- file://0009-Added-Address-extension-instructions.patch \
- file://0010-Add-new-bit-field-instructions.patch \
- file://0011-fixing-the-imm-bug.patch \
- file://0015-intial-commit-of-MB-64-bit.patch \
- file://0016-MB-X-initial-commit.patch \
- file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
- file://0018-Added-relocations-for-MB-X.patch \
- file://0019-Update-MB-x.patch \
- file://0020-Various-fixes.patch \
- file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
- file://0022-fixing-the-.bss-relocation-issue.patch \
- file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
- file://0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch \
- file://0026-fixing-the-long-long-long-mingw-toolchain-issue.patch \
- file://0027-Added-support-to-new-arithmetic-single-register-inst.patch \
- file://0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
- file://0033-Fix-various-compile-warnings.patch \
- file://0034-Add-initial-port-of-linux-gdbserver.patch \
- file://0035-Initial-port-of-core-reading-support.patch \
- file://0036-Fix-debug-message-when-register-is-unavailable.patch \
- file://0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
- file://0038-Initial-support-for-native-gdb.patch \
- file://0039-Fixing-the-issues-related-to-GDB-7.12.patch \
- file://0040-Patch-microblaze-Adding-64-bit-MB-support.patch \
- "
+ file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \
+ file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \
+ file://0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \
+ file://0005-upstream-change-to-garbage-collection-sweep-causes-m.patch \
+ file://0006-Fix-bug-in-TLSTPREL-Relocation.patch \
+ file://0007-Added-Address-extension-instructions.patch \
+ file://0008-fixing-the-MAX_OPCODES-to-correct-value.patch \
+ file://0009-Add-new-bit-field-instructions.patch \
+ file://0010-fixing-the-imm-bug.patch \
+ file://0014-intial-commit-of-MB-64-bit.patch \
+ file://0015-MB-X-initial-commit.patch \
+ file://0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \
+ file://0017-Added-relocations-for-MB-X.patch \
+ file://0018-Fixed-MB-x-relocation-issues.patch \
+ file://0019-Fixing-the-branch-related-issues.patch \
+ file://0020-Fixed-address-computation-issues-with-64bit-address.patch \
+ file://0021-Adding-new-relocation-to-support-64bit-rodata.patch \
+ file://0022-fixing-the-.bss-relocation-issue.patch \
+ file://0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \
+ file://0025-fixing-the-long-long-long-mingw-toolchain-issue.patch \
+ file://0026-Added-support-to-new-arithmetic-single-register-inst.patch \
+ file://0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch \
+ file://0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \
+ file://0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \
+ file://0034-Initial-port-of-core-reading-support-Added-support-f.patch \
+ file://0035-Fix-debug-message-when-register-is-unavailable.patch \
+ file://0036-revert-master-rebase-changes-to-gdbserver.patch \
+ file://0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch \
+ file://0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \
+ file://0039-Initial-support-for-native-gdb.patch \
+ file://0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch \
+ file://0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch \
+ file://0042-porting-GDB-for-linux.patch \
+ file://0043-Binutils-security-check-is-causing-build-error-for-w.patch \
+ file://0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch \
+ file://0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch \
+ file://0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch \
+ file://0047-bfd-elf64-microblaze.c-Fix-build-failures.patch \
+ file://0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch \
+ file://0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch \
+ file://0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch \
+ file://0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch \
+ file://0052-sim-Allow-microblaze-architecture.patch \
+ file://0053-gdb-Fix-microblaze-target-compilation.patch \
+ "
+
+#
+## file://0048-bfd-gas-Use-standard-method-to-set-the-machine-arch.patch \
+## file://0052-opcodes-microblaze-opc.h-Expand-the-size-to-int-to-d.patch \
+## file://0053-opcodes-microblaze-opc.h-MIN_IMML-is-too-large.patch \
+#
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
similarity index 94%
rename from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
index 039bfc9..bf8757a 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
@@ -1,7 +1,7 @@
-From b8e39d2a6b83d0f0a14d4bfeafd47a37d746f159 Mon Sep 17 00:00:00 2001
+From fd3110f46b2de34bddfe855aa8830c957e89d815 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
+Subject: [PATCH 01/52] Add wdc.ext.clear and wdc.ext.flush insns
Added two new instructions, wdc.ext.clear and wdc.ext.flush,
to enable MicroBlaze to flush an external cache, which is
@@ -15,7 +15,7 @@
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 27d8684df04..b6c5016e4d2 100644
+index 62ee3c9a4d..865151f95b 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -91,6 +91,7 @@
@@ -46,7 +46,7 @@
{"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
{"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index aa53dfe6bb5..795c57b5ff6 100644
+index 5a2d3b0c8b..42f3dd3be5 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -33,8 +33,8 @@ enum microblaze_instr
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch
deleted file mode 100644
index 6f05472..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0001-sim-Allow-microblaze-architecture.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From d23be47051b4410e2e74c6db6bf9a1a9f7195f6d Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@kernel.crashing.org>
-Date: Thu, 6 Aug 2020 15:37:52 -0500
-Subject: [PATCH 01/40] sim: Allow microblaze* architecture
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- sim/configure | 2 +-
- sim/configure.tgt | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/sim/configure b/sim/configure
-index 72f95cd5c7a..9e28cc78687 100755
---- a/sim/configure
-+++ b/sim/configure
-@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
-
-
- ;;
-- microblaze-*-*)
-+ microblaze*-*-*)
-
- sim_arch=microblaze
- subdirs="$subdirs microblaze"
-diff --git a/sim/configure.tgt b/sim/configure.tgt
-index 8a8e03d96f4..f6743fe8d41 100644
---- a/sim/configure.tgt
-+++ b/sim/configure.tgt
-@@ -59,7 +59,7 @@ case "${target}" in
- mcore-*-*)
- SIM_ARCH(mcore)
- ;;
-- microblaze-*-*)
-+ microblaze*-*-*)
- SIM_ARCH(microblaze)
- ;;
- mips*-*-*)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
deleted file mode 100644
index 6967a3d..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From d7a3a238edac153f391a65ae45215a117d25bc48 Mon Sep 17 00:00:00 2001
-From: David Holsgrove <david.holsgrove@xilinx.com>
-Date: Wed, 8 May 2013 11:03:36 +1000
-Subject: [PATCH 02/40] Add wdc.ext.clear and wdc.ext.flush insns
-
-Added two new instructions, wdc.ext.clear and wdc.ext.flush,
-to enable MicroBlaze to flush an external cache, which is
-used with the new coherency support for multiprocessing.
-
-Signed-off-by:nagaraju <nmekala@xilix.com>
-Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
----
- opcodes/microblaze-opc.h | 5 ++++-
- opcodes/microblaze-opcm.h | 4 ++--
- 2 files changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 62ee3c9a4d1..865151f95b0 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -91,6 +91,7 @@
- #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */
- #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */
- #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */
-+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */
- #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */
-
- /* New Mask for msrset, msrclr insns. */
-@@ -101,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
-
--#define MAX_OPCODES 289
-+#define MAX_OPCODES 291
-
- struct op_code_struct
- {
-@@ -174,7 +175,9 @@ struct op_code_struct
- {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst },
- {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst },
- {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst },
-+ {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
- {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
-+ {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
- {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
- {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
- {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 5a2d3b0c8bb..42f3dd3be53 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -33,8 +33,8 @@ enum microblaze_instr
- /* 'or/and/xor' are C++ keywords. */
- microblaze_or, microblaze_and, microblaze_xor,
- andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
-- wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd,
-- brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
-+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br,
-+ brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
- bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
- imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
- brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
similarity index 69%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
index 78e1026..28d6057 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-Disable-the-warning-message-for-eh_frame_hdr.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0003-Disable-the-warning-message-for-eh_frame_hdr.patch
@@ -1,18 +1,18 @@
-From 2e87167d8c5d40d8dfbd8d879d78ab0bd6f3bdfd Mon Sep 17 00:00:00 2001
+From 1e223d69ba8c3587c18e57e22dc3b6d2c6ce5cc9 Mon Sep 17 00:00:00 2001
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Date: Fri, 22 Jun 2012 01:20:20 +0200
-Subject: [PATCH 04/40] Disable the warning message for eh_frame_hdr
+Subject: [PATCH 03/52] Disable the warning message for eh_frame_hdr
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---
bfd/elf-eh-frame.c | 3 +++
1 file changed, 3 insertions(+)
-diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
-index b622ffcee2a..26b180f1490 100644
---- a/bfd/elf-eh-frame.c
-+++ b/bfd/elf-eh-frame.c
-@@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
+Index: gdb-9.2/bfd/elf-eh-frame.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf-eh-frame.c
++++ gdb-9.2/bfd/elf-eh-frame.c
+@@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, stru
goto success;
free_no_table:
@@ -26,6 +26,3 @@
hdr_info->u.dwarf.table = FALSE;
if (sec_info)
free (sec_info);
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
new file mode 100644
index 0000000..d5862d8
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0004-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch
@@ -0,0 +1,261 @@
+From e98a2f325e1a90dfd6911d124889f0760d663b5c Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 8 Nov 2016 11:54:08 +0530
+Subject: [PATCH 04/52] [LOCAL]: Fix relaxation of assembler resolved
+ references,Fixup debug_loc sections after linker relaxation Adds a new
+ reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the
+ assembler to the linker when the linker manages to fully resolve a local
+ symbol reference.
+
+This is a workaround for design flaws in the assembler to
+linker interface with regards to linker relaxation.
+
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+
+Conflicts:
+ bfd/elf32-microblaze.c
+ binutils/readelf.c
+ include/elf/microblaze.h
+---
+ bfd/bfd-in2.h | 5 ++
+ bfd/elf32-microblaze.c | 126 ++++++++++++++++++++++++++++---------
+ bfd/libbfd.h | 1 +
+ bfd/reloc.c | 6 ++
+ binutils/readelf.c | 4 ++
+ gas/config/tc-microblaze.c | 4 ++
+ include/elf/microblaze.h | 2 +
+ 7 files changed, 119 insertions(+), 29 deletions(-)
+
+Index: gdb-9.2/bfd/bfd-in2.h
+===================================================================
+--- gdb-9.2.orig/bfd/bfd-in2.h
++++ gdb-9.2/bfd/bfd-in2.h
+@@ -5363,6 +5363,11 @@ value relative to the read-write small d
+ expressions of the form "Symbol Op Symbol" */
+ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
+
++/* This is a 32 bit reloc that stores the 32 bit pc relative
++value in two words (with an imm instruction).No relocation is
++done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_32_NONE,
++
+ /* This is a 64 bit reloc that stores the 32 bit pc relative
+ value in two words (with an imm instruction). No relocation is
+ done here - only used for relaxing */
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
+@@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_h
+ FALSE), /* PC relative offset? */
+
+ /* This reloc does nothing. Used for relaxation. */
++ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */
++ 0, /* Rightshift. */
++ 2, /* Size (0 = byte, 1 = short, 2 = long). */
++ 32, /* Bitsize. */
++ TRUE, /* PC_relative. */
++ 0, /* Bitpos. */
++ complain_overflow_bitfield, /* Complain on overflow. */
++ NULL, /* Special Function. */
++ "R_MICROBLAZE_32_NONE",/* Name. */
++ FALSE, /* Partial Inplace. */
++ 0, /* Source Mask. */
++ 0, /* Dest Mask. */
++ FALSE), /* PC relative offset? */
++
+ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */
+ 0, /* Rightshift. */
+ 3, /* Size (0 = byte, 1 = short, 2 = long). */
+@@ -562,7 +576,10 @@ microblaze_elf_reloc_type_lookup (bfd *
+ case BFD_RELOC_NONE:
+ microblaze_reloc = R_MICROBLAZE_NONE;
+ break;
+- case BFD_RELOC_MICROBLAZE_64_NONE:
++ case BFD_RELOC_MICROBLAZE_32_NONE:
++ microblaze_reloc = R_MICROBLAZE_32_NONE;
++ break;
++ case BFD_RELOC_MICROBLAZE_64_NONE:
+ microblaze_reloc = R_MICROBLAZE_64_NONE;
+ break;
+ case BFD_RELOC_32:
+@@ -1918,18 +1935,26 @@ microblaze_elf_relax_section (bfd *abfd,
+ }
+ break;
+ case R_MICROBLAZE_NONE:
++ case R_MICROBLAZE_32_NONE:
+ {
+ /* This was a PC-relative instruction that was
+ completely resolved. */
+ int sfix, efix;
++ unsigned int val;
+ bfd_vma target_address;
+ target_address = irel->r_addend + irel->r_offset;
+ sfix = calc_fixup (irel->r_offset, 0, sec);
+ efix = calc_fixup (target_address, 0, sec);
+- irel->r_addend -= (efix - sfix);
+- /* Should use HOWTO. */
+- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
+- irel->r_addend);
++
++ /* Validate the in-band val. */
++ val = bfd_get_32 (abfd, contents + irel->r_offset);
++ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
++ }
++ irel->r_addend -= (efix - sfix);
++ /* Should use HOWTO. */
++ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
++ irel->r_addend);
+ }
+ break;
+ case R_MICROBLAZE_64_NONE:
+@@ -1973,30 +1998,73 @@ microblaze_elf_relax_section (bfd *abfd,
+ irelscanend = irelocs + o->reloc_count;
+ for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
+ {
+- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
+- {
+- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++ {
++ unsigned int val;
++
++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++ /* hax: We only do the following fixup for debug location lists. */
++ if (strcmp(".debug_loc", o->name))
++ continue;
++
++ /* This was a PC-relative instruction that was completely resolved. */
++ if (ocontents == NULL)
++ {
++ if (elf_section_data (o)->this_hdr.contents != NULL)
++ ocontents = elf_section_data (o)->this_hdr.contents;
++ else
++ {
++ /* We always cache the section contents.
++ Perhaps, if info->keep_memory is FALSE, we
++ should free them, if we are permitted to. */
++
++ if (o->rawsize == 0)
++ o->rawsize = o->size;
++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++ if (ocontents == NULL)
++ goto error_return;
++ if (!bfd_get_section_contents (abfd, o, ocontents,
++ (file_ptr) 0,
++ o->rawsize))
++ goto error_return;
++ elf_section_data (o)->this_hdr.contents = ocontents;
++ }
++ }
+
+- /* Look at the reloc only if the value has been resolved. */
+- if (isym->st_shndx == shndx
+- && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
+- {
+- if (ocontents == NULL)
+- {
+- if (elf_section_data (o)->this_hdr.contents != NULL)
+- ocontents = elf_section_data (o)->this_hdr.contents;
+- else
+- {
+- /* We always cache the section contents.
+- Perhaps, if info->keep_memory is FALSE, we
+- should free them, if we are permitted to. */
+- if (o->rawsize == 0)
+- o->rawsize = o->size;
+- ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
+- if (ocontents == NULL)
+- goto error_return;
+- if (!bfd_get_section_contents (abfd, o, ocontents,
+- (file_ptr) 0,
++ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
++ if (val != irelscan->r_addend) {
++ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
++ }
++
++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
++ irelscan->r_addend);
++ }
++ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
++ {
++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
++
++ /* Look at the reloc only if the value has been resolved. */
++ if (isym->st_shndx == shndx
++ && (ELF32_ST_TYPE (isym->st_info) == STT_SECTION))
++ {
++ if (ocontents == NULL)
++ {
++ if (elf_section_data (o)->this_hdr.contents != NULL)
++ ocontents = elf_section_data (o)->this_hdr.contents;
++ else
++ {
++ /* We always cache the section contents.
++ Perhaps, if info->keep_memory is FALSE, we
++ should free them, if we are permitted to. */
++ if (o->rawsize == 0)
++ o->rawsize = o->size;
++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
++ if (ocontents == NULL)
++ goto error_return;
++ if (!bfd_get_section_contents (abfd, o, ocontents,
++ (file_ptr) 0,
+ o->rawsize))
+ goto error_return;
+ elf_section_data (o)->this_hdr.contents = ocontents;
+@@ -2032,7 +2100,7 @@ microblaze_elf_relax_section (bfd *abfd,
+ elf_section_data (o)->this_hdr.contents = ocontents;
+ }
+ }
+- irelscan->r_addend -= calc_fixup (irel->r_addend
++ irelscan->r_addend -= calc_fixup (irelscan->r_addend
+ + isym->st_value,
+ 0,
+ sec);
+Index: gdb-9.2/bfd/libbfd.h
+===================================================================
+--- gdb-9.2.orig/bfd/libbfd.h
++++ gdb-9.2/bfd/libbfd.h
+@@ -2903,6 +2903,7 @@ static const char *const bfd_reloc_code_
+ "BFD_RELOC_MICROBLAZE_32_ROSDA",
+ "BFD_RELOC_MICROBLAZE_32_RWSDA",
+ "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
++ "BFD_RELOC_MICROBLAZE_32_NONE",
+ "BFD_RELOC_MICROBLAZE_64_NONE",
+ "BFD_RELOC_MICROBLAZE_64_GOTPC",
+ "BFD_RELOC_MICROBLAZE_64_GOT",
+Index: gdb-9.2/bfd/reloc.c
+===================================================================
+--- gdb-9.2.orig/bfd/reloc.c
++++ gdb-9.2/bfd/reloc.c
+@@ -6807,6 +6807,12 @@ ENUMDOC
+ This is a 32 bit reloc for the microblaze to handle
+ expressions of the form "Symbol Op Symbol"
+ ENUM
++ BFD_RELOC_MICROBLAZE_32_NONE
++ENUMDOC
++ This is a 32 bit reloc that stores the 32 bit pc relative
++ value in two words (with an imm instruction). No relocation is
++ done here - only used for relaxing
++ENUM
+ BFD_RELOC_MICROBLAZE_64_NONE
+ ENUMDOC
+ This is a 64 bit reloc that stores the 32 bit pc relative
+Index: gdb-9.2/include/elf/microblaze.h
+===================================================================
+--- gdb-9.2.orig/include/elf/microblaze.h
++++ gdb-9.2/include/elf/microblaze.h
+@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_relo
+ RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */
+ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
+ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
++ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
++
+ END_RELOC_NUMBERS (R_MICROBLAZE_max)
+
+ /* Global base address names. */
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch
deleted file mode 100644
index d851c58..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fix-relaxation-of-assembler-resolved-references.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 210bb23010e2c3e65f5f54c220d27da0590bab06 Mon Sep 17 00:00:00 2001
-From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
-Date: Tue, 14 Feb 2012 01:00:22 +0100
-Subject: [PATCH 05/40] Fix relaxation of assembler resolved references
-
----
- bfd/elf32-microblaze.c | 41 ++++++++++++++++++++++++++++++++++++++
- 2 files changed, 42 insertions(+)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index c187d83ee04..dfd82438e35 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1973,6 +1973,47 @@ microblaze_elf_relax_section (bfd *abfd,
- irelscanend = irelocs + o->reloc_count;
- for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
- {
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+ {
-+ unsigned int val;
-+
-+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+
-+ /* This was a PC-relative instruction that was completely resolved. */
-+ if (ocontents == NULL)
-+ {
-+ if (elf_section_data (o)->this_hdr.contents != NULL)
-+ ocontents = elf_section_data (o)->this_hdr.contents;
-+ else
-+ {
-+ /* We always cache the section contents.
-+ Perhaps, if info->keep_memory is FALSE, we
-+ should free them, if we are permitted to. */
-+
-+ if (o->rawsize == 0)
-+ o->rawsize = o->size;
-+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize);
-+ if (ocontents == NULL)
-+ goto error_return;
-+ if (!bfd_get_section_contents (abfd, o, ocontents,
-+ (file_ptr) 0,
-+ o->rawsize))
-+ goto error_return;
-+ elf_section_data (o)->this_hdr.contents = ocontents;
-+ }
-+ }
-+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
-+ if (val != irelscan->r_addend) {
-+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
-+ }
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend
-+ + isym->st_value, 0, sec);
-+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
-+ irelscan->r_addend);
-+ }
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
-+ fprintf(stderr, "Unhandled NONE 64\n");
-+ }
- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
- {
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
similarity index 75%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
index 09a17ed..d519530 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-upstream-change-to-garbage-collection-sweep-causes-m.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0005-upstream-change-to-garbage-collection-sweep-causes-m.patch
@@ -1,7 +1,7 @@
-From df187bca3d19a3e5c36182929e7e14bc6a49aad5 Mon Sep 17 00:00:00 2001
+From c78337f4e6459e18e1d2af95d8e313b9dcb3f097 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Wed, 27 Feb 2013 13:56:11 +1000
-Subject: [PATCH 07/40] upstream change to garbage collection sweep causes mb
+Subject: [PATCH 05/52] upstream change to garbage collection sweep causes mb
regression
Upstream change for PR13177 now clears the def_regular during gc_sweep of a
@@ -22,11 +22,11 @@
bfd/elflink.c | 1 -
1 file changed, 1 deletion(-)
-diff --git a/bfd/elflink.c b/bfd/elflink.c
-index 7078a2fb6f4..7926fdf63be 100644
---- a/bfd/elflink.c
-+++ b/bfd/elflink.c
-@@ -6274,7 +6274,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data)
+Index: gdb-9.2/bfd/elflink.c
+===================================================================
+--- gdb-9.2.orig/bfd/elflink.c
++++ gdb-9.2/bfd/elflink.c
+@@ -6274,7 +6274,6 @@ elf_gc_sweep_symbol (struct elf_link_has
inf = (struct elf_gc_sweep_symbol_info *) data;
(*inf->hide_symbol) (inf->info, h, TRUE);
@@ -34,6 +34,3 @@
h->ref_regular = 0;
h->ref_regular_nonweak = 0;
}
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-Fix-bug-in-TLSTPREL-Relocation.patch
similarity index 72%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-Fix-bug-in-TLSTPREL-Relocation.patch
index c37a5ae..2843bc2 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-bug-in-TLSTPREL-Relocation.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-Fix-bug-in-TLSTPREL-Relocation.patch
@@ -1,7 +1,7 @@
-From 0f1d7bd04916af6172780335dc6abc11d45564f2 Mon Sep 17 00:00:00 2001
+From 17ac5acd91e0ef6b103d18018f93fd0fc29a2048 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 15 Jun 2015 16:50:30 +0530
-Subject: [PATCH 08/40] Fix bug in TLSTPREL Relocation
+Subject: [PATCH 06/52] Fix bug in TLSTPREL Relocation
Fixed the problem related to the fixup/relocations TLSTPREL.
When the fixup is applied the addend is not added at the correct offset
@@ -12,11 +12,11 @@
bfd/elf32-microblaze.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cbba704e691..cc4c0568c68 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
+@@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *ou
relocation += addend;
relocation -= dtprel_base(info);
bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
@@ -28,6 +28,3 @@
break;
case (int) R_MICROBLAZE_TEXTREL_64:
case (int) R_MICROBLAZE_TEXTREL_32_LO:
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
deleted file mode 100644
index eea2905..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0006-microblaze-Fixup-debug_loc-sections-after-linker-rel.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From d2aee40b9753b783853bf38d36d9b6e50d16cc20 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 6 Feb 2017 15:53:08 +0530
-Subject: [PATCH 06/40] microblaze: Fixup debug_loc sections after linker
- relaxation
-
-Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing
-reloc info from the assembler to the linker when the linker
-manages to fully resolve a local symbol reference.
-
-This is a workaround for design flaws in the assembler to
-linker interface with regards to linker relaxation.
-
-Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com>
----
- bfd/bfd-in2.h | 5 +++++
- bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++-------
- bfd/libbfd.h | 1 +
- bfd/reloc.c | 6 ++++++
- include/elf/microblaze.h | 1 +
- 7 files changed, 52 insertions(+), 7 deletions(-)
-
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 6f3e41da376..52c81b10b6d 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5363,6 +5363,11 @@ value relative to the read-write small data area anchor */
- expressions of the form "Symbol Op Symbol" */
- BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM,
-
-+/* This is a 32 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_32_NONE,
-+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction). No relocation is
- done here - only used for relaxing */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index dfd82438e35..cbba704e691 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -176,6 +176,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
- 0x0000ffff, /* Dest Mask. */
- FALSE), /* PC relative offset? */
-
-+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */
-+ 0, /* Rightshift. */
-+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
-+ 32, /* Bitsize. */
-+ TRUE, /* PC_relative. */
-+ 0, /* Bitpos. */
-+ complain_overflow_bitfield, /* Complain on overflow. */
-+ NULL, /* Special Function. */
-+ "R_MICROBLAZE_32_NONE",/* Name. */
-+ FALSE, /* Partial Inplace. */
-+ 0, /* Source Mask. */
-+ 0, /* Dest Mask. */
-+ FALSE), /* PC relative offset? */
-+
- /* This reloc does nothing. Used for relaxation. */
- HOWTO (R_MICROBLAZE_64_NONE, /* Type. */
- 0, /* Rightshift. */
-@@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
- case BFD_RELOC_NONE:
- microblaze_reloc = R_MICROBLAZE_NONE;
- break;
-+ case BFD_RELOC_MICROBLAZE_32_NONE:
-+ microblaze_reloc = R_MICROBLAZE_32_NONE;
-+ break;
- case BFD_RELOC_MICROBLAZE_64_NONE:
- microblaze_reloc = R_MICROBLAZE_64_NONE;
- break;
-@@ -1918,14 +1935,22 @@ microblaze_elf_relax_section (bfd *abfd,
- }
- break;
- case R_MICROBLAZE_NONE:
-+ case R_MICROBLAZE_32_NONE:
- {
- /* This was a PC-relative instruction that was
- completely resolved. */
- int sfix, efix;
-+ unsigned int val;
- bfd_vma target_address;
- target_address = irel->r_addend + irel->r_offset;
- sfix = calc_fixup (irel->r_offset, 0, sec);
- efix = calc_fixup (target_address, 0, sec);
-+
-+ /* Validate the in-band val. */
-+ val = bfd_get_32 (abfd, contents + irel->r_offset);
-+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
-+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
-+ }
- irel->r_addend -= (efix - sfix);
- /* Should use HOWTO. */
- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset,
-@@ -1973,12 +1998,16 @@ microblaze_elf_relax_section (bfd *abfd,
- irelscanend = irelocs + o->reloc_count;
- for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
- {
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE)
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
- {
- unsigned int val;
-
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-
-+ /* hax: We only do the following fixup for debug location lists. */
-+ if (strcmp(".debug_loc", o->name))
-+ continue;
-+
- /* This was a PC-relative instruction that was completely resolved. */
- if (ocontents == NULL)
- {
-@@ -2006,14 +2035,10 @@ microblaze_elf_relax_section (bfd *abfd,
- if (val != irelscan->r_addend) {
- fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend);
- }
-- irelscan->r_addend -= calc_fixup (irelscan->r_addend
-- + isym->st_value, 0, sec);
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec);
- microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
- irelscan->r_addend);
- }
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) {
-- fprintf(stderr, "Unhandled NONE 64\n");
-- }
- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
- {
- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-@@ -2073,7 +2098,7 @@ microblaze_elf_relax_section (bfd *abfd,
- elf_section_data (o)->this_hdr.contents = ocontents;
- }
- }
-- irelscan->r_addend -= calc_fixup (irel->r_addend
-+ irelscan->r_addend -= calc_fixup (irelscan->r_addend
- + isym->st_value,
- 0,
- sec);
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 44cefbd66d4..a01891f3423 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2903,6 +2903,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
- "BFD_RELOC_MICROBLAZE_32_ROSDA",
- "BFD_RELOC_MICROBLAZE_32_RWSDA",
- "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
-+ "BFD_RELOC_MICROBLAZE_32_NONE",
- "BFD_RELOC_MICROBLAZE_64_NONE",
- "BFD_RELOC_MICROBLAZE_64_GOTPC",
- "BFD_RELOC_MICROBLAZE_64_GOT",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index b00b79f3190..78f13180c71 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6806,6 +6806,12 @@ ENUM
- ENUMDOC
- This is a 32 bit reloc for the microblaze to handle
- expressions of the form "Symbol Op Symbol"
-+ENUM
-+ BFD_RELOC_MICROBLAZE_32_NONE
-+ENUMDOC
-+ This is a 32 bit reloc that stores the 32 bit pc relative
-+ value in two words (with an imm instruction). No relocation is
-+ done here - only used for relaxing
- ENUM
- BFD_RELOC_MICROBLAZE_64_NONE
- ENUMDOC
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 830b5ad4461..0dba2c0f44f 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
- RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */
- RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
- RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
-+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
- END_RELOC_NUMBERS (R_MICROBLAZE_max)
-
- /* Global base address names. */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-Added-Address-extension-instructions.patch
similarity index 90%
copy from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
copy to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-Added-Address-extension-instructions.patch
index c5bd3b2..a2584ed 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0009-Added-Address-extension-instructions.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0007-Added-Address-extension-instructions.patch
@@ -1,7 +1,7 @@
-From fa85df88dc229f7f8f0bc09cd0995d05f49c03b7 Mon Sep 17 00:00:00 2001
+From 40107e7f6430aebfeba7e8f4eb6d67863520ebd4 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 09/40] Added Address extension instructions
+Subject: [PATCH 07/52] Added Address extension instructions
This patch adds the support of new instructions which are required
for supporting Address extension feature.
@@ -13,27 +13,17 @@
*microblaze-opc.h (op_code_struct): Update
Added new instructions
- Set MAX_OPCODES to matching value
*microblaze-opcm.h (microblaze_instr): Update
Added new instructions
---
- opcodes/microblaze-opc.h | 13 ++++++++++++-
- opcodes/microblaze-opcm.h | 10 +++++-----
+ opcodes/microblaze-opc.h | 11 +++++++++++
+ opcodes/microblaze-opcm.h | 12 ++++++------
2 files changed, 17 insertions(+), 6 deletions(-)
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index b6c5016e4d2..c7a506b845a 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
-
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
-
- struct op_code_struct
- {
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -178,8 +178,11 @@ struct op_code_struct
{"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
{"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
@@ -80,11 +70,11 @@
{"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst },
{"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
{"", 0, 0, 0, 0, 0, 0, 0, 0},
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 795c57b5ff6..b05e319862e 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -33,13 +33,13 @@ enum microblaze_instr
+Index: gdb-9.2/opcodes/microblaze-opcm.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opcm.h
++++ gdb-9.2/opcodes/microblaze-opcm.h
+@@ -33,14 +33,14 @@ enum microblaze_instr
/* 'or/and/xor' are C++ keywords. */
microblaze_or, microblaze_and, microblaze_xor,
andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
@@ -98,11 +88,10 @@
brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
- bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh,
- shr, sw, swr, swx, lbui, lhui, lwi,
+- sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
+ bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
++ sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
fint, fsqrt,
---
-2.17.1
-
+ tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
new file mode 100644
index 0000000..ce2447a
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0008-fixing-the-MAX_OPCODES-to-correct-value.patch
@@ -0,0 +1,22 @@
+From e8cd7c56c206c7a4582008d9059fe7a9ad35a44c Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Thu, 28 Jan 2016 14:07:34 +0530
+Subject: [PATCH 08/52] fixing the MAX_OPCODES to correct value
+
+---
+ opcodes/microblaze-opc.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
+@@ -102,7 +102,7 @@
+ #define DELAY_SLOT 1
+ #define NO_DELAY_SLOT 0
+
+-#define MAX_OPCODES 291
++#define MAX_OPCODES 299
+
+ struct op_code_struct
+ {
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Add-new-bit-field-instructions.patch
similarity index 77%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Add-new-bit-field-instructions.patch
index f94410d..155ef3b 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-Add-new-bit-field-instructions.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Add-new-bit-field-instructions.patch
@@ -1,7 +1,7 @@
-From 32058fa03c18d710b3029108e967be687d00516c Mon Sep 17 00:00:00 2001
+From 01453aca6478379bef05095f64ed79509da3a5ca Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Mon, 18 Jul 2016 12:24:28 +0530
-Subject: [PATCH 10/40] Add new bit-field instructions
+Subject: [PATCH 09/52] Add new bit-field instructions
This patches adds new bsefi and bsifi instructions.
BSEFI- The instruction shall extract a bit field from a
@@ -12,21 +12,25 @@
The rest of the bits in the destination register shall be unchanged
Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+
+Conflicts:
+ opcodes/microblaze-dis.c
---
- opcodes/microblaze-dis.c | 17 +++++++++
+ gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++-
+ opcodes/microblaze-dis.c | 20 +++++++++--
opcodes/microblaze-opc.h | 12 ++++++-
opcodes/microblaze-opcm.h | 6 +++-
- 4 files changed, 103 insertions(+), 3 deletions(-)
+ 4 files changed, 104 insertions(+), 5 deletions(-)
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 2b3aa8e0786..356f1da22ed 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -90,6 +90,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
- return p;
+Index: gdb-9.2/opcodes/microblaze-dis.c
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-dis.c
++++ gdb-9.2/opcodes/microblaze-dis.c
+@@ -91,7 +91,19 @@ get_field_imm5_mbar (struct string_buf *
}
-+static char *
+ static char *
+-get_field_rfsl (struct string_buf *buf, long instr)
+get_field_imm5width (struct string_buf *buf, long instr)
+{
+ char *p = strbuf (buf);
@@ -38,25 +42,28 @@
+ return p;
+}
+
- static char *
- get_field_rfsl (struct string_buf *buf, long instr)
++static char *
++get_field_rfsl (struct string_buf *buf,long instr)
{
-@@ -426,6 +438,11 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+ char *p = strbuf (buf);
+
+@@ -425,7 +437,11 @@ print_insn_microblaze (bfd_vma memaddr,
+ /* For mbar 16 or sleep insn. */
case INST_TYPE_NONE:
break;
- /* For tuqula instruction */
+- /* For tuqula instruction */
+ /* For bit field insns. */
+ case INST_TYPE_RD_R1_IMM5_IMM5:
-+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
-+ break;
++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
++ break;
+ /* For tuqula instruction */
case INST_TYPE_RD:
print_func (stream, "\t%s", get_field_rd (&buf, inst));
break;
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d9a84e575e8..d3b234e1fcd 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -59,6 +59,9 @@
/* For mbar. */
#define INST_TYPE_IMM5 20
@@ -104,10 +111,10 @@
+
#endif /* MICROBLAZE_OPC */
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 8be6e97a1d5..c3b2b8f0f6e 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
+Index: gdb-9.2/opcodes/microblaze-opcm.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opcm.h
++++ gdb-9.2/opcodes/microblaze-opcm.h
@@ -29,7 +29,7 @@ enum microblaze_instr
addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
mulh, mulhu, mulhsu,swapb,swaph,
@@ -135,6 +142,3 @@
/* FSL imm mask for get, put instructions. */
#define RFSL_MASK 0x000000F
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch
deleted file mode 100644
index c9903a4..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0009-Added-Address-extension-instructions.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From c0bb923f0978d5767048274cd778c8cbcef184ec Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 18 Jan 2016 12:28:21 +0530
-Subject: [PATCH 09/40] Added Address extension instructions
-
-This patch adds the support of new instructions which are required
-for supporting Address extension feature.
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
-
-ChangeLog:
- 2016-01-18 Nagaraju Mekala <nmekala@xilix.com>
-
- *microblaze-opc.h (op_code_struct): Update
- Added new instructions
- Set MAX_OPCODES to matching value
- *microblaze-opcm.h (microblaze_instr): Update
- Added new instructions
----
- opcodes/microblaze-opc.h | 19 +++++++++++++++----
- opcodes/microblaze-opcm.h | 12 ++++++------
- 2 files changed, 21 insertions(+), 10 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 865151f95b0..d9a84e575e8 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -102,7 +102,7 @@
- #define DELAY_SLOT 1
- #define NO_DELAY_SLOT 0
-
--#define MAX_OPCODES 291
-+#define MAX_OPCODES 299
-
- struct op_code_struct
- {
-@@ -178,8 +178,11 @@ struct op_code_struct
- {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst },
- {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst },
- {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst },
-+ {"wdc.clear.ea", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E6, OPCODE_MASK_H34B, wdcclearea, special_inst },
- {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst },
-+ {"mtse", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9500C000, OPCODE_MASK_H13S, mtse,special_inst },
- {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst },
-+ {"mfse", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94088000, OPCODE_MASK_H23S, mfse, special_inst },
- {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst },
- {"brd", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst },
- {"brld", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst },
-@@ -229,18 +232,24 @@ struct op_code_struct
- {"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst },
- {"lbu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst },
- {"lbur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst },
-+ {"lbuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000080, OPCODE_MASK_H4, lbuea, memory_load_inst },
- {"lhu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst },
- {"lhur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst },
-+ {"lhuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000080, OPCODE_MASK_H4, lhuea, memory_load_inst },
- {"lw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst },
- {"lwr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst },
- {"lwx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst },
-+ {"lwea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000080, OPCODE_MASK_H4, lwea, memory_load_inst },
- {"sb", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst },
- {"sbr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst },
-+ {"sbea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000080, OPCODE_MASK_H4, sbea, memory_store_inst },
- {"sh", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst },
- {"shr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst },
-+ {"shea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000080, OPCODE_MASK_H4, shea, memory_store_inst },
- {"sw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst },
- {"swr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst },
- {"swx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst },
-+ {"swea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000080, OPCODE_MASK_H4, swea, memory_store_inst },
- {"lbui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst },
- {"lhui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst },
- {"lwi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst },
-@@ -258,10 +267,10 @@ struct op_code_struct
- {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
- {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
- {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
-- {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
-+ {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, mbi_fadd, arithmetic_inst },
- {"frsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
-- {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
-- {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
-+ {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, mbi_fmul, arithmetic_inst },
-+ {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, mbi_fdiv, arithmetic_inst },
- {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
- {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
- {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
-@@ -405,6 +414,8 @@ struct op_code_struct
- {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst },
- {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst },
- {"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */
-+ {"hibernate", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 8. */
-+ {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */
- {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst },
- {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
- {"", 0, 0, 0, 0, 0, 0, 0, 0},
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index 42f3dd3be53..8be6e97a1d5 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
-@@ -33,14 +33,14 @@ enum microblaze_instr
- /* 'or/and/xor' are C++ keywords. */
- microblaze_or, microblaze_and, microblaze_xor,
- andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
-- wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br,
-- brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
-- bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
-+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, wdcclearea, mts, mtse,
-+ mfs, mfse, mbar, br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd,
-+ bne, bned, blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni,
- imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
- brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
-- bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh,
-- shr, sw, swr, swx, lbui, lhui, lwi,
-- sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv,
-+ bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx,
-+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
-+ sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
- fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
- fint, fsqrt,
- tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-fixing-the-imm-bug.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-fixing-the-imm-bug.patch
new file mode 100644
index 0000000..201dfeb
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0010-fixing-the-imm-bug.patch
@@ -0,0 +1,24 @@
+From b2dc3bfabd4d80be7d90502e3d2dc26b508679cb Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Mon, 10 Jul 2017 16:07:28 +0530
+Subject: [PATCH 10/52] fixing the imm bug. with relax option imm -1 is also
+ getting removed this is corrected now.
+
+---
+ bfd/elf32-microblaze.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
+@@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd,
+ else
+ symval += irel->r_addend;
+
+- if ((symval & 0xffff8000) == 0
+- || (symval & 0xffff8000) == 0xffff8000)
++ if ((symval & 0xffff8000) == 0)
+ {
+ /* We can delete this instruction. */
+ sec->relax[sec->relax_count].addr = irel->r_offset;
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch
deleted file mode 100644
index 3f3c814..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0011-fixing-the-imm-bug.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 121b64d9dafd3119925a7e95a09fa9f388e53922 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Mon, 10 Jul 2017 16:07:28 +0530
-Subject: [PATCH 11/40] fixing the imm bug.
-
-with relax option imm -1 is also getting removed this is corrected now.
----
- bfd/elf32-microblaze.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cc4c0568c68..cb7271f5017 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd,
- else
- symval += irel->r_addend;
-
-- if ((symval & 0xffff8000) == 0
-- || (symval & 0xffff8000) == 0xffff8000)
-+ if ((symval & 0xffff8000) == 0)
- {
- /* We can delete this instruction. */
- sec->relax[sec->relax_count].addr = irel->r_offset;
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0014-intial-commit-of-MB-64-bit.patch
similarity index 91%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0014-intial-commit-of-MB-64-bit.patch
index bda74ad..a2a80d5 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-intial-commit-of-MB-64-bit.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0014-intial-commit-of-MB-64-bit.patch
@@ -1,84 +1,92 @@
-From 48e5b2505d97ca936e9946c3945c72bdcfc1743e Mon Sep 17 00:00:00 2001
+From b6f02b2535c4051db5fdadbf03dbb88438b5d116 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sun, 30 Sep 2018 16:28:28 +0530
-Subject: [PATCH 15/40] intial commit of MB 64-bit
+Subject: [PATCH 14/52] intial commit of MB 64-bit
+Conflicts:
+ bfd/configure
+ bfd/configure.ac
+ bfd/cpu-microblaze.c
+ ld/Makefile.am
+ ld/Makefile.in
+ opcodes/microblaze-dis.c
---
bfd/Makefile.am | 2 +
bfd/Makefile.in | 3 +
bfd/config.bfd | 4 +
bfd/configure | 2 +
bfd/configure.ac | 2 +
- bfd/cpu-microblaze.c | 55 +-
- bfd/doc/Makefile.in | 1 +
- bfd/elf64-microblaze.c | 3560 ++++++++++++++++++++++++++++
+ bfd/cpu-microblaze.c | 53 +-
+ bfd/elf64-microblaze.c | 3610 ++++++++++++++++++++++++++++
bfd/targets.c | 6 +
+ gas/config/tc-microblaze.c | 274 ++-
+ gas/config/tc-microblaze.h | 4 +-
include/elf/common.h | 1 +
ld/Makefile.am | 4 +
- ld/Makefile.in | 7 +
+ ld/Makefile.in | 6 +
ld/configure.tgt | 3 +
ld/emulparams/elf64microblaze.sh | 23 +
ld/emulparams/elf64microblazeel.sh | 23 +
- opcodes/microblaze-dis.c | 43 +-
+ opcodes/microblaze-dis.c | 35 +-
opcodes/microblaze-opc.h | 162 +-
opcodes/microblaze-opcm.h | 20 +-
- 20 files changed, 4156 insertions(+), 43 deletions(-)
+ 19 files changed, 4197 insertions(+), 40 deletions(-)
create mode 100644 bfd/elf64-microblaze.c
create mode 100644 ld/emulparams/elf64microblaze.sh
create mode 100644 ld/emulparams/elf64microblazeel.sh
-diff --git a/bfd/Makefile.am b/bfd/Makefile.am
-index e5bd28f03f5..35ecb83a1a1 100644
---- a/bfd/Makefile.am
-+++ b/bfd/Makefile.am
-@@ -558,6 +558,7 @@ BFD64_BACKENDS = \
- elf64-ia64.lo \
- elf64-ia64-vms.lo \
- elfxx-ia64.lo \
+Index: gdb-9.2/bfd/Makefile.am
+===================================================================
+--- gdb-9.2.orig/bfd/Makefile.am
++++ gdb-9.2/bfd/Makefile.am
+@@ -568,6 +568,7 @@ BFD64_BACKENDS = \
+ elf64-riscv.lo \
+ elfxx-riscv.lo \
+ elf64-s390.lo \
+ elf64-microblaze.lo \
- elfn32-mips.lo \
- elf64-mips.lo \
- elfxx-mips.lo \
-@@ -597,6 +598,7 @@ BFD64_BACKENDS_CFILES = \
- elf64-gen.c \
- elf64-hppa.c \
- elf64-ia64-vms.c \
-+ elf64-microblaze.c \
- elf64-mips.c \
- elf64-mmix.c \
+ elf64-sparc.lo \
+ elf64-tilegx.lo \
+ elf64-x86-64.lo \
+@@ -602,6 +603,7 @@ BFD64_BACKENDS_CFILES = \
elf64-nfp.c \
-diff --git a/bfd/Makefile.in b/bfd/Makefile.in
-index 15334f10c55..89a2470ec8f 100644
---- a/bfd/Makefile.in
-+++ b/bfd/Makefile.in
-@@ -984,6 +984,7 @@ BFD64_BACKENDS = \
- elf64-ia64.lo \
- elf64-ia64-vms.lo \
- elfxx-ia64.lo \
+ elf64-ppc.c \
+ elf64-s390.c \
++ elf64-microblaze.c \
+ elf64-sparc.c \
+ elf64-tilegx.c \
+ elf64-x86-64.c \
+Index: gdb-9.2/bfd/Makefile.in
+===================================================================
+--- gdb-9.2.orig/bfd/Makefile.in
++++ gdb-9.2/bfd/Makefile.in
+@@ -994,6 +994,7 @@ BFD64_BACKENDS = \
+ elf64-riscv.lo \
+ elfxx-riscv.lo \
+ elf64-s390.lo \
+ elf64-microblaze.lo \
- elfn32-mips.lo \
- elf64-mips.lo \
- elfxx-mips.lo \
-@@ -1023,6 +1024,7 @@ BFD64_BACKENDS_CFILES = \
- elf64-gen.c \
- elf64-hppa.c \
- elf64-ia64-vms.c \
-+ elf64-microblaze.c \
- elf64-mips.c \
- elf64-mmix.c \
+ elf64-sparc.lo \
+ elf64-tilegx.lo \
+ elf64-x86-64.lo \
+@@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \
elf64-nfp.c \
-@@ -1504,6 +1506,7 @@ distclean-compile:
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-hppa.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64-vms.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
+ elf64-ppc.c \
+ elf64-s390.c \
++ elf64-microblaze.c \
+ elf64-sparc.c \
+ elf64-tilegx.c \
+ elf64-x86-64.c \
+@@ -1510,6 +1512,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
- @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
-diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 0a96927e0ed..1fcae568c36 100644
---- a/bfd/config.bfd
-+++ b/bfd/config.bfd
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@
+Index: gdb-9.2/bfd/config.bfd
+===================================================================
+--- gdb-9.2.orig/bfd/config.bfd
++++ gdb-9.2/bfd/config.bfd
@@ -842,11 +842,15 @@ case "${targ}" in
microblazeel*-*)
targ_defvec=microblaze_elf32_le_vec
@@ -95,37 +103,37 @@
;;
#ifdef BFD64
-diff --git a/bfd/configure b/bfd/configure
-index abd7b2a83e5..731c059eba0 100755
---- a/bfd/configure
-+++ b/bfd/configure
-@@ -14804,6 +14804,8 @@ do
- metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;;
- microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
- microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+Index: gdb-9.2/bfd/configure
+===================================================================
+--- gdb-9.2.orig/bfd/configure
++++ gdb-9.2/bfd/configure
+@@ -14879,6 +14879,8 @@ do
+ s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+ score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
+ score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
- mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-diff --git a/bfd/configure.ac b/bfd/configure.ac
-index 7eee83ae4d4..b87f6183b98 100644
---- a/bfd/configure.ac
-+++ b/bfd/configure.ac
-@@ -540,6 +540,8 @@ do
- metag_elf32_vec) tb="$tb elf32-metag.lo elf32.lo $elf" ;;
- microblaze_elf32_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
- microblaze_elf32_le_vec) tb="$tb elf32-microblaze.lo elf32.lo $elf" ;;
+ sh_coff_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;;
+Index: gdb-9.2/bfd/configure.ac
+===================================================================
+--- gdb-9.2.orig/bfd/configure.ac
++++ gdb-9.2/bfd/configure.ac
+@@ -615,6 +615,8 @@ do
+ s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;;
+ score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
+ score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;;
+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;;
- mips_ecoff_be_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_le_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
- mips_ecoff_bele_vec) tb="$tb coff-mips.lo ecoff.lo $ecoff" ;;
-diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 4e05d73f01b..4b48b310c6a 100644
---- a/bfd/cpu-microblaze.c
-+++ b/bfd/cpu-microblaze.c
-@@ -23,7 +23,25 @@
+ sh_coff_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_le_vec) tb="$tb coff-sh.lo $coff" ;;
+ sh_coff_small_vec) tb="$tb coff-sh.lo $coff" ;;
+Index: gdb-9.2/bfd/cpu-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/cpu-microblaze.c
++++ gdb-9.2/bfd/cpu-microblaze.c
+@@ -23,7 +23,24 @@
#include "bfd.h"
#include "libbfd.h"
@@ -146,13 +154,12 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ &bfd_microblaze_arch[1], /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ &bfd_microblaze_arch[1] /* Next in list. */
+},
{
32, /* Bits in a word. */
32, /* Bits in an address. */
-@@ -39,4 +57,39 @@ const bfd_arch_info_type bfd_microblaze_arch =
+@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_
bfd_arch_default_fill, /* Default fill. */
NULL, /* Next in list. */
0 /* Maximum offset of a reloc from the start of an insn. */
@@ -171,8 +178,7 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ &bfd_microblaze_arch[1], /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ &bfd_microblaze_arch[1] /* Next in list. */
+},
+{
+ 64, /* 32 bits in a word. */
@@ -187,29 +193,16 @@
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
-+ NULL, /* Next in list. */
-+ 0 /* Maximum offset of a reloc from the start of an insn. */
++ NULL, /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+}
+#endif
};
-diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in
-index 0115dfc406c..d75411d2af7 100644
---- a/bfd/doc/Makefile.in
-+++ b/bfd/doc/Makefile.in
-@@ -375,6 +375,7 @@ pdfdir = @pdfdir@
- prefix = @prefix@
- program_transform_name = @program_transform_name@
- psdir = @psdir@
-+runstatedir = @runstatedir@
- sbindir = @sbindir@
- sharedstatedir = @sharedstatedir@
- srcdir = @srcdir@
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-new file mode 100644
-index 00000000000..fa4b95e47e0
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
--- /dev/null
-+++ b/bfd/elf64-microblaze.c
-@@ -0,0 +1,3560 @@
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -0,0 +1,3610 @@
+/* Xilinx MicroBlaze-specific support for 32-bit ELF
+
+ Copyright (C) 2009-2016 Free Software Foundation, Inc.
@@ -868,7 +861,7 @@
+/* Set the howto pointer for a RCE ELF reloc. */
+
+static bfd_boolean
-+microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
++microblaze_elf_info_to_howto (bfd * abfd,
+ arelent * cache_ptr,
+ Elf_Internal_Rela * dst)
+{
@@ -881,14 +874,15 @@
+ r_type = ELF64_R_TYPE (dst->r_info);
+ if (r_type >= R_MICROBLAZE_max)
+ {
-+ (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+ abfd, r_type);
++ /* xgettext:c-format */
++ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
++ abfd, r_type);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
+ cache_ptr->howto = microblaze_elf_howto_table [r_type];
-+ return TRUE;
++ return TRUE;
+}
+
+/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */
@@ -1011,7 +1005,6 @@
+ struct elf64_mb_link_hash_entry *eh;
+
+ eh = (struct elf64_mb_link_hash_entry *) entry;
-+ eh->dyn_relocs = NULL;
+ eh->tls_mask = 0;
+ }
+
@@ -1024,7 +1017,7 @@
+microblaze_elf_link_hash_table_create (bfd *abfd)
+{
+ struct elf64_mb_link_hash_table *ret;
-+ bfd_size_type amt = sizeof (struct elf64_mb_link_hash_table);
++ size_t amt = sizeof (struct elf64_mb_link_hash_table);
+
+ ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt);
+ if (ret == NULL)
@@ -1239,6 +1232,7 @@
+ else
+ {
+ bfd_vma relocation;
++ bfd_boolean resolved_to_zero;
+
+ /* This is a final link. */
+ sym = NULL;
@@ -1278,6 +1272,9 @@
+ goto check_reloc;
+ }
+
++ resolved_to_zero = (h != NULL
++ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
++
+ switch ((int) r_type)
+ {
+ case (int) R_MICROBLAZE_SRO32 :
@@ -1312,11 +1309,14 @@
+ }
+ else
+ {
-+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+ bfd_get_filename (input_bfd),
-+ sym_name,
-+ microblaze_elf_howto_table[(int) r_type]->name,
-+ bfd_section_name (sec));
++ _bfd_error_handler
++ /* xgettext:c-format */
++ (_("%pB: the target (%s) of an %s relocation"
++ " is in the wrong section (%pA)"),
++ input_bfd,
++ sym_name,
++ microblaze_elf_howto_table[(int) r_type]->name,
++ sec);
+ /*bfd_set_error (bfd_error_bad_value); ??? why? */
+ ret = FALSE;
+ continue;
@@ -1357,11 +1357,14 @@
+ }
+ else
+ {
-+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"),
-+ bfd_get_filename (input_bfd),
-+ sym_name,
-+ microblaze_elf_howto_table[(int) r_type]->name,
-+ bfd_section_name (sec));
++ _bfd_error_handler
++ /* xgettext:c-format */
++ (_("%pB: the target (%s) of an %s relocation"
++ " is in the wrong section (%pA)"),
++ input_bfd,
++ sym_name,
++ microblaze_elf_howto_table[(int) r_type]->name,
++ sec);
+ /*bfd_set_error (bfd_error_bad_value); ??? why? */
+ ret = FALSE;
+ continue;
@@ -1423,7 +1426,6 @@
+ goto dogot;
+ case (int) R_MICROBLAZE_TLSLD:
+ tls_type = (TLS_TLS | TLS_LD);
-+ /* Fall through. */
+ dogot:
+ case (int) R_MICROBLAZE_GOT_64:
+ {
@@ -1487,7 +1489,8 @@
+ /* Need to generate relocs ? */
+ if ((bfd_link_pic (info) || indx != 0)
+ && (h == NULL
-+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ && !resolved_to_zero)
+ || h->root.type != bfd_link_hash_undefweak))
+ need_relocs = TRUE;
+
@@ -1549,47 +1552,47 @@
+ }
+ else if (IS_TLS_GD(tls_type))
+ {
-+ *offp |= 1;
-+ static_value -= dtprel_base(info);
-+ if (need_relocs)
-+ {
-+ microblaze_elf_output_dynamic_relocation (output_bfd,
-+ htab->srelgot, htab->srelgot->reloc_count++,
-+ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
-+ got_offset, indx ? 0 : static_value);
-+ }
-+ else
-+ {
-+ bfd_put_32 (output_bfd, static_value,
-+ htab->sgot->contents + off2);
-+ }
++ *offp |= 1;
++ static_value -= dtprel_base(info);
++ if (need_relocs)
++ microblaze_elf_output_dynamic_relocation
++ (output_bfd,
++ htab->elf.srelgot,
++ htab->elf.srelgot->reloc_count++,
++ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32,
++ got_offset, indx ? 0 : static_value);
++ else
++ bfd_put_32 (output_bfd, static_value,
++ htab->elf.sgot->contents + off2);
+ }
+ else
+ {
-+ bfd_put_32 (output_bfd, static_value,
-+ htab->sgot->contents + off2);
++ bfd_put_32 (output_bfd, static_value,
++ htab->elf.sgot->contents + off2);
+
-+ /* Relocs for dyn symbols generated by
-+ finish_dynamic_symbols */
-+ if (bfd_link_pic (info) && h == NULL)
-+ {
-+ *offp |= 1;
-+ microblaze_elf_output_dynamic_relocation (output_bfd,
-+ htab->srelgot, htab->srelgot->reloc_count++,
-+ /* symindex= */ indx, R_MICROBLAZE_REL,
-+ got_offset, static_value);
-+ }
++ /* Relocs for dyn symbols generated by
++ finish_dynamic_symbols */
++ if (bfd_link_pic (info) && h == NULL)
++ {
++ *offp |= 1;
++ microblaze_elf_output_dynamic_relocation
++ (output_bfd,
++ htab->elf.srelgot,
++ htab->elf.srelgot->reloc_count++,
++ /* symindex= */ indx, R_MICROBLAZE_REL,
++ got_offset, static_value);
++ }
+ }
+ }
+
+ /* 4. Fixup Relocation with GOT offset value
+ Compute relative address of GOT entry for applying
+ the current relocation */
-+ relocation = htab->sgot->output_section->vma
-+ + htab->sgot->output_offset
++ relocation = htab->elf.sgot->output_section->vma
++ + htab->elf.sgot->output_offset
+ + off
-+ - htab->sgotplt->output_section->vma
-+ - htab->sgotplt->output_offset;
++ - htab->elf.sgotplt->output_section->vma
++ - htab->elf.sgotplt->output_offset;
+
+ /* Apply Current Relocation */
+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
@@ -1606,8 +1609,8 @@
+ bfd_vma immediate;
+ unsigned short lo, high;
+ relocation += addend;
-+ relocation -= htab->sgotplt->output_section->vma
-+ + htab->sgotplt->output_offset;
++ relocation -= (htab->elf.sgotplt->output_section->vma
++ + htab->elf.sgotplt->output_offset);
+ /* Write this value into correct location. */
+ immediate = relocation;
+ lo = immediate & 0x0000ffff;
@@ -1620,8 +1623,8 @@
+ case (int) R_MICROBLAZE_GOTOFF_32:
+ {
+ relocation += addend;
-+ relocation -= htab->sgotplt->output_section->vma
-+ + htab->sgotplt->output_offset;
++ relocation -= (htab->elf.sgotplt->output_section->vma
++ + htab->elf.sgotplt->output_offset);
+ /* Write this value into correct location. */
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ break;
@@ -1663,7 +1666,8 @@
+
+ if ((bfd_link_pic (info)
+ && (h == NULL
-+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
++ && !resolved_to_zero)
+ || h->root.type != bfd_link_hash_undefweak)
+ && (!howto->pc_relative
+ || (h != NULL
@@ -1724,7 +1728,7 @@
+ {
+ BFD_FAIL ();
+ (*_bfd_error_handler)
-+ (_("%pB: probably compiled without -fPIC?"),
++ (_("%B: probably compiled without -fPIC?"),
+ input_bfd);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
@@ -1823,6 +1827,21 @@
+ return ret;
+}
+
++/* Merge backend specific data from an object file to the output
++ object file when linking.
++
++ Note: We only use this hook to catch endian mismatches. */
++static bfd_boolean
++microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
++{
++ /* Check if we have the same endianess. */
++ if (! _bfd_generic_verify_endian_match (ibfd, obfd))
++ return FALSE;
++
++ return TRUE;
++}
++
++
+/* Calculate fixup value for reference. */
+
+static int
@@ -2139,7 +2158,7 @@
+ irelscanend = irelocs + o->reloc_count;
+ for (irelscan = irelocs; irelscan < irelscanend; irelscan++)
+ {
-+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
++ if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)
+ {
+ unsigned int val;
+
@@ -2498,6 +2517,17 @@
+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
+}
+
++/* Update the got entry reference counts for the section being removed. */
++
++static bfd_boolean
++microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
++ struct bfd_link_info * info ATTRIBUTE_UNUSED,
++ asection * sec ATTRIBUTE_UNUSED,
++ const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
++{
++ return TRUE;
++}
++
+/* PIC support. */
+
+#define PLT_ENTRY_SIZE 16
@@ -2614,10 +2644,9 @@
+ else
+ {
+ h = sym_hashes [r_symndx - symtab_hdr->sh_info];
-+
-+ /* PR15323, ref flags aren't set for references in the same
-+ object. */
-+ h->root.non_ir_ref_regular = 1;
++ while (h->root.type == bfd_link_hash_indirect
++ || h->root.type == bfd_link_hash_warning)
++ h = (struct elf_link_hash_entry *) h->root.u.i.link;
+ }
+
+ switch (r_type)
@@ -2653,7 +2682,6 @@
+ tls_type |= (TLS_TLS | TLS_LD);
+ dogottls:
+ sec->has_tls_reloc = 1;
-+ /* Fall through. */
+ case R_MICROBLAZE_GOT_64:
+ if (htab->sgot == NULL)
+ {
@@ -2749,7 +2777,7 @@
+ /* If this is a global symbol, we count the number of
+ relocations we need for this symbol. */
+ if (h != NULL)
-+ head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
++ head = &h->dyn_relocs;
+ else
+ {
+ /* Track dynamic relocs needed for local syms too.
@@ -2776,7 +2804,7 @@
+ p = *head;
+ if (p == NULL || p->sec != sec)
+ {
-+ bfd_size_type amt = sizeof *p;
++ size_t amt = sizeof *p;
+ p = ((struct elf64_mb_dyn_relocs *)
+ bfd_alloc (htab->elf.dynobj, amt));
+ if (p == NULL)
@@ -2886,7 +2914,8 @@
+ struct elf64_mb_link_hash_table *htab;
+ struct elf64_mb_link_hash_entry * eh;
+ struct elf64_mb_dyn_relocs *p;
-+ asection *sdynbss, *s;
++ asection *sdynbss;
++ asection *s, *srel;
+ unsigned int power_of_two;
+ bfd *dynobj;
+
@@ -2968,7 +2997,7 @@
+
+ /* If we didn't find any dynamic relocs in read-only sections, then
+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */
-+ if (p == NULL)
++ if (!_bfd_elf_readonly_dynrelocs (h))
+ {
+ h->non_got_ref = 0;
+ return TRUE;
@@ -2987,11 +3016,19 @@
+ /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker
+ to copy the initial value out of the dynamic object and into the
+ runtime process image. */
-+ dynobj = elf_hash_table (info)->dynobj;
-+ BFD_ASSERT (dynobj != NULL);
++ if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
++ {
++ s = htab->elf.sdynrelro;
++ srel = htab->elf.sreldynrelro;
++ }
++ else
++ {
++ s = htab->elf.sdynbss;
++ srel = htab->elf.srelbss;
++ }
+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
+ {
-+ htab->srelbss->size += sizeof (Elf64_External_Rela);
++ srel->size += sizeof (Elf64_External_Rela);
+ h->needs_copy = 1;
+ }
+
@@ -3001,21 +3038,20 @@
+ if (power_of_two > 3)
+ power_of_two = 3;
+
-+ sdynbss = htab->sdynbss;
+ /* Apply the required alignment. */
-+ sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two));
-+ if (power_of_two > bfd_section_alignment (sdynbss))
++ s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
++ if (power_of_two > s->alignment_power)
+ {
-+ if (! bfd_set_section_alignment (sdynbss, power_of_two))
++ if (!bfd_set_section_alignment (s, power_of_two))
+ return FALSE;
+ }
+
+ /* Define the symbol as being at this point in the section. */
-+ h->root.u.def.section = sdynbss;
-+ h->root.u.def.value = sdynbss->size;
++ h->root.u.def.section = s;
++ h->root.u.def.value = s->size;
+
+ /* Increment the section size to make room for the symbol. */
-+ sdynbss->size += h->size;
++ s->size += h->size;
+ return TRUE;
+}
+
@@ -3075,13 +3111,13 @@
+ /* Make room for this entry. */
+ s->size += PLT_ENTRY_SIZE;
+
-+ /* We also need to make an entry in the .got.plt section, which
-+ will be placed in the .got section by the linker script. */
-+ htab->sgotplt->size += 4;
++ /* We also need to make an entry in the .got.plt section, which
++ will be placed in the .got section by the linker script. */
++ htab->elf.sgotplt->size += 4;
+
-+ /* We also need to make an entry in the .rel.plt section. */
-+ htab->srelplt->size += sizeof (Elf64_External_Rela);
-+ }
++ /* We also need to make an entry in the .rel.plt section. */
++ htab->elf.srelplt->size += sizeof (Elf32_External_Rela);
++ }
+ else
+ {
+ h->plt.offset = (bfd_vma) -1;
@@ -3136,17 +3172,17 @@
+ h->got.offset = (bfd_vma) -1;
+ }
+ else
-+ {
-+ s = htab->sgot;
-+ h->got.offset = s->size;
-+ s->size += need;
-+ htab->srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
-+ }
++ {
++ s = htab->elf.sgot;
++ h->got.offset = s->size;
++ s->size += need;
++ htab->elf.srelgot->size += need * (sizeof (Elf64_External_Rela) / 4);
++ }
+ }
+ else
+ h->got.offset = (bfd_vma) -1;
+
-+ if (eh->dyn_relocs == NULL)
++ if (h->dyn_relocs == NULL)
+ return TRUE;
+
+ /* In the shared -Bsymbolic case, discard space allocated for
@@ -3163,7 +3199,7 @@
+ {
+ struct elf64_mb_dyn_relocs **pp;
+
-+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
++ for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
+ {
+ p->count -= p->pc_count;
+ p->pc_count = 0;
@@ -3173,6 +3209,8 @@
+ pp = &p->next;
+ }
+ }
++ else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
++ h->dyn_relocs = NULL;
+ }
+ else
+ {
@@ -3202,13 +3240,13 @@
+ goto keep;
+ }
+
-+ eh->dyn_relocs = NULL;
++ h->dyn_relocs = NULL;
+
+ keep: ;
+ }
+
+ /* Finally, allocate space. */
-+ for (p = eh->dyn_relocs; p != NULL; p = p->next)
++ for (p = h->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *sreloc = elf_section_data (p->sec)->sreloc;
+ sreloc->size += p->count * sizeof (Elf64_External_Rela);
@@ -3284,8 +3322,8 @@
+ locsymcount = symtab_hdr->sh_info;
+ end_local_got = local_got + locsymcount;
+ lgot_masks = (unsigned char *) end_local_got;
-+ s = htab->sgot;
-+ srel = htab->srelgot;
++ s = htab->elf.sgot;
++ srel = htab->elf.srelgot;
+
+ for (; local_got < end_local_got; ++local_got, ++lgot_masks)
+ {
@@ -3325,10 +3363,10 @@
+
+ if (htab->tlsld_got.refcount > 0)
+ {
-+ htab->tlsld_got.offset = htab->sgot->size;
-+ htab->sgot->size += 8;
++ htab->tlsld_got.offset = htab->elf.sgot->size;
++ htab->elf.sgot->size += 8;
+ if (bfd_link_pic (info))
-+ htab->srelgot->size += sizeof (Elf64_External_Rela);
++ htab->elf.srelgot->size += sizeof (Elf64_External_Rela);
+ }
+ else
+ htab->tlsld_got.offset = (bfd_vma) -1;
@@ -3336,8 +3374,8 @@
+ if (elf_hash_table (info)->dynamic_sections_created)
+ {
+ /* Make space for the trailing nop in .plt. */
-+ if (htab->splt->size > 0)
-+ htab->splt->size += 4;
++ if (htab->elf.splt->size > 0)
++ htab->elf.splt->size += 4;
+ }
+
+ /* The check_relocs and adjust_dynamic_symbol entry points have
@@ -3352,36 +3390,40 @@
+ continue;
+
+ /* It's OK to base decisions on the section name, because none
-+ of the dynobj section names depend upon the input files. */
++ of the dynobj section names depend upon the input files. */
+ name = bfd_section_name (s);
+
+ if (strncmp (name, ".rela", 5) == 0)
-+ {
-+ if (s->size == 0)
-+ {
-+ /* If we don't need this section, strip it from the
-+ output file. This is to handle .rela.bss and
-+ .rela.plt. We must create it in
-+ create_dynamic_sections, because it must be created
-+ before the linker maps input sections to output
-+ sections. The linker does that before
-+ adjust_dynamic_symbol is called, and it is that
-+ function which decides whether anything needs to go
-+ into these sections. */
-+ strip = TRUE;
-+ }
-+ else
-+ {
-+ /* We use the reloc_count field as a counter if we need
-+ to copy relocs into the output file. */
-+ s->reloc_count = 0;
-+ }
-+ }
-+ else if (s != htab->splt && s != htab->sgot && s != htab->sgotplt)
-+ {
-+ /* It's not one of our sections, so don't allocate space. */
-+ continue;
-+ }
++ {
++ if (s->size == 0)
++ {
++ /* If we don't need this section, strip it from the
++ output file. This is to handle .rela.bss and
++ .rela.plt. We must create it in
++ create_dynamic_sections, because it must be created
++ before the linker maps input sections to output
++ sections. The linker does that before
++ adjust_dynamic_symbol is called, and it is that
++ function which decides whether anything needs to go
++ into these sections. */
++ strip = TRUE;
++ }
++ else
++ {
++ /* We use the reloc_count field as a counter if we need
++ to copy relocs into the output file. */
++ s->reloc_count = 0;
++ }
++ }
++ else if (s != htab->elf.splt
++ && s != htab->elf.sgot
++ && s != htab->elf.sgotplt
++ && s != htab->elf.sdynbss
++ && s != htab->elf.sdynrelro)
++ {
++ /* It's not one of our sections, so don't allocate space. */
++ continue;
++ }
+
+ if (strip)
+ {
@@ -3483,7 +3525,7 @@
+
+ /* For non-PIC objects we need absolute address of the GOT entry. */
+ if (!bfd_link_pic (info))
-+ got_addr += htab->sgotplt->output_section->vma + sgotplt->output_offset;
++ got_addr += sgotplt->output_section->vma + sgotplt->output_offset;
+
+ /* Fill in the entry in the procedure linkage table. */
+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff),
@@ -3535,8 +3577,8 @@
+ /* This symbol has an entry in the global offset table. Set it
+ up. */
+
-+ sgot = htab->sgot;
-+ srela = htab->srelgot;
++ sgot = htab->elf.sgot;
++ srela = htab->elf.srelgot;
+ BFD_ASSERT (sgot != NULL && srela != NULL);
+
+ offset = (sgot->output_section->vma + sgot->output_offset
@@ -3683,7 +3725,7 @@
+
+ /* Set the first entry in the global offset table to the address of
+ the dynamic section. */
-+ sgot = bfd_get_linker_section (dynobj, ".got.plt");
++ sgot = htab->elf.sgotplt;
+ if (sgot && sgot->size > 0)
+ {
+ if (sdyn == NULL)
@@ -3695,8 +3737,8 @@
+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
+ }
+
-+ if (htab->sgot && htab->sgot->size > 0)
-+ elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize = 4;
++ if (htab->elf.sgot && htab->elf.sgot->size > 0)
++ elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4;
+
+ return TRUE;
+}
@@ -3721,8 +3763,8 @@
+ put into .sbss. */
+ *secp = bfd_make_section_old_way (abfd, ".sbss");
+ if (*secp == NULL
-+ || ! bfd_set_section_flags (*secp, SEC_IS_COMMON))
-+ return FALSE;
++ || !bfd_set_section_flags (*secp, SEC_IS_COMMON))
++ return FALSE;
+
+ *valp = sym->st_size;
+ }
@@ -3748,10 +3790,11 @@
+#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name
+#define elf_backend_relocate_section microblaze_elf_relocate_section
+#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section
-+#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match
++#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data
+#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup
+
+#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook
++#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook
+#define elf_backend_check_relocs microblaze_elf_check_relocs
+#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol
+#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create
@@ -3770,11 +3813,11 @@
+#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook
+
+#include "elf64-target.h"
-diff --git a/bfd/targets.c b/bfd/targets.c
-index fb0c669e7f7..97b0e473e16 100644
---- a/bfd/targets.c
-+++ b/bfd/targets.c
-@@ -779,6 +779,8 @@ extern const bfd_target mep_elf32_le_vec;
+Index: gdb-9.2/bfd/targets.c
+===================================================================
+--- gdb-9.2.orig/bfd/targets.c
++++ gdb-9.2/bfd/targets.c
+@@ -779,6 +779,8 @@ extern const bfd_target mep_elf32_le_vec
extern const bfd_target metag_elf32_vec;
extern const bfd_target microblaze_elf32_vec;
extern const bfd_target microblaze_elf32_le_vec;
@@ -3783,7 +3826,7 @@
extern const bfd_target mips_ecoff_be_vec;
extern const bfd_target mips_ecoff_le_vec;
extern const bfd_target mips_ecoff_bele_vec;
-@@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_target_vector[] =
+@@ -1150,6 +1152,10 @@ static const bfd_target * const _bfd_tar
&metag_elf32_vec,
@@ -3794,10 +3837,10 @@
µblaze_elf32_vec,
&mips_ecoff_be_vec,
-diff --git a/include/elf/common.h b/include/elf/common.h
-index 75c4fb7e9d7..1584e1c87d0 100644
---- a/include/elf/common.h
-+++ b/include/elf/common.h
+Index: gdb-9.2/include/elf/common.h
+===================================================================
+--- gdb-9.2.orig/include/elf/common.h
++++ gdb-9.2/include/elf/common.h
@@ -339,6 +339,7 @@
#define EM_RISCV 243 /* RISC-V */
#define EM_LANAI 244 /* Lanai 32-bit processor. */
@@ -3806,10 +3849,66 @@
#define EM_NFP 250 /* Netronome Flow Processor. */
#define EM_CSKY 252 /* C-SKY processor family. */
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 356f1da22ed..437f536e96a 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
+Index: gdb-9.2/ld/emulparams/elf64microblaze.sh
+===================================================================
+--- /dev/null
++++ gdb-9.2/ld/emulparams/elf64microblaze.sh
+@@ -0,0 +1,23 @@
++SCRIPT_NAME=elfmicroblaze
++OUTPUT_FORMAT="elf64-microblazeel"
++#BIG_OUTPUT_FORMAT="elf64-microblaze"
++LITTLE_OUTPUT_FORMAT="elf64-microblazeel"
++#TEXT_START_ADDR=0
++NONPAGED_TEXT_START_ADDR=0x28
++ALIGNMENT=4
++MAXPAGESIZE=4
++ARCH=microblaze
++EMBEDDED=yes
++
++NOP=0x80000000
++
++# Hmmm, there's got to be a better way. This sets the stack to the
++# top of the simulator memory (2^19 bytes).
++#PAGE_SIZE=0x1000
++#DATA_ADDR=0x10000
++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }'
++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
++
++TEMPLATE_NAME=elf32
++#GENERATE_SHLIB_SCRIPT=yes
+Index: gdb-9.2/ld/emulparams/elf64microblazeel.sh
+===================================================================
+--- /dev/null
++++ gdb-9.2/ld/emulparams/elf64microblazeel.sh
+@@ -0,0 +1,23 @@
++SCRIPT_NAME=elfmicroblaze
++OUTPUT_FORMAT="elf64-microblazeel"
++#BIG_OUTPUT_FORMAT="elf64-microblaze"
++LITTLE_OUTPUT_FORMAT="elf64-microblazeel"
++#TEXT_START_ADDR=0
++NONPAGED_TEXT_START_ADDR=0x28
++ALIGNMENT=4
++MAXPAGESIZE=4
++ARCH=microblaze
++EMBEDDED=yes
++
++NOP=0x80000000
++
++# Hmmm, there's got to be a better way. This sets the stack to the
++# top of the simulator memory (2^19 bytes).
++#PAGE_SIZE=0x1000
++#DATA_ADDR=0x10000
++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }'
++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
++
++TEMPLATE_NAME=elf32
++#GENERATE_SHLIB_SCRIPT=yes
+Index: gdb-9.2/opcodes/microblaze-dis.c
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-dis.c
++++ gdb-9.2/opcodes/microblaze-dis.c
@@ -33,6 +33,7 @@
#define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW)
#define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW)
@@ -3818,30 +3917,29 @@
#define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW)
#define NUM_STRBUFS 3
-@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr)
+@@ -73,11 +74,19 @@ get_field_imm (struct string_buf *buf, l
}
static char *
-get_field_imm5 (struct string_buf *buf, long instr)
+get_field_imml (struct string_buf *buf, long instr)
- {
- char *p = strbuf (buf);
-
-- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
++{
++ char *p = strbuf (buf);
+ sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
+ return p;
+}
+
+static char *
+get_field_imms (struct string_buf *buf, long instr)
-+{
-+ char *p = strbuf (buf);
-+
+ {
+ char *p = strbuf (buf);
+
+- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW));
+ sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW));
return p;
}
-@@ -91,14 +101,14 @@ get_field_imm5_mbar (struct string_buf *buf, long instr)
+@@ -91,14 +100,14 @@ get_field_imm5_mbar (struct string_buf *
}
static char *
@@ -3859,55 +3957,48 @@
return p;
}
-@@ -306,9 +316,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -306,9 +315,13 @@ print_insn_microblaze (bfd_vma memaddr,
}
}
break;
- case INST_TYPE_RD_R1_IMM5:
+ case INST_TYPE_RD_R1_IMML:
++ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
++ get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
++ /* TODO: Also print symbol */
++ case INST_TYPE_RD_R1_IMMS:
print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
- get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst));
-+ get_field_r1(&buf, inst), get_field_imm (&buf, inst));
-+ /* TODO: Also print symbol */
-+ break;
-+ case INST_TYPE_RD_R1_IMMS:
-+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1(&buf, inst), get_field_imms (&buf, inst));
break;
case INST_TYPE_RD_RFSL:
print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-@@ -412,9 +427,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
- }
- }
- break;
-- case INST_TYPE_RD_R2:
-- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
-- get_field_r2 (&buf, inst));
+@@ -415,6 +428,10 @@ print_insn_microblaze (bfd_vma memaddr,
+ case INST_TYPE_RD_R2:
+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
+ get_field_r2 (&buf, inst));
++ break;
+ case INST_TYPE_IMML:
+ print_func (stream, "\t%s", get_field_imml (&buf, inst));
+ /* TODO: Also print symbol */
-+ break;
-+ case INST_TYPE_RD_R2:
-+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst));
break;
case INST_TYPE_R2:
print_func (stream, "\t%s", get_field_r2 (&buf, inst));
-@@ -439,8 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+@@ -438,8 +455,8 @@ print_insn_microblaze (bfd_vma memaddr,
+ case INST_TYPE_NONE:
break;
- /* For tuqula instruction */
/* For bit field insns. */
- case INST_TYPE_RD_R1_IMM5_IMM5:
-- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
+- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst));
+ case INST_TYPE_RD_R1_IMMW_IMMS:
-+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
-+ get_field_immw (&buf, inst), get_field_imms (&buf, inst));
- break;
++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+ break;
/* For tuqula instruction */
case INST_TYPE_RD:
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index d3b234e1fcd..28dc991c430 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -40,7 +40,7 @@
#define INST_TYPE_RD_SPECIAL 11
#define INST_TYPE_R1 12
@@ -4132,10 +4223,10 @@
+
#endif /* MICROBLAZE_OPC */
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index c3b2b8f0f6e..ad475a4af15 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
+Index: gdb-9.2/opcodes/microblaze-opcm.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opcm.h
++++ gdb-9.2/opcodes/microblaze-opcm.h
@@ -25,6 +25,7 @@
enum microblaze_instr
@@ -4184,6 +4275,3 @@
/* FSL imm mask for get, put instructions. */
#define RFSL_MASK 0x000000F
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch
similarity index 67%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch
index 8bf0739..6f5e0b6 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-MB-X-initial-commit.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0015-MB-X-initial-commit.patch
@@ -1,50 +1,55 @@
-From f82b24b2685d0cde8f8fdd0a1dcffe7b76b2027c Mon Sep 17 00:00:00 2001
+From 070b7b1f35dedc41b1ba9a228d701485b2239ac0 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sun, 30 Sep 2018 16:31:26 +0530
-Subject: [PATCH 16/40] MB-X initial commit code cleanup is needed.
+Subject: [PATCH 15/52] MB-X initial commit code cleanup is needed.
+Conflicts:
+ bfd/elf32-microblaze.c
+ gas/config/tc-microblaze.c
+ opcodes/microblaze-opcm.h
---
bfd/bfd-in2.h | 10 +++
- bfd/elf32-microblaze.c | 63 +++++++++++++++++-
- bfd/elf64-microblaze.c | 59 +++++++++++++++++
+ bfd/elf32-microblaze.c | 59 +++++++++++++-
+ bfd/elf64-microblaze.c | 61 ++++++++++++++-
bfd/libbfd.h | 2 +
- bfd/reloc.c | 12 ++++
+ bfd/reloc.c | 12 +++
+ gas/config/tc-microblaze.c | 154 ++++++++++++++++++++++++++++++-------
include/elf/microblaze.h | 2 +
- opcodes/microblaze-opc.h | 4 +-
+ opcodes/microblaze-opc.h | 10 +--
opcodes/microblaze-opcm.h | 4 +-
- 9 files changed, 243 insertions(+), 40 deletions(-)
+ 9 files changed, 278 insertions(+), 36 deletions(-)
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 52c81b10b6d..c6738960bb2 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5373,11 +5373,21 @@ value in two words (with an imm instruction). No relocation is
- done here - only used for relaxing */
+Index: gdb-9.2/bfd/bfd-in2.h
+===================================================================
+--- gdb-9.2.orig/bfd/bfd-in2.h
++++ gdb-9.2/bfd/bfd-in2.h
+@@ -5374,11 +5374,21 @@ done here - only used for relaxing */
BFD_RELOC_MICROBLAZE_64_NONE,
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imml instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_64,
-+
/* This is a 64 bit reloc that stores the 32 bit pc relative
++ * +value in two words (with an imml instruction). No relocation is
++ * +done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_64,
++
++/* This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
PC-relative GOT offset */
BFD_RELOC_MICROBLAZE_64_GOTPC,
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
+ /* This is a 64 bit reloc that stores the 32 bit pc relative
+value in two words (with an imml instruction). The relocation is
+PC-relative GOT offset */
+ BFD_RELOC_MICROBLAZE_64_GPC,
+
- /* This is a 64 bit reloc that stores the 32 bit pc relative
++/* This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
GOT offset */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cb7271f5017..a31b407cfbf 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+ BFD_RELOC_MICROBLAZE_64_GOT,
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
+@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_h
0x0000ffff, /* Dest Mask. */
TRUE), /* PC relative offset? */
@@ -65,7 +70,7 @@
/* A 64 bit relocation. Table entry not really used. */
HOWTO (R_MICROBLAZE_64, /* Type. */
0, /* Rightshift. */
-@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_h
0x0000ffff, /* Dest Mask. */
TRUE), /* PC relative offset? */
@@ -87,7 +92,7 @@
/* A 64 bit GOT relocation. Table-entry not really used. */
HOWTO (R_MICROBLAZE_GOT_64, /* Type. */
0, /* Rightshift. */
-@@ -619,9 +648,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -619,9 +648,15 @@ microblaze_elf_reloc_type_lookup (bfd *
case BFD_RELOC_VTABLE_ENTRY:
microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
break;
@@ -103,6 +108,15 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
microblaze_reloc = R_MICROBLAZE_GOT_64;
break;
+@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *ou
+ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+ {
+ relocation += addend;
+- if (r_type == R_MICROBLAZE_32)
++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ else
+ {
@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd,
irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
}
@@ -110,7 +124,7 @@
+ case R_MICROBLAZE_IMML_64:
+ {
+ /* This was a PC-relative instruction that was
-+ completely resolved. */
++ completely resolved. */
+ int sfix, efix;
+ unsigned int val;
+ bfd_vma target_address;
@@ -132,28 +146,14 @@
case R_MICROBLAZE_NONE:
case R_MICROBLAZE_32_NONE:
{
-@@ -2038,9 +2095,9 @@ microblaze_elf_relax_section (bfd *abfd,
- microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
- irelscan->r_addend);
- }
-- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-- {
-- isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
-+ {
-+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info);
-
- /* Look at the reloc only if the value has been resolved. */
- if (isym->st_shndx == shndx
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index fa4b95e47e0..d55700fc513 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -116,6 +116,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
- 0x0000ffff, /* Dest Mask. */
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -117,6 +117,21 @@ static reloc_howto_type microblaze_elf_h
TRUE), /* PC relative offset? */
-+ /* A 64 bit relocation. Table entry not really used. */
+ /* A 64 bit relocation. Table entry not really used. */
+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */
+ 0, /* Rightshift. */
+ 4, /* Size (0 = byte, 1 = short, 2 = long). */
@@ -168,10 +168,11 @@
+ 0x0000ffff, /* Dest Mask. */
+ TRUE), /* PC relative offset? */
+
- /* A 64 bit relocation. Table entry not really used. */
++ /* A 64 bit relocation. Table entry not really used. */
HOWTO (R_MICROBLAZE_64, /* Type. */
0, /* Rightshift. */
-@@ -265,6 +280,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+ 2, /* Size (0 = byte, 1 = short, 2 = long). */
+@@ -265,6 +280,21 @@ static reloc_howto_type microblaze_elf_h
0x0000ffff, /* Dest Mask. */
TRUE), /* PC relative offset? */
@@ -193,7 +194,7 @@
/* A 64 bit GOT relocation. Table-entry not really used. */
HOWTO (R_MICROBLAZE_GOT_64, /* Type. */
0, /* Rightshift. */
-@@ -589,9 +619,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -589,9 +619,15 @@ microblaze_elf_reloc_type_lookup (bfd *
case BFD_RELOC_VTABLE_ENTRY:
microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
break;
@@ -209,7 +210,7 @@
case BFD_RELOC_MICROBLAZE_64_GOT:
microblaze_reloc = R_MICROBLAZE_GOT_64;
break;
-@@ -1162,6 +1198,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1172,6 +1208,7 @@ microblaze_elf_relocate_section (bfd *ou
break; /* Do nothing. */
case (int) R_MICROBLAZE_GOTPC_64:
@@ -217,14 +218,23 @@
relocation = htab->sgotplt->output_section->vma
+ htab->sgotplt->output_offset;
relocation -= (input_section->output_section->vma
-@@ -1863,6 +1900,28 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1443,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *ou
+ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0)
+ {
+ relocation += addend;
+- if (r_type == R_MICROBLAZE_32)
++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_32 (input_bfd, relocation, contents + offset);
+ else
+ {
+@@ -1889,6 +1926,28 @@ microblaze_elf_relax_section (bfd *abfd,
irel->r_addend -= calc_fixup (irel->r_addend, 0, sec);
}
break;
+ case R_MICROBLAZE_IMML_64:
+ {
+ /* This was a PC-relative instruction that was
-+ completely resolved. */
++ completely resolved. */
+ int sfix, efix;
+ unsigned int val;
+ bfd_vma target_address;
@@ -246,11 +256,11 @@
case R_MICROBLAZE_NONE:
case R_MICROBLAZE_32_NONE:
{
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index a01891f3423..4e71991273e 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+Index: gdb-9.2/bfd/libbfd.h
+===================================================================
+--- gdb-9.2.orig/bfd/libbfd.h
++++ gdb-9.2/bfd/libbfd.h
+@@ -2905,7 +2905,9 @@ static const char *const bfd_reloc_code_
"BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
"BFD_RELOC_MICROBLAZE_32_NONE",
"BFD_RELOC_MICROBLAZE_64_NONE",
@@ -260,52 +270,67 @@
"BFD_RELOC_MICROBLAZE_64_GOT",
"BFD_RELOC_MICROBLAZE_64_PLT",
"BFD_RELOC_MICROBLAZE_64_GOTOFF",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 78f13180c71..8b3cc604738 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6814,12 +6814,24 @@ ENUMDOC
- done here - only used for relaxing
+Index: gdb-9.2/bfd/reloc.c
+===================================================================
+--- gdb-9.2.orig/bfd/reloc.c
++++ gdb-9.2/bfd/reloc.c
+@@ -6815,6 +6815,12 @@ ENUMDOC
ENUM
BFD_RELOC_MICROBLAZE_64_NONE
-+ENUMDOC
+ ENUMDOC
+ This is a 32 bit reloc that stores the 32 bit pc relative
+ value in two words (with an imml instruction). No relocation is
+ done here - only used for relaxing
+ENUM
+ BFD_RELOC_MICROBLAZE_64
- ENUMDOC
++ENUMDOC
This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). No relocation is
done here - only used for relaxing
- ENUM
+@@ -6822,6 +6828,12 @@ ENUM
BFD_RELOC_MICROBLAZE_64_GOTPC
-+ENUMDOC
-+ This is a 64 bit reloc that stores the 32 bit pc relative
+ ENUMDOC
+ This is a 64 bit reloc that stores the 32 bit pc relative
+ value in two words (with an imml instruction). No relocation is
+ done here - only used for relaxing
+ENUM
+ BFD_RELOC_MICROBLAZE_64_GPC
- ENUMDOC
- This is a 64 bit reloc that stores the 32 bit pc relative
++ENUMDOC
++ This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
-diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
-index 0dba2c0f44f..030eb99a1a0 100644
---- a/include/elf/microblaze.h
-+++ b/include/elf/microblaze.h
-@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
+ PC-relative GOT offset
+ ENUM
+Index: gdb-9.2/include/elf/microblaze.h
+===================================================================
+--- gdb-9.2.orig/include/elf/microblaze.h
++++ gdb-9.2/include/elf/microblaze.h
+@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_relo
RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34)
+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */
+
END_RELOC_NUMBERS (R_MICROBLAZE_max)
- /* Global base address names. */
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 28dc991c430..46263bc7e16 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
+@@ -282,10 +282,10 @@ struct op_code_struct
+ {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
+ {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
+ {"msrclr",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94110000, OPCODE_MASK_H23N, msrclr, special_inst },
+- {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, fadd, arithmetic_inst },
++ {"fadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000000, OPCODE_MASK_H4, mbi_fadd, arithmetic_inst },
+ {"frsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000080, OPCODE_MASK_H4, frsub, arithmetic_inst },
+- {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, fmul, arithmetic_inst },
+- {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, fdiv, arithmetic_inst },
++ {"fmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000100, OPCODE_MASK_H4, mbi_fmul, arithmetic_inst },
++ {"fdiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000180, OPCODE_MASK_H4, mbi_fdiv, arithmetic_inst },
+ {"fcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000210, OPCODE_MASK_H4, fcmp_lt, arithmetic_inst },
+ {"fcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000220, OPCODE_MASK_H4, fcmp_eq, arithmetic_inst },
+ {"fcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000230, OPCODE_MASK_H4, fcmp_le, arithmetic_inst },
@@ -538,8 +538,8 @@ struct op_code_struct
{"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst },
{"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst },
@@ -317,10 +342,10 @@
{"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */
{"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst },
{"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst },
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index ad475a4af15..ee01cdb7d9b 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
+Index: gdb-9.2/opcodes/microblaze-opcm.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opcm.h
++++ gdb-9.2/opcodes/microblaze-opcm.h
@@ -40,8 +40,8 @@ enum microblaze_instr
imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid,
brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti,
@@ -328,10 +353,7 @@
- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi,
- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli,
-+ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
++ sbi, shi, swi, sli, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv,
fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt,
fint, fsqrt,
tget, tcget, tnget, tncget, tput, tcput, tnput, tncput,
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
similarity index 87%
copy from meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
copy to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
index 067d926..a717595 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/binutils/binutils/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0016-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
@@ -1,18 +1,17 @@
-From 48f658aba97d74c702b2fc5f1577d63c800b91f5 Mon Sep 17 00:00:00 2001
+From 8ad2e417691ac2b89ffec9db9026d53600d9a137 Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
- rsubl
+Subject: [PATCH 16/52] [Patch,Microblaze] : negl instruction is overriding
+ rsubl,fixed it by changing the instruction order...
-fixed it by changing the instruction order...
---
opcodes/microblaze-opc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f2139a6839b..f9709412097 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -275,9 +275,7 @@ struct op_code_struct
{"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */
{"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */
@@ -32,6 +31,3 @@
{"", 0, 0, 0, 0, 0, 0, 0, 0},
};
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Added-relocations-for-MB-X.patch
similarity index 66%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Added-relocations-for-MB-X.patch
index 742f9e3..ac9da7a 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Added-relocations-for-MB-X.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Added-relocations-for-MB-X.patch
@@ -1,47 +1,49 @@
-From 982f37caabea84cee52426844e73365f0cb93f3d Mon Sep 17 00:00:00 2001
+From eccbce1a31ed29dc38fb9ab15b6badcf9412bdb8 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 11 Sep 2018 17:30:17 +0530
-Subject: [PATCH 18/40] Added relocations for MB-X
+Subject: [PATCH 17/52] Added relocations for MB-X
+Conflicts:
+ bfd/bfd-in2.h
+ gas/config/tc-microblaze.c
---
- bfd/bfd-in2.h | 11 +++++---
- bfd/libbfd.h | 4 +--
- bfd/reloc.c | 26 +++++++++---------
- 4 files changed, 63 insertions(+), 32 deletions(-)
+ bfd/bfd-in2.h | 9 +++-
+ bfd/libbfd.h | 4 +-
+ bfd/reloc.c | 26 ++++++-----
+ gas/config/tc-microblaze.c | 90 ++++++++++++++++----------------------
+ 4 files changed, 61 insertions(+), 68 deletions(-)
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index c6738960bb2..3899352b1d5 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5369,15 +5369,20 @@ done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_32_NONE,
-
+Index: gdb-9.2/bfd/bfd-in2.h
+===================================================================
+--- gdb-9.2.orig/bfd/bfd-in2.h
++++ gdb-9.2/bfd/bfd-in2.h
+@@ -5371,14 +5371,19 @@ done here - only used for relaxing */
/* This is a 64 bit reloc that stores the 32 bit pc relative
--value in two words (with an imm instruction). No relocation is
-+value in two words (with an imml instruction). No relocation is
+ value in two words (with an imm instruction). No relocation is
done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64_NONE,
+ BFD_RELOC_MICROBLAZE_64_PCREL,
-/* This is a 64 bit reloc that stores the 32 bit pc relative
+/* This is a 64 bit reloc that stores the 32 bit relative
- value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64,
+ * +value in two words (with an imml instruction). No relocation is
+ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64,
-+/* This is a 64 bit reloc that stores the 32 bit pc relative
-+value in two words (with an imm instruction). No relocation is
-+done here - only used for relaxing */
-+ BFD_RELOC_MICROBLAZE_64_NONE,
-+
/* This is a 64 bit reloc that stores the 32 bit pc relative
++ * +value in two words (with an imm instruction). No relocation is
++ * +done here - only used for relaxing */
++ BFD_RELOC_MICROBLAZE_64_NONE,
++
++/* This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
PC-relative GOT offset */
-diff --git a/bfd/libbfd.h b/bfd/libbfd.h
-index 4e71991273e..46be3891390 100644
---- a/bfd/libbfd.h
-+++ b/bfd/libbfd.h
-@@ -2905,14 +2905,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
+ BFD_RELOC_MICROBLAZE_64_GOTPC,
+Index: gdb-9.2/bfd/libbfd.h
+===================================================================
+--- gdb-9.2.orig/bfd/libbfd.h
++++ gdb-9.2/bfd/libbfd.h
+@@ -2905,14 +2905,14 @@ static const char *const bfd_reloc_code_
"BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM",
"BFD_RELOC_MICROBLAZE_32_NONE",
"BFD_RELOC_MICROBLAZE_64_NONE",
@@ -58,35 +60,36 @@
"BFD_RELOC_MICROBLAZE_64_TLS",
"BFD_RELOC_MICROBLAZE_64_TLSGD",
"BFD_RELOC_MICROBLAZE_64_TLSLD",
-diff --git a/bfd/reloc.c b/bfd/reloc.c
-index 8b3cc604738..98a156f061f 100644
---- a/bfd/reloc.c
-+++ b/bfd/reloc.c
-@@ -6814,24 +6814,12 @@ ENUMDOC
- done here - only used for relaxing
+Index: gdb-9.2/bfd/reloc.c
+===================================================================
+--- gdb-9.2.orig/bfd/reloc.c
++++ gdb-9.2/bfd/reloc.c
+@@ -6815,12 +6815,6 @@ ENUMDOC
ENUM
BFD_RELOC_MICROBLAZE_64_NONE
--ENUMDOC
+ ENUMDOC
- This is a 32 bit reloc that stores the 32 bit pc relative
- value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing
-ENUM
- BFD_RELOC_MICROBLAZE_64
- ENUMDOC
+-ENUMDOC
This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). No relocation is
done here - only used for relaxing
- ENUM
+@@ -6828,12 +6822,6 @@ ENUM
BFD_RELOC_MICROBLAZE_64_GOTPC
--ENUMDOC
-- This is a 64 bit reloc that stores the 32 bit pc relative
+ ENUMDOC
+ This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing
-ENUM
- BFD_RELOC_MICROBLAZE_64_GPC
- ENUMDOC
- This is a 64 bit reloc that stores the 32 bit pc relative
+-ENUMDOC
+- This is a 64 bit reloc that stores the 32 bit pc relative
value in two words (with an imm instruction). The relocation is
+ PC-relative GOT offset
+ ENUM
@@ -6917,6 +6905,20 @@ ENUMDOC
value in two words (with an imm instruction). The relocation is
relative offset from start of TEXT.
@@ -108,6 +111,3 @@
ENUM
BFD_RELOC_AARCH64_RELOC_START
ENUMDOC
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
deleted file mode 100644
index eaf2450..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From b6ec3e2295ba33d2c8f48500d75a147ffd84a656 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 11 Sep 2018 13:48:33 +0530
-Subject: [PATCH 17/40] [Patch,Microblaze] : negl instruction is overriding
- rsubl
-
-fixed it by changing the instruction order...
----
- opcodes/microblaze-opc.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index 46263bc7e16..f4ee8f43372 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -275,9 +275,7 @@ struct op_code_struct
- {"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */
- {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */
- {"not", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1. */
-- {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */
- {"rtb", INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4. */
-- {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */
- {"lmi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst },
- {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst },
- {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst },
-@@ -555,6 +553,8 @@ struct op_code_struct
- {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst },
- {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst },
- {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst },
-+ {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */
-+ {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */
-
- {"", 0, 0, 0, 0, 0, 0, 0, 0},
- };
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Fixed-MB-x-relocation-issues.patch
similarity index 75%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Fixed-MB-x-relocation-issues.patch
index fc5c946..84a4d31 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Update-MB-x.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0018-Fixed-MB-x-relocation-issues.patch
@@ -1,27 +1,28 @@
-From 0bb779328b8564b008a6134826f043b4326f4904 Mon Sep 17 00:00:00 2001
+From 0868dedda1b7b8112870dcc69f887d32a51b94b6 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Fri, 28 Sep 2018 12:04:55 +0530
-Subject: [PATCH 19/40] Update MB-x
+Subject: [PATCH 18/52] -Fixed MB-x relocation issues -Added imml for required
+ MB-x instructions
--Fixed MB-x relocation issues
--Added imml for required MB-x instructions
---
- bfd/elf64-microblaze.c | 68 ++++++++++--
- 3 files changed, 209 insertions(+), 82 deletions(-)
+ bfd/elf64-microblaze.c | 68 ++++++++++++++---
+ gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++----------
+ gas/tc.h | 2 +-
+ 3 files changed, 167 insertions(+), 55 deletions(-)
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index d55700fc513..f8f52870639 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1478,8 +1478,17 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1488,8 +1488,17 @@ microblaze_elf_relocate_section (bfd *ou
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ offset + INST_WORD_SIZE);
- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+ if (insn == 0xb2000000 || insn == 0xb2ffffff)
++ if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ {
-+ insn &= ~0x00ffffff;
++ insn &= ~0x00ffffff;
+ insn |= (relocation >> 16) & 0xffffff;
+ bfd_put_32 (input_bfd, insn,
contents + offset + endian);
@@ -32,7 +33,7 @@
bfd_put_16 (input_bfd, relocation & 0xffff,
contents + offset + endian + INST_WORD_SIZE);
}
-@@ -1569,11 +1578,28 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1580,11 +1589,28 @@ microblaze_elf_relocate_section (bfd *ou
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
@@ -42,7 +43,7 @@
- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff,
+ {
+ if (!input_section->output_section->vma &&
-+ !input_section->output_offset && !offset)
++ !input_section->output_offset && !offset)
+ relocation -= (input_section->output_section->vma
+ + input_section->output_offset
+ + offset);
@@ -52,9 +53,9 @@
+ + offset + INST_WORD_SIZE);
+ }
+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-+ if (insn == 0xb2000000 || insn == 0xb2ffffff)
++ if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ {
-+ insn &= ~0x00ffffff;
++ insn &= ~0x00ffffff;
+ insn |= (relocation >> 16) & 0xffffff;
+ bfd_put_32 (input_bfd, insn,
contents + offset + endian);
@@ -65,7 +66,7 @@
bfd_put_16 (input_bfd, relocation & 0xffff,
contents + offset + endian + INST_WORD_SIZE);
}
-@@ -1677,9 +1703,19 @@ static void
+@@ -1703,9 +1729,19 @@ static void
microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
{
unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -88,7 +89,7 @@
}
/* Read-modify-write into the bfd, an immediate value into appropriate fields of
-@@ -1691,10 +1727,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1717,10 +1753,18 @@ microblaze_bfd_write_imm_value_64 (bfd *
unsigned long instr_lo;
instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -111,6 +112,3 @@
instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE);
instr_lo &= ~0x0000ffff;
instr_lo |= (val & 0x0000ffff);
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixing-the-branch-related-issues.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixing-the-branch-related-issues.patch
new file mode 100644
index 0000000..b3f93845
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0019-Fixing-the-branch-related-issues.patch
@@ -0,0 +1,25 @@
+From 5780b5e5f9b5fe64d5172cd99399366e42c67b64 Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Sun, 30 Sep 2018 17:06:58 +0530
+Subject: [PATCH 19/52] Fixing the branch related issues
+
+Conflicts:
+ bfd/elf64-microblaze.c
+---
+ bfd/elf64-microblaze.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -2545,6 +2545,9 @@ microblaze_elf_check_relocs (bfd * abfd,
+ while (h->root.type == bfd_link_hash_indirect
+ || h->root.type == bfd_link_hash_warning)
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
++ /* PR15323, ref flags aren't set for references in the same
++ object. */
++ h->root.non_ir_ref_regular = 1;
+ }
+
+ switch (r_type)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixed-address-computation-issues-with-64bit-address.patch
similarity index 61%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixed-address-computation-issues-with-64bit-address.patch
index eb0bc98..a2f34b0 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Various-fixes.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0020-Fixed-address-computation-issues-with-64bit-address.patch
@@ -1,37 +1,40 @@
-From 188a60b441711f663f07dc3c3902c8c5d590eb6c Mon Sep 17 00:00:00 2001
+From fd3df3812f8297133a598802b552252f45c80d0c Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Tue, 9 Oct 2018 10:14:22 +0530
-Subject: [PATCH 20/40] Various fixes
+Subject: [PATCH 20/52] - Fixed address computation issues with 64bit address -
+ Fixed imml dissassamble issue
-- Fixed address computation issues with 64bit address
-- Fixed imml dissassamble issue
+Conflicts:
+ gas/config/tc-microblaze.c
+ opcodes/microblaze-dis.c
---
bfd/bfd-in2.h | 5 +++
bfd/elf64-microblaze.c | 14 ++++----
+ gas/config/tc-microblaze.c | 74 +++++++++++++++++++++++++++++++++-----
opcodes/microblaze-dis.c | 2 +-
4 files changed, 79 insertions(+), 16 deletions(-)
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 3899352b1d5..91761bf6964 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
-@@ -5378,6 +5378,11 @@ value in two words (with an imml instruction). No relocation is
- done here - only used for relaxing */
- BFD_RELOC_MICROBLAZE_64,
+Index: gdb-9.2/bfd/bfd-in2.h
+===================================================================
+--- gdb-9.2.orig/bfd/bfd-in2.h
++++ gdb-9.2/bfd/bfd-in2.h
+@@ -5378,6 +5378,11 @@ done here - only used for relaxing */
+ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_64,
+/* This is a 64 bit reloc that stores the 32 bit relative
-+value in two words (with an imml instruction). No relocation is
-+done here - only used for relaxing */
++ * +value in two words (with an imml instruction). No relocation is
++ * +done here - only used for relaxing */
+ BFD_RELOC_MICROBLAZE_EA64,
+
/* This is a 64 bit reloc that stores the 32 bit pc relative
- value in two words (with an imm instruction). No relocation is
- done here - only used for relaxing */
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index f8f52870639..17e58748a0b 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] =
+ * +value in two words (with an imm instruction). No relocation is
+ * +done here - only used for relaxing */
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_h
0, /* Rightshift. */
4, /* Size (0 = byte, 1 = short, 2 = long). */
64, /* Bitsize. */
@@ -50,7 +53,7 @@
/* A 64 bit relocation. Table entry not really used. */
HOWTO (R_MICROBLAZE_64, /* Type. */
-@@ -585,9 +585,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -585,9 +585,9 @@ microblaze_elf_reloc_type_lookup (bfd *
case BFD_RELOC_32:
microblaze_reloc = R_MICROBLAZE_32;
break;
@@ -62,7 +65,7 @@
break;
case BFD_RELOC_32_PCREL:
microblaze_reloc = R_MICROBLAZE_32_PCREL;
-@@ -619,7 +619,7 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
+@@ -619,7 +619,7 @@ microblaze_elf_reloc_type_lookup (bfd *
case BFD_RELOC_VTABLE_ENTRY:
microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY;
break;
@@ -71,7 +74,7 @@
microblaze_reloc = R_MICROBLAZE_IMML_64;
break;
case BFD_RELOC_MICROBLAZE_64_GOTPC:
-@@ -1956,7 +1956,7 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -1982,7 +1982,7 @@ microblaze_elf_relax_section (bfd *abfd,
efix = calc_fixup (target_address, 0, sec);
/* Validate the in-band val. */
@@ -80,19 +83,16 @@
if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) {
fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend);
}
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 437f536e96a..24ede714858 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -78,7 +78,7 @@ get_field_imml (struct string_buf *buf, long instr)
+Index: gdb-9.2/opcodes/microblaze-dis.c
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-dis.c
++++ gdb-9.2/opcodes/microblaze-dis.c
+@@ -77,7 +77,7 @@ static char *
+ get_field_imml (struct string_buf *buf, long instr)
{
char *p = strbuf (buf);
-
- sprintf (p, "%d", (short)((instr & IMML_MASK) >> IMM_LOW));
+ sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW));
return p;
}
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch
index 0d212cc..abfdd8d 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0021-Adding-new-relocation-to-support-64bit-rodata.patch
@@ -1,17 +1,18 @@
-From a485fdf959afb6cd079f482eeea9d3186e6393f8 Mon Sep 17 00:00:00 2001
+From 14a54cced8062343b83d7ff0e68f00bca562a509 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Sat, 13 Oct 2018 21:17:01 +0530
-Subject: [PATCH 21/40] Adding new relocation to support 64bit rodata
+Subject: [PATCH 21/52] Adding new relocation to support 64bit rodata
---
bfd/elf64-microblaze.c | 11 +++++++--
+ gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++----
2 files changed, 54 insertions(+), 6 deletions(-)
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index 17e58748a0b..b62c47e8514 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1463,6 +1463,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1473,6 +1473,7 @@ microblaze_elf_relocate_section (bfd *ou
case (int) R_MICROBLAZE_64_PCREL :
case (int) R_MICROBLAZE_64:
case (int) R_MICROBLAZE_32:
@@ -19,16 +20,16 @@
{
/* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
from removed linkonce sections, or sections discarded by
-@@ -1472,6 +1473,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1482,6 +1483,8 @@ microblaze_elf_relocate_section (bfd *ou
relocation += addend;
- if (r_type == R_MICROBLAZE_32)
+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
bfd_put_32 (input_bfd, relocation, contents + offset);
+ else if (r_type == R_MICROBLAZE_IMML_64)
+ bfd_put_64 (input_bfd, relocation, contents + offset);
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -1549,7 +1552,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1560,7 +1563,7 @@ microblaze_elf_relocate_section (bfd *ou
}
else
{
@@ -37,7 +38,7 @@
{
outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
outrel.r_addend = relocation + addend;
-@@ -1575,6 +1578,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1586,6 +1589,8 @@ microblaze_elf_relocate_section (bfd *ou
relocation += addend;
if (r_type == R_MICROBLAZE_32)
bfd_put_32 (input_bfd, relocation, contents + offset);
@@ -46,7 +47,7 @@
else
{
if (r_type == R_MICROBLAZE_64_PCREL)
-@@ -2072,7 +2077,8 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2098,7 +2103,8 @@ microblaze_elf_relax_section (bfd *abfd,
microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
irelscan->r_addend);
}
@@ -56,7 +57,7 @@
{
isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
-@@ -2568,6 +2574,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+@@ -2606,6 +2612,7 @@ microblaze_elf_check_relocs (bfd * abfd,
case R_MICROBLAZE_64:
case R_MICROBLAZE_64_PCREL:
case R_MICROBLAZE_32:
@@ -64,6 +65,3 @@
{
if (h != NULL && !bfd_link_pic (info))
{
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch
index aa512b8..3bbe265 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0022-fixing-the-.bss-relocation-issue.patch
@@ -1,35 +1,35 @@
-From 24f96f4e86895b41aae21f775599a857939d002f Mon Sep 17 00:00:00 2001
+From e9e4d4837cfea27e67fa656ede535f250205eb2c Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 24 Oct 2018 12:34:37 +0530
-Subject: [PATCH 22/40] fixing the .bss relocation issue
+Subject: [PATCH 22/52] fixing the .bss relocation issue
---
bfd/elf64-microblaze.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b62c47e8514..cb3b40b574c 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -1482,7 +1482,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1492,7 +1492,7 @@ microblaze_elf_relocate_section (bfd *ou
+ input_section->output_offset
+ offset + INST_WORD_SIZE);
unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ if ((insn & 0xff000000) == 0xb2000000)
{
- insn &= ~0x00ffffff;
+ insn &= ~0x00ffffff;
insn |= (relocation >> 16) & 0xffffff;
-@@ -1595,7 +1595,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
+@@ -1606,7 +1606,7 @@ microblaze_elf_relocate_section (bfd *ou
+ offset + INST_WORD_SIZE);
}
unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian);
-- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+- if (insn == 0xb2000000 || insn == 0xb2ffffff)
+ if ((insn & 0xff000000) == 0xb2000000)
{
- insn &= ~0x00ffffff;
+ insn &= ~0x00ffffff;
insn |= (relocation >> 16) & 0xffffff;
-@@ -1709,7 +1709,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1735,7 +1735,7 @@ microblaze_bfd_write_imm_value_32 (bfd *
{
unsigned long instr = bfd_get_32 (abfd, bfd_addr);
@@ -38,7 +38,7 @@
{
instr &= ~0x00ffffff;
instr |= (val & 0xffffff);
-@@ -1732,7 +1732,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val)
+@@ -1758,7 +1758,7 @@ microblaze_bfd_write_imm_value_64 (bfd *
unsigned long instr_lo;
instr_hi = bfd_get_32 (abfd, bfd_addr);
@@ -47,7 +47,7 @@
{
instr_hi &= ~0x00ffffff;
instr_hi |= (val >> 16) & 0xffffff;
-@@ -2225,7 +2225,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2251,7 +2251,10 @@ microblaze_elf_relax_section (bfd *abfd,
unsigned long instr_lo = bfd_get_32 (abfd, ocontents
+ irelscan->r_offset
+ INST_WORD_SIZE);
@@ -59,7 +59,7 @@
immediate |= (instr_lo & 0x0000ffff);
offset = calc_fixup (irelscan->r_addend, 0, sec);
immediate -= offset;
-@@ -2269,7 +2272,10 @@ microblaze_elf_relax_section (bfd *abfd,
+@@ -2295,7 +2298,10 @@ microblaze_elf_relax_section (bfd *abfd,
unsigned long instr_lo = bfd_get_32 (abfd, ocontents
+ irelscan->r_offset
+ INST_WORD_SIZE);
@@ -71,6 +71,3 @@
immediate |= (instr_lo & 0x0000ffff);
target_address = immediate;
offset = calc_fixup (target_address, 0, sec);
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
index c645781..b359ce7 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0023-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
@@ -1,7 +1,7 @@
-From cd5868dca5b4a728e6418459d871f5c9ca68253e Mon Sep 17 00:00:00 2001
+From 1466dd2c74e38ae6d1dca5cf6d4cad87c94fbc8f Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 28 Nov 2018 14:00:29 +0530
-Subject: [PATCH 23/40] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
+Subject: [PATCH 23/52] Fixed the bug in the R_MICROBLAZE_64_NONE relocation.
It was adjusting only lower 16bits.
---
@@ -9,10 +9,10 @@
bfd/elf64-microblaze.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index a31b407cfbf..04816a4a187 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
@@ -2023,8 +2023,8 @@ microblaze_elf_relax_section (bfd *abfd,
sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
efix = calc_fixup (target_address, 0, sec);
@@ -24,11 +24,11 @@
}
break;
}
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index cb3b40b574c..b002b414d64 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -2004,8 +2004,8 @@ microblaze_elf_relax_section (bfd *abfd,
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -2030,8 +2030,8 @@ microblaze_elf_relax_section (bfd *abfd,
sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
efix = calc_fixup (target_address, 0, sec);
irel->r_addend -= (efix - sfix);
@@ -39,6 +39,3 @@
}
break;
}
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
deleted file mode 100644
index f5bf917..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-Patch-Microblaze-Binutils-security-check-is-causing-.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 25a67af22ad040f87b3c14185c338828d4e26908 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 11 Mar 2019 14:23:58 +0530
-Subject: [PATCH 25/40] [Patch,Microblaze] : Binutils security check is causing
- build error for windows builds.commenting for now.
-
----
- bfd/elf-attrs.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c
-index bfe135e7fbb..abf267ad42e 100644
---- a/bfd/elf-attrs.c
-+++ b/bfd/elf-attrs.c
-@@ -440,6 +440,8 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
- /* PR 17512: file: 2844a11d. */
- if (hdr->sh_size == 0)
- return;
-+
-+ #if 0
- if (hdr->sh_size > bfd_get_file_size (abfd))
- {
- /* xgettext:c-format */
-@@ -448,6 +450,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr)
- bfd_set_error (bfd_error_invalid_operation);
- return;
- }
-+ #endif
-
- contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
- if (!contents)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
similarity index 61%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
index f5ddce4..c2ae39e 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-fixing-the-long-long-long-mingw-toolchain-issue.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0025-fixing-the-long-long-long-mingw-toolchain-issue.patch
@@ -1,16 +1,17 @@
-From b9e89f0698fd0e3b0e965986681f9fd90d3dc313 Mon Sep 17 00:00:00 2001
+From f64c95b119637880e8898b459e7665f0d92cef20 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 29 Nov 2018 17:59:25 +0530
-Subject: [PATCH 26/40] fixing the long & long long mingw toolchain issue
+Subject: [PATCH 25/52] fixing the long & long long mingw toolchain issue
---
+ gas/config/tc-microblaze.c | 10 +++++-----
opcodes/microblaze-opc.h | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index f4ee8f43372..c8c2addc351 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr";
#define MIN_IMM6_WIDTH ((int) 0x00000001)
#define MAX_IMM6_WIDTH ((int) 0x00000040)
@@ -22,6 +23,3 @@
#endif /* MICROBLAZE_OPC */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-Added-support-to-new-arithmetic-single-register-inst.patch
similarity index 82%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-Added-support-to-new-arithmetic-single-register-inst.patch
index bf05816..90094ab 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Added-support-to-new-arithmetic-single-register-inst.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0026-Added-support-to-new-arithmetic-single-register-inst.patch
@@ -1,24 +1,26 @@
-From efc3fd518cdb7e8bf82ac27b98b946001f83a2bf Mon Sep 17 00:00:00 2001
+From b8128385902d88414c354b772828eefe3b59fb06 Mon Sep 17 00:00:00 2001
From: Nagaraju <nmekala@xilinx.com>
Date: Fri, 23 Aug 2019 16:18:43 +0530
-Subject: [PATCH 27/40] Added support to new arithmetic single register
+Subject: [PATCH 26/52] Added support to new arithmetic single register
instructions
+Conflicts:
+ opcodes/microblaze-dis.c
---
+ gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++-
opcodes/microblaze-dis.c | 13 +++-
- opcodes/microblaze-opc.h | 45 +++++++++++-
+ opcodes/microblaze-opc.h | 43 ++++++++++-
opcodes/microblaze-opcm.h | 5 +-
4 files changed, 201 insertions(+), 7 deletions(-)
-diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
-index 24ede714858..e93d9b890ba 100644
---- a/opcodes/microblaze-dis.c
-+++ b/opcodes/microblaze-dis.c
-@@ -131,6 +131,15 @@ get_field_imm15 (struct string_buf *buf, long instr)
+Index: gdb-9.2/opcodes/microblaze-dis.c
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-dis.c
++++ gdb-9.2/opcodes/microblaze-dis.c
+@@ -130,9 +130,17 @@ get_field_imm15 (struct string_buf *buf,
return p;
}
-+static char *
+get_field_imm16 (struct string_buf *buf, long instr)
+{
+ char *p = strbuf (buf);
@@ -29,29 +31,25 @@
+
static char *
get_field_special (struct string_buf *buf, long instr,
- struct op_code_struct *op)
-@@ -448,6 +457,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst),
- get_field_imm15 (&buf, inst));
- break;
-+ case INST_TYPE_RD_IMML:
-+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
-+ break;
- /* For mbar insn. */
- case INST_TYPE_IMM5:
- print_func (stream, "\t%s", get_field_imm5_mbar (&buf, inst));
-@@ -455,7 +467,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
+- struct op_code_struct *op)
++ struct op_code_struct *op)
+ {
+ char *p = strbuf (buf);
+ char *spr;
+@@ -454,6 +462,9 @@ print_insn_microblaze (bfd_vma memaddr,
/* For mbar 16 or sleep insn. */
case INST_TYPE_NONE:
break;
-- /* For tuqula instruction */
++ case INST_TYPE_RD_IMML:
++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst));
++ break;
/* For bit field insns. */
case INST_TYPE_RD_R1_IMMW_IMMS:
- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst),
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index c8c2addc351..eaf4a1bd9f9 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst));
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
@@ -69,6 +69,7 @@
#define INST_TYPE_RD_R1_IMMW_IMMS 21
@@ -102,7 +100,7 @@
/* New Mask for msrset, msrclr insns. */
#define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */
/* Mask for mbar insn. */
-@@ -114,13 +143,13 @@
+@@ -114,7 +143,7 @@
#define DELAY_SLOT 1
#define NO_DELAY_SLOT 0
@@ -111,13 +109,6 @@
struct op_code_struct
{
- const char * name;
- short inst_type; /* Registers and immediate values involved. */
-- short inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */
-+ int inst_offset_type; /* Immediate vals offset from PC? (= 1 for branches). */
- short delay_slots; /* Info about delay slots needed after this instr. */
- short immval_mask;
- unsigned long bit_sequence; /* All the fixed bits for the op are set and
@@ -444,13 +473,21 @@ struct op_code_struct
{"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst },
{"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst },
@@ -154,10 +145,10 @@
{"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst },
{"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst },
{"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst },
-diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
-index ee01cdb7d9b..31726c9b01a 100644
---- a/opcodes/microblaze-opcm.h
-+++ b/opcodes/microblaze-opcm.h
+Index: gdb-9.2/opcodes/microblaze-opcm.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opcm.h
++++ gdb-9.2/opcodes/microblaze-opcm.h
@@ -61,7 +61,9 @@ enum microblaze_instr
eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd,
@@ -176,6 +167,3 @@
+#define IMM16_MASK 0x0000FFFF
#endif /* MICROBLAZE-OPCM */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
new file mode 100644
index 0000000..bbcac10
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0027-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
@@ -0,0 +1,26 @@
+From 41b562250cdac5fd821267c6dac68b799d80dbe3 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 26 Aug 2019 15:29:42 +0530
+Subject: [PATCH 27/52] [Patch,MicroBlaze] : double imml generation for 64 bit
+ values.
+
+---
+ gas/config/tc-microblaze.c | 322 ++++++++++++++++++++++++++++++-------
+ opcodes/microblaze-opc.h | 4 +-
+ 2 files changed, 263 insertions(+), 63 deletions(-)
+
+Index: gdb-9.2/opcodes/microblaze-opc.h
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-opc.h
++++ gdb-9.2/opcodes/microblaze-opc.h
+@@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
+ #define MIN_IMM6_WIDTH ((int) 0x00000001)
+ #define MAX_IMM6_WIDTH ((int) 0x00000040)
+
+-#define MIN_IMML ((long long) 0xffffff8000000000L)
+-#define MAX_IMML ((long long) 0x0000007fffffffffL)
++#define MIN_IMML ((long long) -9223372036854775808)
++#define MAX_IMML ((long long) 9223372036854775807)
+
+ #endif /* MICROBLAZE_OPC */
+
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
deleted file mode 100644
index 01d615d..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0028-Patch-MicroBlaze-double-imml-generation-for-64-bit-v.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 953a4eb8152c0aca3e36ccc22a8950c9e68965b5 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Mon, 26 Aug 2019 15:29:42 +0530
-Subject: [PATCH 28/40] [Patch,MicroBlaze] : double imml generation for 64 bit
- values.
-
----
- opcodes/microblaze-opc.h | 4 +-
- 2 files changed, 264 insertions(+), 64 deletions(-)
-
-diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
-index eaf4a1bd9f9..79c3cf0d1a1 100644
---- a/opcodes/microblaze-opc.h
-+++ b/opcodes/microblaze-opc.h
-@@ -626,8 +626,8 @@ char pvr_register_prefix[] = "rpvr";
- #define MIN_IMM6_WIDTH ((int) 0x00000001)
- #define MAX_IMM6_WIDTH ((int) 0x00000040)
-
--#define MIN_IMML ((long long) 0xffffff8000000000L)
--#define MAX_IMML ((long long) 0x0000007fffffffffL)
-+#define MIN_IMML ((long long) -9223372036854775807)
-+#define MAX_IMML ((long long) 9223372036854775807)
-
- #endif /* MICROBLAZE_OPC */
-
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
new file mode 100644
index 0000000..f5280eb
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0032-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch
@@ -0,0 +1,40 @@
+From ef6fd1a60979ca1d9fc419ec840641019bc86ac2 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Mon, 30 Nov 2020 16:17:36 -0800
+Subject: [PATCH 32/52] ld/emulparams/elf64microblaze: Fix emulation generation
+
+Compilation fails when building ld-new with:
+
+ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation'
+ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation'
+
+The error appears to be that the elf64 files were referencing the elf32 emulation.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ ld/emulparams/elf64microblaze.sh | 2 +-
+ ld/emulparams/elf64microblazeel.sh | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: gdb-9.2/ld/emulparams/elf64microblaze.sh
+===================================================================
+--- gdb-9.2.orig/ld/emulparams/elf64microblaze.sh
++++ gdb-9.2/ld/emulparams/elf64microblaze.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
+Index: gdb-9.2/ld/emulparams/elf64microblazeel.sh
+===================================================================
+--- gdb-9.2.orig/ld/emulparams/elf64microblazeel.sh
++++ gdb-9.2/ld/emulparams/elf64microblazeel.sh
+@@ -19,5 +19,5 @@ NOP=0x80000000
+ #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@}
+ #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);'
+
+-TEMPLATE_NAME=elf32
++TEMPLATE_NAME=elf
+ #GENERATE_SHLIB_SCRIPT=yes
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
similarity index 71%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
index ff1c606..c82a988 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Add-initial-port-of-linux-gdbserver.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch
@@ -1,7 +1,7 @@
-From c5eee33cd39dbb9c44bdad2025a5c848139c55f2 Mon Sep 17 00:00:00 2001
+From d495e03657b25b793f7c9bdd689fdc2d1633a47b Mon Sep 17 00:00:00 2001
From: Mahesh Bodapati <mbodapat@xilinx.com>
Date: Mon, 23 Jan 2017 19:07:44 +0530
-Subject: [PATCH 34/40] Add initial port of linux gdbserver add
+Subject: [PATCH 33/52] Add initial port of linux gdbserver add
gdb_proc_service_h to gdbserver microblaze-linux
gdbserver needs to initialise the microblaze registers
@@ -21,23 +21,19 @@
Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
---
gdb/configure.host | 3 +
- gdb/features/microblaze-linux.xml | 12 ++
- gdb/gdbserver/Makefile.in | 4 +
- gdb/gdbserver/configure.srv | 8 ++
gdb/gdbserver/linux-microblaze-low.c | 189 +++++++++++++++++++++++++++
gdb/microblaze-linux-tdep.c | 29 +++-
gdb/microblaze-tdep.c | 35 ++++-
gdb/microblaze-tdep.h | 4 +-
gdb/regformats/reg-microblaze.dat | 41 ++++++
- 9 files changed, 322 insertions(+), 3 deletions(-)
- create mode 100644 gdb/features/microblaze-linux.xml
+ 6 files changed, 298 insertions(+), 3 deletions(-)
create mode 100644 gdb/gdbserver/linux-microblaze-low.c
create mode 100644 gdb/regformats/reg-microblaze.dat
-diff --git a/gdb/configure.host b/gdb/configure.host
-index ce528237291..cf1a08e8b28 100644
---- a/gdb/configure.host
-+++ b/gdb/configure.host
+Index: gdb-9.2/gdb/configure.host
+===================================================================
+--- gdb-9.2.orig/gdb/configure.host
++++ gdb-9.2/gdb/configure.host
@@ -65,6 +65,7 @@ hppa*) gdb_host_cpu=pa ;;
i[34567]86*) gdb_host_cpu=i386 ;;
m68*) gdb_host_cpu=m68k ;;
@@ -55,77 +51,10 @@
powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
gdb_host=aix ;;
powerpc*-*-freebsd*) gdb_host=fbsd ;;
-diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml
-new file mode 100644
-index 00000000000..8983e66eb3d
+Index: gdb-9.2/gdb/gdbserver/linux-microblaze-low.c
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze-linux.xml
-@@ -0,0 +1,12 @@
-+<?xml version="1.0"?>
-+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
-+
-+ Copying and distribution of this file, with or without modification,
-+ are permitted in any medium without royalty provided the copyright
-+ notice and this notice are preserved. -->
-+
-+<!DOCTYPE target SYSTEM "gdb-target.dtd">
-+<target>
-+ <osabi>GNU/Linux</osabi>
-+ <xi:include href="microblaze-core.xml"/>
-+</target>
-diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
-index 16a9f2fd380..fb4762a22d5 100644
---- a/gdb/gdbserver/Makefile.in
-+++ b/gdb/gdbserver/Makefile.in
-@@ -172,6 +172,7 @@ SFILES = \
- $(srcdir)/linux-low.c \
- $(srcdir)/linux-m32r-low.c \
- $(srcdir)/linux-m68k-low.c \
-+ $(srcdir)/linux-microblaze-low.c \
- $(srcdir)/linux-mips-low.c \
- $(srcdir)/linux-nios2-low.c \
- $(srcdir)/linux-ppc-low.c \
-@@ -231,6 +232,7 @@ SFILES = \
- $(srcdir)/nat/linux-namespaces.c \
- $(srcdir)/nat/linux-osdata.c \
- $(srcdir)/nat/linux-personality.c \
-+ $(srcdir)/nat/microblaze-linux.c \
- $(srcdir)/nat/mips-linux-watch.c \
- $(srcdir)/nat/ppc-linux.c \
- $(srcdir)/nat/fork-inferior.c \
-@@ -657,6 +659,8 @@ gdbsupport/%.o: ../gdbsupport/%.c
-
- %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
- $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
-+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
-+ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
-
- #
- # Dependency tracking.
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index 1a4ab8e3361..e0d2b2fe04a 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -184,6 +184,14 @@ case "${target}" in
- srv_linux_usrregs=yes
- srv_linux_thread_db=yes
- ;;
-+ microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
-+ srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-+ srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+ srv_xmlfiles="microblaze-linux.xml"
-+ srv_linux_regsets=yes
-+ srv_linux_usrregs=yes
-+ srv_linux_thread_db=yes
-+ ;;
- powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
- srv_regobj="${srv_regobj} powerpc-altivec32l.o"
- srv_regobj="${srv_regobj} powerpc-vsx32l.o"
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-new file mode 100644
-index 00000000000..cba5d6fc585
---- /dev/null
-+++ b/gdb/gdbserver/linux-microblaze-low.c
++++ gdb-9.2/gdb/gdbserver/linux-microblaze-low.c
@@ -0,0 +1,189 @@
+/* GNU/Linux/Microblaze specific low level interface, for the remote server for
+ GDB.
@@ -316,10 +245,10 @@
+ microblaze_collect_ptrace_register,
+ microblaze_supply_ptrace_register,
+};
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 3bb9b5682ac..42c219d32f3 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
+Index: gdb-9.2/gdb/microblaze-linux-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-linux-tdep.c
++++ gdb-9.2/gdb/microblaze-linux-tdep.c
@@ -37,6 +37,22 @@
#include "tramp-frame.h"
#include "linux-tdep.h"
@@ -343,14 +272,17 @@
static int
microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
-@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -46,18 +62,25 @@ microblaze_linux_memory_remove_breakpoin
+ int val;
+ int bplen;
+ gdb_byte old_contents[BREAKPOINT_MAX];
++ struct cleanup *cleanup;
+
/* Determine appropriate breakpoint contents and size for this address. */
bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+ /* Make sure we see the memory breakpoints. */
-+ scoped_restore restore_memory
-+ = make_scoped_restore_show_memory_breakpoints (1);
-+
++ cleanup = make_show_memory_breakpoints_cleanup (1);
val = target_read_memory (addr, old_contents, bplen);
/* If our breakpoint is no longer at the address, this means that the
@@ -363,9 +295,11 @@
+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
+ }
++ do_cleanups (cleanup);
return val;
}
-@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info,
+
+@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarc
/* Trampolines. */
tramp_frame_prepend_unwinder (gdbarch,
µblaze_linux_sighandler_tramp_frame);
@@ -376,15 +310,14 @@
}
void
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 17871229c80..0168e4881ed 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR pc)
+Index: gdb-9.2/gdb/microblaze-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.c
++++ gdb-9.2/gdb/microblaze-tdep.c
+@@ -137,7 +137,38 @@ microblaze_fetch_instruction (CORE_ADDR
constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
--
+static int
+microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
@@ -394,6 +327,7 @@
+ int val;
+ int bplen;
+ gdb_byte old_contents[BREAKPOINT_MAX];
++ struct cleanup *cleanup;
+
+ /* Determine appropriate breakpoint contents and size for this address. */
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
@@ -401,9 +335,7 @@
+ error (_("Software breakpoints not implemented for this target."));
+
+ /* Make sure we see the memory breakpoints. */
-+ scoped_restore restore_memory
-+ = make_scoped_restore_show_memory_breakpoints (1);
-+
++ cleanup = make_show_memory_breakpoints_cleanup (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
@@ -414,13 +346,14 @@
+ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr);
+ }
-+
+
++ do_cleanups (cleanup);
+ return val;
+}
/* Allocate and initialize a frame cache. */
-@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -731,6 +762,7 @@ microblaze_gdbarch_init (struct gdbarch_
microblaze_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
microblaze_breakpoint::bp_from_kind);
@@ -428,16 +361,16 @@
set_gdbarch_frame_args_skip (gdbarch, 8);
-@@ -770,4 +802,5 @@ When non-zero, microblaze specific debugging is enabled."),
+@@ -770,4 +802,5 @@ When non-zero, microblaze specific debug
NULL,
&setdebuglist, &showdebuglist);
+
}
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 4fbdf9933f0..db0772643dc 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
+Index: gdb-9.2/gdb/microblaze-tdep.h
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.h
++++ gdb-9.2/gdb/microblaze-tdep.h
@@ -117,6 +117,8 @@ struct microblaze_frame_cache
/* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
@@ -448,11 +381,10 @@
+
#endif /* microblaze-tdep.h */
-diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat
-new file mode 100644
-index 00000000000..bd8a4384424
+Index: gdb-9.2/gdb/regformats/reg-microblaze.dat
+===================================================================
--- /dev/null
-+++ b/gdb/regformats/reg-microblaze.dat
++++ gdb-9.2/gdb/regformats/reg-microblaze.dat
@@ -0,0 +1,41 @@
+name:microblaze
+expedite:r1,pc
@@ -495,6 +427,3 @@
+32:fsr
+32:slr
+32:shr
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch
deleted file mode 100644
index 4172595..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0033-Fix-various-compile-warnings.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From c59684852ecd37d6f82363f2cf0e1de1f770aab7 Mon Sep 17 00:00:00 2001
-From: Mark Hatle <mark.hatle@kernel.crashing.org>
-Date: Fri, 17 Jul 2020 09:20:54 -0500
-Subject: [PATCH 33/40] Fix various compile warnings
-
-Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
----
- bfd/elf64-microblaze.c | 9 +++++----
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
-index b002b414d64..8308f1ebd09 100644
---- a/bfd/elf64-microblaze.c
-+++ b/bfd/elf64-microblaze.c
-@@ -692,7 +692,7 @@ microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- /* Set the howto pointer for a RCE ELF reloc. */
-
- static bfd_boolean
--microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
-+microblaze_elf_info_to_howto (bfd * abfd,
- arelent * cache_ptr,
- Elf_Internal_Rela * dst)
- {
-@@ -705,14 +705,14 @@ microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
- r_type = ELF64_R_TYPE (dst->r_info);
- if (r_type >= R_MICROBLAZE_max)
- {
-- (*_bfd_error_handler) (_("%pB: unrecognised MicroBlaze reloc number: %d"),
-+ _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
- abfd, r_type);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
-
- cache_ptr->howto = microblaze_elf_howto_table [r_type];
-- return TRUE;
-+ return TRUE;
- }
-
- /* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */
-@@ -1560,7 +1560,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
- else
- {
- BFD_FAIL ();
-- (*_bfd_error_handler)
-+ _bfd_error_handler
- (_("%pB: probably compiled without -fPIC?"),
- input_bfd);
- bfd_set_error (bfd_error_bad_value);
-@@ -2554,6 +2554,7 @@ microblaze_elf_check_relocs (bfd * abfd,
- goto dogottls;
- case R_MICROBLAZE_TLSLD:
- tls_type |= (TLS_TLS | TLS_LD);
-+ /* Fall through. */
- dogottls:
- sec->has_tls_reloc = 1;
- /* Fall through. */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Initial-port-of-core-reading-support-Added-support-f.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Initial-port-of-core-reading-support-Added-support-f.patch
new file mode 100644
index 0000000..d32b501
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0034-Initial-port-of-core-reading-support-Added-support-f.patch
@@ -0,0 +1,385 @@
+From e6929fae6b3850eb925ef147bf0d0b09ca80cdf8 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Tue, 24 Jan 2017 14:55:56 +0530
+Subject: [PATCH 34/52] Initial port of core reading support Added support for
+ reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
+ information for rebuilding ".reg" sections of core dumps at run time.
+
+Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
+Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
+---
+ bfd/elf32-microblaze.c | 84 ++++++++++++++++++++++++++++++++++
+ gdb/configure.tgt | 2 +-
+ gdb/microblaze-linux-tdep.c | 57 +++++++++++++++++++++++
+ gdb/microblaze-tdep.c | 90 +++++++++++++++++++++++++++++++++++++
+ gdb/microblaze-tdep.h | 27 +++++++++++
+ 5 files changed, 259 insertions(+), 1 deletion(-)
+
+Index: gdb-9.2/bfd/elf32-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf32-microblaze.c
++++ gdb-9.2/bfd/elf32-microblaze.c
+@@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd
+ return _bfd_elf_is_local_label_name (abfd, name);
+ }
+
++/* Support for core dump NOTE sections. */
++static bfd_boolean
++microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
++{
++ int offset;
++ unsigned int size;
++
++ switch (note->descsz)
++ {
++ default:
++ return FALSE;
++
++ case 228: /* Linux/MicroBlaze */
++ /* pr_cursig */
++ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
++
++ /* pr_pid */
++ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
++
++ /* pr_reg */
++ offset = 72;
++ size = 50 * 4;
++
++ break;
++ }
++
++ /* Make a ".reg/999" section. */
++ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
++ size, note->descpos + offset);
++}
++
++static bfd_boolean
++microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
++{
++ switch (note->descsz)
++ {
++ default:
++ return FALSE;
++
++ case 128: /* Linux/MicroBlaze elf_prpsinfo */
++ elf_tdata (abfd)->core->program
++ = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
++ elf_tdata (abfd)->core->command
++ = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
++ }
++
++ /* Note that for some reason, a spurious space is tacked
++ onto the end of the args in some (at least one anyway)
++ implementations, so strip it off if it exists. */
++
++ {
++ char *command = elf_tdata (abfd)->core->command;
++ int n = strlen (command);
++
++ if (0 < n && command[n - 1] == ' ')
++ command[n - 1] = '\0';
++ }
++
++ return TRUE;
++}
++
++/* The microblaze linker (like many others) needs to keep track of
++ the number of relocs that it decides to copy as dynamic relocs in
++ check_relocs for each symbol. This is so that it can later discard
++ them if they are found to be unnecessary. We store the information
++ in a field extending the regular ELF linker hash table. */
++
++struct elf32_mb_dyn_relocs
++{
++ struct elf32_mb_dyn_relocs *next;
++
++ /* The input section of the reloc. */
++ asection *sec;
++
++ /* Total number of relocs copied for the input section. */
++ bfd_size_type count;
++
++ /* Number of pc-relative relocs copied for the input section. */
++ bfd_size_type pc_count;
++};
++
+ /* ELF linker hash entry. */
+
+ struct elf32_mb_link_hash_entry
+@@ -3675,4 +3756,7 @@ microblaze_elf_add_symbol_hook (bfd *abf
+ #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections
+ #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook
+
++#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus
++#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo
++
+ #include "elf32-target.h"
+Index: gdb-9.2/gdb/configure.tgt
+===================================================================
+--- gdb-9.2.orig/gdb/configure.tgt
++++ gdb-9.2/gdb/configure.tgt
+@@ -400,7 +400,7 @@ mep-*-*)
+
+ microblaze*-linux-*|microblaze*-*-linux*)
+ # Target: Xilinx MicroBlaze running Linux
+- gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o \
++ gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o glibc-tdep.o \
+ symfile-mem.o linux-tdep.o"
+ gdb_sim=../sim/microblaze/libsim.a
+ ;;
+Index: gdb-9.2/gdb/microblaze-linux-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-linux-tdep.c
++++ gdb-9.2/gdb/microblaze-linux-tdep.c
+@@ -135,11 +135,54 @@ static struct tramp_frame microblaze_lin
+ microblaze_linux_sighandler_cache_init
+ };
+
++const struct microblaze_gregset microblaze_linux_core_gregset;
++
++static void
++microblaze_linux_supply_core_gregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *gregs, size_t len)
++{
++ microblaze_supply_gregset (µblaze_linux_core_gregset, regcache,
++ regnum, gregs);
++}
++
++static void
++microblaze_linux_collect_core_gregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *gregs, size_t len)
++{
++ microblaze_collect_gregset (µblaze_linux_core_gregset, regcache,
++ regnum, gregs);
++}
++
++static void
++microblaze_linux_supply_core_fpregset (const struct regset *regset,
++ struct regcache *regcache,
++ int regnum, const void *fpregs, size_t len)
++{
++ /* FIXME. */
++ microblaze_supply_fpregset (regcache, regnum, fpregs);
++}
++
++static void
++microblaze_linux_collect_core_fpregset (const struct regset *regset,
++ const struct regcache *regcache,
++ int regnum, void *fpregs, size_t len)
++{
++ /* FIXME. */
++ microblaze_collect_fpregset (regcache, regnum, fpregs);
++}
+
+ static void
+ microblaze_linux_init_abi (struct gdbarch_info info,
+ struct gdbarch *gdbarch)
+ {
++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++
++ tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset,
++ microblaze_linux_collect_core_gregset);
++ tdep->sizeof_gregset = 200;
++
+ linux_init_abi (info, gdbarch);
+
+ set_gdbarch_memory_remove_breakpoint (gdbarch,
+@@ -153,6 +196,20 @@ microblaze_linux_init_abi (struct gdbarc
+ tramp_frame_prepend_unwinder (gdbarch,
+ µblaze_linux_sighandler_tramp_frame);
+
++ /* BFD target for core files. */
++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++ else
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++
++
++ /* Shared library handling. */
++ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
++ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
++
++ set_gdbarch_regset_from_core_section (gdbarch,
++ microblaze_regset_from_core_section);
++
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
+Index: gdb-9.2/gdb/microblaze-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.c
++++ gdb-9.2/gdb/microblaze-tdep.c
+@@ -137,6 +137,14 @@ microblaze_fetch_instruction (CORE_ADDR
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
++static CORE_ADDR
++microblaze_store_arguments (struct regcache *regcache, int nargs,
++ struct value **args, CORE_ADDR sp,
++ int struct_return, CORE_ADDR struct_addr)
++{
++ error (_("store_arguments not implemented"));
++ return sp;
++}
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+@@ -541,6 +549,12 @@ microblaze_frame_base_address (struct fr
+ return cache->base;
+ }
+
++static const struct frame_unwind *
++microblaze_frame_sniffer (struct frame_info *next_frame)
++{
++ return µblaze_frame_unwind;
++}
++
+ static const struct frame_base microblaze_frame_base =
+ {
+ µblaze_frame_unwind,
+@@ -677,6 +691,71 @@ microblaze_register_g_packet_guesses (st
+ tdesc_microblaze_with_stack_protect);
+ }
+
++void
++microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++ struct regcache *regcache,
++ int regnum, const void *gregs)
++{
++ unsigned int *regs = gregs;
++ if (regnum >= 0)
++ regcache_raw_supply (regcache, regnum, regs + regnum);
++
++ if (regnum == -1) {
++ int i;
++
++ for (i = 0; i < 50; i++) {
++ regcache_raw_supply (regcache, i, regs + i);
++ }
++ }
++}
++
++
++void
++microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++ const struct regcache *regcache,
++ int regnum, void *gregs)
++{
++ /* FIXME. */
++}
++
++void
++microblaze_supply_fpregset (struct regcache *regcache,
++ int regnum, const void *fpregs)
++{
++ /* FIXME. */
++}
++
++void
++microblaze_collect_fpregset (const struct regcache *regcache,
++ int regnum, void *fpregs)
++{
++ /* FIXME. */
++}
++
++
++/* Return the appropriate register set for the core section identified
++ by SECT_NAME and SECT_SIZE. */
++
++const struct regset *
++microblaze_regset_from_core_section (struct gdbarch *gdbarch,
++ const char *sect_name, size_t sect_size)
++{
++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++
++ microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name);
++
++ if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
++ return tdep->gregset;
++
++ if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
++ return tdep->fpregset;
++
++ microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n");
++ return NULL;
++}
++
++
++
+ static struct gdbarch *
+ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
+@@ -733,6 +812,10 @@ microblaze_gdbarch_init (struct gdbarch_
+ tdep = XCNEW (struct gdbarch_tdep);
+ gdbarch = gdbarch_alloc (&info, tdep);
+
++ tdep->gregset = NULL;
++ tdep->sizeof_gregset = 0;
++ tdep->fpregset = NULL;
++ tdep->sizeof_fpregset = 0;
+ set_gdbarch_long_double_bit (gdbarch, 128);
+
+ set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
+@@ -781,6 +864,13 @@ microblaze_gdbarch_init (struct gdbarch_
+ frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
+ if (tdesc_data != NULL)
+ tdesc_use_registers (gdbarch, tdesc, tdesc_data);
++ //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
++
++ /* If we have register sets, enable the generic core file support. */
++ if (tdep->gregset) {
++ set_gdbarch_regset_from_core_section (gdbarch,
++ microblaze_regset_from_core_section);
++ }
+
+ return gdbarch;
+ }
+Index: gdb-9.2/gdb/microblaze-tdep.h
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.h
++++ gdb-9.2/gdb/microblaze-tdep.h
+@@ -22,8 +22,22 @@
+
+
+ /* Microblaze architecture-specific information. */
++struct microblaze_gregset
++{
++ unsigned int gregs[32];
++ unsigned int fpregs[32];
++ unsigned int pregs[16];
++};
++
+ struct gdbarch_tdep
+ {
++ int dummy; // declare something.
++
++ /* Register sets. */
++ struct regset *gregset;
++ size_t sizeof_gregset;
++ struct regset *fpregset;
++ size_t sizeof_fpregset;
+ };
+
+ /* Register numbers. */
+@@ -120,5 +134,18 @@ struct microblaze_frame_cache
+ #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
+ #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
+
++extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset,
++ struct regcache *regcache,
++ int regnum, const void *gregs);
++extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset,
++ const struct regcache *regcache,
++ int regnum, void *gregs);
++extern void microblaze_supply_fpregset (struct regcache *regcache,
++ int regnum, const void *fpregs);
++extern void microblaze_collect_fpregset (const struct regcache *regcache,
++ int regnum, void *fpregs);
++
++extern const struct regset * microblaze_regset_from_core_section (struct gdbarch *gdbarch,
++ const char *sect_name, size_t sect_size);
+
+ #endif /* microblaze-tdep.h */
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Fix-debug-message-when-register-is-unavailable.patch
similarity index 74%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Fix-debug-message-when-register-is-unavailable.patch
index f0c182d..9983f17 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-Fix-debug-message-when-register-is-unavailable.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Fix-debug-message-when-register-is-unavailable.patch
@@ -1,18 +1,18 @@
-From 41fd9d3645d610ff65171e9a44427711232cb4b8 Mon Sep 17 00:00:00 2001
+From c6da374fbce33b35b060a07ee446aaf1803b1e1d Mon Sep 17 00:00:00 2001
From: Nathan Rossi <nathan.rossi@petalogix.com>
Date: Tue, 8 May 2012 18:11:17 +1000
-Subject: [PATCH 36/40] Fix debug message when register is unavailable
+Subject: [PATCH 35/52] Fix debug message when register is unavailable
Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
---
gdb/frame.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
-diff --git a/gdb/frame.c b/gdb/frame.c
-index c746a6a231e..571722c7351 100644
---- a/gdb/frame.c
-+++ b/gdb/frame.c
-@@ -1255,12 +1255,19 @@ frame_unwind_register_value (frame_info *next_frame, int regnum)
+Index: gdb-9.2/gdb/frame.c
+===================================================================
+--- gdb-9.2.orig/gdb/frame.c
++++ gdb-9.2/gdb/frame.c
+@@ -1255,12 +1255,19 @@ frame_unwind_register_value (frame_info
else
{
int i;
@@ -35,6 +35,3 @@
fprintf_unfiltered (gdb_stdlog, "]");
}
}
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch
deleted file mode 100644
index 171a0bf..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0035-Initial-port-of-core-reading-support.patch
+++ /dev/null
@@ -1,298 +0,0 @@
-From f8cbcd1ef78f6ce9ae8d3382bf2bb0d1e770d201 Mon Sep 17 00:00:00 2001
-From: Mahesh Bodapati <mbodapat@xilinx.com>
-Date: Tue, 24 Jan 2017 14:55:56 +0530
-Subject: [PATCH 35/40] Initial port of core reading support Added support for
- reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO
- information for rebuilding ".reg" sections of core dumps at run time.
-
-Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
-Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com>
----
- bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++
- gdb/configure.tgt | 2 +-
- gdb/microblaze-linux-tdep.c | 17 +++++++-
- gdb/microblaze-tdep.c | 48 +++++++++++++++++++++
- gdb/microblaze-tdep.h | 27 ++++++++++++
- 5 files changed, 176 insertions(+), 2 deletions(-)
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 04816a4a187..cb7a98d307e 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -767,6 +767,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name)
- return _bfd_elf_is_local_label_name (abfd, name);
- }
-
-+/* Support for core dump NOTE sections. */
-+static bfd_boolean
-+microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
-+{
-+ int offset;
-+ unsigned int size;
-+
-+ switch (note->descsz)
-+ {
-+ default:
-+ return FALSE;
-+
-+ case 228: /* Linux/MicroBlaze */
-+ /* pr_cursig */
-+ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
-+
-+ /* pr_pid */
-+ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
-+
-+ /* pr_reg */
-+ offset = 72;
-+ size = 50 * 4;
-+
-+ break;
-+ }
-+
-+ /* Make a ".reg/999" section. */
-+ return _bfd_elfcore_make_pseudosection (abfd, ".reg",
-+ size, note->descpos + offset);
-+}
-+
-+static bfd_boolean
-+microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
-+{
-+ switch (note->descsz)
-+ {
-+ default:
-+ return FALSE;
-+
-+ case 128: /* Linux/MicroBlaze elf_prpsinfo */
-+ elf_tdata (abfd)->core->program
-+ = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
-+ elf_tdata (abfd)->core->command
-+ = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
-+ }
-+
-+ /* Note that for some reason, a spurious space is tacked
-+ onto the end of the args in some (at least one anyway)
-+ implementations, so strip it off if it exists. */
-+
-+ {
-+ char *command = elf_tdata (abfd)->core->command;
-+ int n = strlen (command);
-+
-+ if (0 < n && command[n - 1] == ' ')
-+ command[n - 1] = '\0';
-+ }
-+
-+ return TRUE;
-+}
-+
-+/* The microblaze linker (like many others) needs to keep track of
-+ the number of relocs that it decides to copy as dynamic relocs in
-+ check_relocs for each symbol. This is so that it can later discard
-+ them if they are found to be unnecessary. We store the information
-+ in a field extending the regular ELF linker hash table. */
-+
-+struct elf32_mb_dyn_relocs
-+{
-+ struct elf32_mb_dyn_relocs *next;
-+
-+ /* The input section of the reloc. */
-+ asection *sec;
-+
-+ /* Total number of relocs copied for the input section. */
-+ bfd_size_type count;
-+
-+ /* Number of pc-relative relocs copied for the input section. */
-+ bfd_size_type pc_count;
-+};
-+
- /* ELF linker hash entry. */
-
- struct elf32_mb_link_hash_entry
-@@ -3673,4 +3754,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
- #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections
- #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook
-
-+#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus
-+#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo
-+
- #include "elf32-target.h"
-diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index caa42be1c01..f0386568460 100644
---- a/gdb/configure.tgt
-+++ b/gdb/configure.tgt
-@@ -400,7 +400,7 @@ mep-*-*)
-
- microblaze*-linux-*|microblaze*-*-linux*)
- # Target: Xilinx MicroBlaze running Linux
-- gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o \
-+ gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o glibc-tdep.o \
- symfile-mem.o linux-tdep.o"
- gdb_sim=../sim/microblaze/libsim.a
- ;;
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 42c219d32f3..0afb6efeba3 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -36,6 +36,7 @@
- #include "frame-unwind.h"
- #include "tramp-frame.h"
- #include "linux-tdep.h"
-+#include "glibc-tdep.h"
-
- static int microblaze_debug_flag = 0;
-
-@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame =
- microblaze_linux_sighandler_cache_init
- };
-
--
- static void
- microblaze_linux_init_abi (struct gdbarch_info info,
- struct gdbarch *gdbarch)
- {
-+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+
-+ tdep->sizeof_gregset = 200;
-+
- linux_init_abi (info, gdbarch);
-
- set_gdbarch_memory_remove_breakpoint (gdbarch,
-@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- tramp_frame_prepend_unwinder (gdbarch,
- µblaze_linux_sighandler_tramp_frame);
-
-+ /* BFD target for core files. */
-+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+ else
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+
-+
-+ /* Shared library handling. */
-+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
-+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
-+
- /* Enable TLS support. */
- set_gdbarch_fetch_tls_load_module_address (gdbarch,
- svr4_fetch_objfile_link_map);
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 0168e4881ed..98944f38d2a 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
-@@ -677,6 +677,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
- tdesc_microblaze_with_stack_protect);
- }
-
-+void
-+microblaze_supply_gregset (const struct regset *regset,
-+ struct regcache *regcache,
-+ int regnum, const void *gregs)
-+{
-+ const unsigned int *regs = (const unsigned int *)gregs;
-+ if (regnum >= 0)
-+ regcache->raw_supply (regnum, regs + regnum);
-+
-+ if (regnum == -1) {
-+ int i;
-+
-+ for (i = 0; i < 50; i++) {
-+ regcache->raw_supply (i, regs + i);
-+ }
-+ }
-+}
-+
-+
-+/* Return the appropriate register set for the core section identified
-+ by SECT_NAME and SECT_SIZE. */
-+
-+static void
-+microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
-+ iterate_over_regset_sections_cb *cb,
-+ void *cb_data,
-+ const struct regcache *regcache)
-+{
-+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-+
-+ cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data);
-+
-+ cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data);
-+}
-+
-+
-+
- static struct gdbarch *
- microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- {
-@@ -733,6 +770,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- tdep = XCNEW (struct gdbarch_tdep);
- gdbarch = gdbarch_alloc (&info, tdep);
-
-+ tdep->gregset = NULL;
-+ tdep->sizeof_gregset = 0;
-+ tdep->fpregset = NULL;
-+ tdep->sizeof_fpregset = 0;
- set_gdbarch_long_double_bit (gdbarch, 128);
-
- set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
-@@ -781,6 +822,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
- if (tdesc_data != NULL)
- tdesc_use_registers (gdbarch, tdesc, tdesc_data);
-+ //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
-+
-+ /* If we have register sets, enable the generic core file support. */
-+ if (tdep->gregset) {
-+ set_gdbarch_iterate_over_regset_sections (gdbarch,
-+ microblaze_iterate_over_regset_sections);
-+ }
-
- return gdbarch;
- }
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index db0772643dc..8f41ba19351 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -22,8 +22,22 @@
-
-
- /* Microblaze architecture-specific information. */
-+struct microblaze_gregset
-+{
-+ unsigned int gregs[32];
-+ unsigned int fpregs[32];
-+ unsigned int pregs[16];
-+};
-+
- struct gdbarch_tdep
- {
-+ int dummy; // declare something.
-+
-+ /* Register sets. */
-+ struct regset *gregset;
-+ size_t sizeof_gregset;
-+ struct regset *fpregset;
-+ size_t sizeof_fpregset;
- };
-
- /* Register numbers. */
-@@ -120,5 +134,18 @@ struct microblaze_frame_cache
- #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18}
- #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba}
-
-+extern void microblaze_supply_gregset (const struct regset *regset,
-+ struct regcache *regcache,
-+ int regnum, const void *gregs);
-+extern void microblaze_collect_gregset (const struct regset *regset,
-+ const struct regcache *regcache,
-+ int regnum, void *gregs);
-+extern void microblaze_supply_fpregset (struct regcache *regcache,
-+ int regnum, const void *fpregs);
-+extern void microblaze_collect_fpregset (const struct regcache *regcache,
-+ int regnum, void *fpregs);
-+
-+extern const struct regset * microblaze_regset_from_core_section (struct gdbarch *gdbarch,
-+ const char *sect_name, size_t sect_size);
-
- #endif /* microblaze-tdep.h */
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver.patch
new file mode 100644
index 0000000..cca0c7a
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0036-revert-master-rebase-changes-to-gdbserver.patch
@@ -0,0 +1,28 @@
+From 097961b044891887fec49824edfc15754e5faf10 Mon Sep 17 00:00:00 2001
+From: David Holsgrove <david.holsgrove@xilinx.com>
+Date: Mon, 22 Jul 2013 11:16:05 +1000
+Subject: [PATCH 36/52] revert master-rebase changes to gdbserver
+
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+---
+ gdb/gdbserver/configure.srv | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+Index: gdb-9.2/gdb/gdbserver/configure.srv
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/configure.srv
++++ gdb-9.2/gdb/gdbserver/configure.srv
+@@ -184,6 +184,13 @@ case "${target}" in
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
++ microblaze*-*-linux*) srv_regobj=microblaze-linux.o
++ srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
++ srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++ srv_linux_regsets=yes
++ srv_linux_usrregs=yes
++ srv_linux_thread_db=yes
++ ;;
+ powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
+ srv_regobj="${srv_regobj} powerpc-altivec32l.o"
+ srv_regobj="${srv_regobj} powerpc-vsx32l.o"
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
new file mode 100644
index 0000000..f6c3a06
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-revert-master-rebase-changes-to-gdbserver-previous-c.patch
@@ -0,0 +1,30 @@
+From a8b948a7967cbea9b5b2c00ed85d2beb37db53e9 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 30 Apr 2018 17:09:55 +0530
+Subject: [PATCH 37/52] revert master-rebase changes to gdbserver , previous
+ commit typo's
+
+---
+ gdb/gdbserver/Makefile.in | 2 ++
+ 1 file changed, 2 insertions(+)
+
+Index: gdb-9.2/gdb/gdbserver/Makefile.in
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/Makefile.in
++++ gdb-9.2/gdb/gdbserver/Makefile.in
+@@ -172,6 +172,7 @@ SFILES = \
+ $(srcdir)/linux-low.c \
+ $(srcdir)/linux-m32r-low.c \
+ $(srcdir)/linux-m68k-low.c \
++ $(srcdir)/linux-microblaze-low.c \
+ $(srcdir)/linux-mips-low.c \
+ $(srcdir)/linux-nios2-low.c \
+ $(srcdir)/linux-ppc-low.c \
+@@ -232,6 +233,7 @@ SFILES = \
+ $(srcdir)/nat/linux-osdata.c \
+ $(srcdir)/nat/linux-personality.c \
+ $(srcdir)/nat/mips-linux-watch.c \
++ $(srcdir)/nat/microblaze-linux.c \
+ $(srcdir)/nat/ppc-linux.c \
+ $(srcdir)/nat/fork-inferior.c \
+ $(srcdir)/target/waitstatus.c
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
similarity index 69%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
index 1e0bffb..37a9646 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0037-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch
@@ -1,7 +1,7 @@
-From 7b22823ae82445f52384e6c0bd85431294868eb7 Mon Sep 17 00:00:00 2001
+From 6474cf4147887529ccb506b80f945aa67178f5bd Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Mon, 16 Dec 2013 16:37:32 +1000
-Subject: [PATCH 37/40] microblaze: Add build_gdbserver=yes to top level
+Subject: [PATCH 38/52] microblaze: Add build_gdbserver=yes to top level
configure.tgt
For Microblaze linux toolchains, set the build_gdbserver=yes
@@ -15,10 +15,10 @@
gdb/configure.tgt | 1 +
1 file changed, 1 insertion(+)
-diff --git a/gdb/configure.tgt b/gdb/configure.tgt
-index f0386568460..ae238c17cd5 100644
---- a/gdb/configure.tgt
-+++ b/gdb/configure.tgt
+Index: gdb-9.2/gdb/configure.tgt
+===================================================================
+--- gdb-9.2.orig/gdb/configure.tgt
++++ gdb-9.2/gdb/configure.tgt
@@ -408,6 +408,7 @@ microblaze*-*-*)
# Target: Xilinx MicroBlaze running standalone
gdb_target_obs="microblaze-tdep.o"
@@ -27,6 +27,3 @@
;;
mips*-*-linux*)
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch
deleted file mode 100644
index fb4b35e..0000000
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Fixing-the-issues-related-to-GDB-7.12.patch
+++ /dev/null
@@ -1,216 +0,0 @@
-From f13ffe15c10e5d4b5c87761ae9735144d4c8da17 Mon Sep 17 00:00:00 2001
-From: Nagaraju Mekala <nmekala@xilix.com>
-Date: Fri, 17 Feb 2017 14:09:40 +0530
-Subject: [PATCH 39/40] Fixing the issues related to GDB-7.12
-
-added all the required function which are new in 7.12 and removed
-few deprecated functions from 7.6
----
- gdb/config/microblaze/linux.mh | 4 +-
- gdb/gdbserver/configure.srv | 3 +-
- gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
- gdb/microblaze-tdep.h | 1 +
- 4 files changed, 89 insertions(+), 16 deletions(-)
-
-diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-index a4eaf540e1d..74a53b854a4 100644
---- a/gdb/config/microblaze/linux.mh
-+++ b/gdb/config/microblaze/linux.mh
-@@ -1,9 +1,11 @@
- # Host: Microblaze, running Linux
-
-+#linux-nat.o linux-waitpid.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o
- NAT_FILE= config/nm-linux.h
- NATDEPFILES= inf-ptrace.o fork-child.o \
- microblaze-linux-nat.o proc-service.o linux-thread-db.o \
-- linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o
-+ linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o \
-+ linux-waitpid.o linux-personality.o linux-namespaces.o
- NAT_CDEPS = $(srcdir)/proc-service.list
-
- LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
-index e0d2b2fe04a..26db2dd2461 100644
---- a/gdb/gdbserver/configure.srv
-+++ b/gdb/gdbserver/configure.srv
-@@ -185,8 +185,7 @@ case "${target}" in
- srv_linux_thread_db=yes
- ;;
- microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
-- srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
-- srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
-+ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
- srv_xmlfiles="microblaze-linux.xml"
- srv_linux_regsets=yes
- srv_linux_usrregs=yes
-diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c
-index cba5d6fc585..a2733f3c21c 100644
---- a/gdb/gdbserver/linux-microblaze-low.c
-+++ b/gdb/gdbserver/linux-microblaze-low.c
-@@ -39,10 +39,11 @@ static int microblaze_regmap[] =
- PT_FSR
- };
-
--#define microblaze_num_regs (sizeof microblaze_regmap / sizeof microblaze_regmap[0])
-+#define microblaze_num_regs (sizeof (microblaze_regmap) / sizeof (microblaze_regmap[0]))
-
- /* Defined in auto-generated file microblaze-linux.c. */
- void init_registers_microblaze (void);
-+extern const struct target_desc *tdesc_microblaze;
-
- static int
- microblaze_cannot_store_register (int regno)
-@@ -81,6 +82,15 @@ microblaze_set_pc (struct regcache *regcache, CORE_ADDR pc)
- static const unsigned long microblaze_breakpoint = 0xba0c0018;
- #define microblaze_breakpoint_len 4
-
-+/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
-+
-+static const gdb_byte *
-+microblaze_sw_breakpoint_from_kind (int kind, int *size)
-+{
-+ *size = microblaze_breakpoint_len;
-+ return (const gdb_byte *) µblaze_breakpoint;
-+}
-+
- static int
- microblaze_breakpoint_at (CORE_ADDR where)
- {
-@@ -107,7 +117,7 @@ microblaze_reinsert_addr (struct regcache *regcache)
- static void
- microblaze_collect_ptrace_register (struct regcache *regcache, int regno, char *buf)
- {
-- int size = register_size (regno);
-+ int size = register_size (regcache->tdesc, regno);
-
- memset (buf, 0, sizeof (long));
-
-@@ -121,7 +131,7 @@ static void
- microblaze_supply_ptrace_register (struct regcache *regcache,
- int regno, const char *buf)
- {
-- int size = register_size (regno);
-+ int size = register_size (regcache->tdesc, regno);
-
- if (regno == 0) {
- unsigned long regbuf_0 = 0;
-@@ -157,33 +167,94 @@ microblaze_store_gregset (struct regcache *regcache, const void *buf)
-
- #endif /* HAVE_PTRACE_GETREGS */
-
--struct regset_info target_regsets[] = {
-+static struct regset_info microblaze_regsets[] = {
- #ifdef HAVE_PTRACE_GETREGS
- { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), GENERAL_REGS, microblaze_fill_gregset, microblaze_store_gregset },
-- { 0, 0, 0, -1, -1, NULL, NULL },
-+ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL },
- #endif /* HAVE_PTRACE_GETREGS */
-- { 0, 0, 0, -1, -1, NULL, NULL }
-+ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL },
-+ NULL_REGSET
- };
-
-+static struct usrregs_info microblaze_usrregs_info =
-+ {
-+ microblaze_num_regs,
-+ microblaze_regmap,
-+ };
-+
-+static struct regsets_info microblaze_regsets_info =
-+ {
-+ microblaze_regsets, /* regsets */
-+ 0, /* num_regsets */
-+ NULL, /* disabled_regsets */
-+ };
-+
-+static struct regs_info regs_info =
-+ {
-+ NULL, /* regset_bitmap */
-+ µblaze_usrregs_info,
-+ µblaze_regsets_info
-+ };
-+
-+static const struct regs_info *
-+microblaze_regs_info (void)
-+{
-+ return ®s_info;
-+}
-+
-+/* Support for hardware single step. */
-+
-+static int
-+microblaze_supports_hardware_single_step (void)
-+{
-+ return 1;
-+}
-+
-+
-+static void
-+microblaze_arch_setup (void)
-+{
-+ current_process ()->tdesc = tdesc_microblaze;
-+}
-+
- struct linux_target_ops the_low_target = {
-- init_registers_microblaze,
-- microblaze_num_regs,
-- microblaze_regmap,
-- NULL,
-+ microblaze_arch_setup,
-+ microblaze_regs_info,
- microblaze_cannot_fetch_register,
- microblaze_cannot_store_register,
- NULL, /* fetch_register */
- microblaze_get_pc,
- microblaze_set_pc,
-- (const unsigned char *) µblaze_breakpoint,
-- microblaze_breakpoint_len,
-- microblaze_reinsert_addr,
-+ NULL,
-+ microblaze_sw_breakpoint_from_kind,
-+ NULL,
- 0,
- microblaze_breakpoint_at,
- NULL,
- NULL,
- NULL,
- NULL,
-+ NULL,
- microblaze_collect_ptrace_register,
- microblaze_supply_ptrace_register,
-+ NULL, /* siginfo_fixup */
-+ NULL, /* new_process */
-+ NULL, /* new_thread */
-+ NULL, /* new_fork */
-+ NULL, /* prepare_to_resume */
-+ NULL, /* process_qsupported */
-+ NULL, /* supports_tracepoints */
-+ NULL, /* get_thread_area */
-+ NULL, /* install_fast_tracepoint_jump_pad */
-+ NULL, /* emit_ops */
-+ NULL, /* get_min_fast_tracepoint_insn_len */
-+ NULL, /* supports_range_stepping */
-+ NULL, /* breakpoint_kind_from_current_state */
-+ microblaze_supports_hardware_single_step,
- };
-+
-+void
-+initialize_low_arch (void)
-+{
-+ init_registers_microblaze ();
-+}
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index 8f41ba19351..d2112dc07e1 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
-@@ -24,6 +24,7 @@
- /* Microblaze architecture-specific information. */
- struct microblaze_gregset
- {
-+ microblaze_gregset() {}
- unsigned int gregs[32];
- unsigned int fpregs[32];
- unsigned int pregs[16];
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-support-for-native-gdb.patch
similarity index 95%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-support-for-native-gdb.patch
index afde3ce..669b592 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0038-Initial-support-for-native-gdb.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-support-for-native-gdb.patch
@@ -1,12 +1,15 @@
-From a06b9c4860af1f8f18ccb7c0653c76c623636034 Mon Sep 17 00:00:00 2001
+From db3c0a8a59b292eea6ed1f532f4097c40cafd7df Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@petalogix.com>
Date: Fri, 20 Jul 2012 15:18:35 +1000
-Subject: [PATCH 38/40] Initial support for native gdb
+Subject: [PATCH 39/52] Initial support for native gdb
microblaze: Follow PPC method of getting setting registers
using PTRACE PEEK/POKE
Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com>
+
+Conflicts:
+ gdb/Makefile.in
---
gdb/Makefile.in | 2 +
gdb/config/microblaze/linux.mh | 9 +
@@ -15,10 +18,10 @@
create mode 100644 gdb/config/microblaze/linux.mh
create mode 100644 gdb/microblaze-linux-nat.c
-diff --git a/gdb/Makefile.in b/gdb/Makefile.in
-index c3e074b21fe..cbcd8f43326 100644
---- a/gdb/Makefile.in
-+++ b/gdb/Makefile.in
+Index: gdb-9.2/gdb/Makefile.in
+===================================================================
+--- gdb-9.2.orig/gdb/Makefile.in
++++ gdb-9.2/gdb/Makefile.in
@@ -1337,6 +1337,7 @@ HFILES_NO_SRCDIR = \
memory-map.h \
memrange.h \
@@ -35,11 +38,10 @@
mingw-hdep.c \
mips-fbsd-nat.c \
mips-fbsd-tdep.c \
-diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh
-new file mode 100644
-index 00000000000..a4eaf540e1d
+Index: gdb-9.2/gdb/config/microblaze/linux.mh
+===================================================================
--- /dev/null
-+++ b/gdb/config/microblaze/linux.mh
++++ gdb-9.2/gdb/config/microblaze/linux.mh
@@ -0,0 +1,9 @@
+# Host: Microblaze, running Linux
+
@@ -50,11 +52,10 @@
+NAT_CDEPS = $(srcdir)/proc-service.list
+
+LOADLIBES = -ldl $(RDYNAMIC)
-diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
-new file mode 100644
-index 00000000000..e9b8c9c5221
+Index: gdb-9.2/gdb/microblaze-linux-nat.c
+===================================================================
--- /dev/null
-+++ b/gdb/microblaze-linux-nat.c
++++ gdb-9.2/gdb/microblaze-linux-nat.c
@@ -0,0 +1,431 @@
+/* Microblaze GNU/Linux native support.
+
@@ -487,6 +488,3 @@
+ /* Register the target. */
+ linux_nat_add_target (t);
+}
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
new file mode 100644
index 0000000..85f8174
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fixing-the-issues-related-to-GDB-7.12-added-all-the-.patch
@@ -0,0 +1,306 @@
+From bf3c50c95c4dcca6c5c07a3c082bdd9d687f1496 Mon Sep 17 00:00:00 2001
+From: Nagaraju Mekala <nmekala@xilix.com>
+Date: Fri, 17 Feb 2017 14:09:40 +0530
+Subject: [PATCH 40/52] Fixing the issues related to GDB-7.12 added all the
+ required function which are new in 7.12 and removed few deprecated functions
+ from 7.6
+
+---
+ gdb/config/microblaze/linux.mh | 4 +-
+ gdb/gdbserver/configure.srv | 3 +-
+ gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++----
+ gdb/microblaze-linux-tdep.c | 68 +++++++++++++++++--
+ gdb/microblaze-tdep.h | 1 +
+ 5 files changed, 153 insertions(+), 20 deletions(-)
+
+Index: gdb-9.2/gdb/config/microblaze/linux.mh
+===================================================================
+--- gdb-9.2.orig/gdb/config/microblaze/linux.mh
++++ gdb-9.2/gdb/config/microblaze/linux.mh
+@@ -1,9 +1,11 @@
+ # Host: Microblaze, running Linux
+
++#linux-nat.o linux-waitpid.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o
+ NAT_FILE= config/nm-linux.h
+ NATDEPFILES= inf-ptrace.o fork-child.o \
+ microblaze-linux-nat.o proc-service.o linux-thread-db.o \
+- linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o
++ linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o \
++ linux-waitpid.o linux-personality.o linux-namespaces.o
+ NAT_CDEPS = $(srcdir)/proc-service.list
+
+ LOADLIBES = -ldl $(RDYNAMIC)
+Index: gdb-9.2/gdb/gdbserver/configure.srv
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/configure.srv
++++ gdb-9.2/gdb/gdbserver/configure.srv
+@@ -185,8 +185,7 @@ case "${target}" in
+ srv_linux_thread_db=yes
+ ;;
+ microblaze*-*-linux*) srv_regobj=microblaze-linux.o
+- srv_tgtobj="linux-low.o linux-osdata.o linux-microblaze-low.o "
+- srv_tgtobj="${srv_tgtobj} linux-procfs.o linux-ptrace.o"
++ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+Index: gdb-9.2/gdb/gdbserver/linux-microblaze-low.c
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/linux-microblaze-low.c
++++ gdb-9.2/gdb/gdbserver/linux-microblaze-low.c
+@@ -39,10 +39,11 @@ static int microblaze_regmap[] =
+ PT_FSR
+ };
+
+-#define microblaze_num_regs (sizeof microblaze_regmap / sizeof microblaze_regmap[0])
++#define microblaze_num_regs (sizeof (microblaze_regmap) / sizeof (microblaze_regmap[0]))
+
+ /* Defined in auto-generated file microblaze-linux.c. */
+ void init_registers_microblaze (void);
++extern const struct target_desc *tdesc_microblaze;
+
+ static int
+ microblaze_cannot_store_register (int regno)
+@@ -81,6 +82,15 @@ microblaze_set_pc (struct regcache *regc
+ static const unsigned long microblaze_breakpoint = 0xba0c0018;
+ #define microblaze_breakpoint_len 4
+
++/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
++
++static const gdb_byte *
++microblaze_sw_breakpoint_from_kind (int kind, int *size)
++{
++ *size = microblaze_breakpoint_len;
++ return (const gdb_byte *) µblaze_breakpoint;
++}
++
+ static int
+ microblaze_breakpoint_at (CORE_ADDR where)
+ {
+@@ -107,7 +117,7 @@ microblaze_reinsert_addr (struct regcach
+ static void
+ microblaze_collect_ptrace_register (struct regcache *regcache, int regno, char *buf)
+ {
+- int size = register_size (regno);
++ int size = register_size (regcache->tdesc, regno);
+
+ memset (buf, 0, sizeof (long));
+
+@@ -121,7 +131,7 @@ static void
+ microblaze_supply_ptrace_register (struct regcache *regcache,
+ int regno, const char *buf)
+ {
+- int size = register_size (regno);
++ int size = register_size (regcache->tdesc, regno);
+
+ if (regno == 0) {
+ unsigned long regbuf_0 = 0;
+@@ -157,33 +167,94 @@ microblaze_store_gregset (struct regcach
+
+ #endif /* HAVE_PTRACE_GETREGS */
+
+-struct regset_info target_regsets[] = {
++static struct regset_info microblaze_regsets[] = {
+ #ifdef HAVE_PTRACE_GETREGS
+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), GENERAL_REGS, microblaze_fill_gregset, microblaze_store_gregset },
+- { 0, 0, 0, -1, -1, NULL, NULL },
++ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL },
+ #endif /* HAVE_PTRACE_GETREGS */
+- { 0, 0, 0, -1, -1, NULL, NULL }
++ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL },
++ NULL_REGSET
+ };
+
++static struct usrregs_info microblaze_usrregs_info =
++ {
++ microblaze_num_regs,
++ microblaze_regmap,
++ };
++
++static struct regsets_info microblaze_regsets_info =
++ {
++ microblaze_regsets, /* regsets */
++ 0, /* num_regsets */
++ NULL, /* disabled_regsets */
++ };
++
++static struct regs_info regs_info =
++ {
++ NULL, /* regset_bitmap */
++ µblaze_usrregs_info,
++ µblaze_regsets_info
++ };
++
++static const struct regs_info *
++microblaze_regs_info (void)
++{
++ return ®s_info;
++}
++
++/* Support for hardware single step. */
++
++static int
++microblaze_supports_hardware_single_step (void)
++{
++ return 1;
++}
++
++
++static void
++microblaze_arch_setup (void)
++{
++ current_process ()->tdesc = tdesc_microblaze;
++}
++
+ struct linux_target_ops the_low_target = {
+- init_registers_microblaze,
+- microblaze_num_regs,
+- microblaze_regmap,
+- NULL,
++ microblaze_arch_setup,
++ microblaze_regs_info,
+ microblaze_cannot_fetch_register,
+ microblaze_cannot_store_register,
+ NULL, /* fetch_register */
+ microblaze_get_pc,
+ microblaze_set_pc,
+- (const unsigned char *) µblaze_breakpoint,
+- microblaze_breakpoint_len,
+- microblaze_reinsert_addr,
++ NULL,
++ microblaze_sw_breakpoint_from_kind,
++ NULL,
+ 0,
+ microblaze_breakpoint_at,
+ NULL,
+ NULL,
+ NULL,
+ NULL,
++ NULL,
+ microblaze_collect_ptrace_register,
+ microblaze_supply_ptrace_register,
++ NULL, /* siginfo_fixup */
++ NULL, /* new_process */
++ NULL, /* new_thread */
++ NULL, /* new_fork */
++ NULL, /* prepare_to_resume */
++ NULL, /* process_qsupported */
++ NULL, /* supports_tracepoints */
++ NULL, /* get_thread_area */
++ NULL, /* install_fast_tracepoint_jump_pad */
++ NULL, /* emit_ops */
++ NULL, /* get_min_fast_tracepoint_insn_len */
++ NULL, /* supports_range_stepping */
++ NULL, /* breakpoint_kind_from_current_state */
++ microblaze_supports_hardware_single_step,
+ };
++
++void
++initialize_low_arch (void)
++{
++ init_registers_microblaze ();
++}
+Index: gdb-9.2/gdb/microblaze-linux-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-linux-tdep.c
++++ gdb-9.2/gdb/microblaze-linux-tdep.c
+@@ -29,13 +29,76 @@
+ #include "regcache.h"
+ #include "value.h"
+ #include "osabi.h"
+-#include "regset.h"
+ #include "solib-svr4.h"
+ #include "microblaze-tdep.h"
+ #include "trad-frame.h"
+ #include "frame-unwind.h"
+ #include "tramp-frame.h"
+ #include "linux-tdep.h"
++#include "glibc-tdep.h"
++
++#include "gdb_assert.h"
++
++#ifndef REGSET_H
++#define REGSET_H 1
++
++struct gdbarch;
++struct regcache;
++
++/* Data structure for the supported register notes in a core file. */
++struct core_regset_section
++{
++ const char *sect_name;
++ int size;
++ const char *human_name;
++};
++
++/* Data structure describing a register set. */
++
++typedef void (supply_regset_ftype) (const struct regset *, struct regcache *,
++ int, const void *, size_t);
++typedef void (collect_regset_ftype) (const struct regset *,
++ const struct regcache *,
++ int, void *, size_t);
++
++struct regset
++{
++ /* Data pointer for private use by the methods below, presumably
++ providing some sort of description of the register set. */
++ const void *descr;
++
++ /* Function supplying values in a register set to a register cache. */
++ supply_regset_ftype *supply_regset;
++
++ /* Function collecting values in a register set from a register cache. */
++ collect_regset_ftype *collect_regset;
++
++ /* Architecture associated with the register set. */
++ struct gdbarch *arch;
++};
++
++#endif
++
++/* Allocate a fresh 'struct regset' whose supply_regset function is
++ SUPPLY_REGSET, and whose collect_regset function is COLLECT_REGSET.
++ If the regset has no collect_regset function, pass NULL for
++ COLLECT_REGSET.
++
++ The object returned is allocated on ARCH's obstack. */
++
++struct regset *
++regset_alloc (struct gdbarch *arch,
++ supply_regset_ftype *supply_regset,
++ collect_regset_ftype *collect_regset)
++{
++ struct regset *regset = GDBARCH_OBSTACK_ZALLOC (arch, struct regset);
++
++ regset->arch = arch;
++ regset->supply_regset = supply_regset;
++ regset->collect_regset = collect_regset;
++
++ return regset;
++}
+
+ static int microblaze_debug_flag = 0;
+
+@@ -207,9 +270,6 @@ microblaze_linux_init_abi (struct gdbarc
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
+
+- set_gdbarch_regset_from_core_section (gdbarch,
+- microblaze_regset_from_core_section);
+-
+ /* Enable TLS support. */
+ set_gdbarch_fetch_tls_load_module_address (gdbarch,
+ svr4_fetch_objfile_link_map);
+Index: gdb-9.2/gdb/microblaze-tdep.h
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.h
++++ gdb-9.2/gdb/microblaze-tdep.h
+@@ -24,6 +24,7 @@
+ /* Microblaze architecture-specific information. */
+ struct microblaze_gregset
+ {
++ microblaze_gregset() {}
+ unsigned int gregs[32];
+ unsigned int fpregs[32];
+ unsigned int pregs[16];
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
similarity index 74%
rename from meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
rename to meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
index 7ac8f07..0c72e79 100644
--- a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0040-Patch-microblaze-Adding-64-bit-MB-support.patch
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0041-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch
@@ -1,31 +1,33 @@
-From 4e5a4e94cb1dd61646230100f883bd27a39cd896 Mon Sep 17 00:00:00 2001
+From 992c41987cb6c89bb3f9cbc0f6a2b0aa3458e4d2 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Thu, 31 Jan 2019 14:36:00 +0530
-Subject: [PATCH 40/40] [Patch, microblaze]: Adding 64 bit MB support
+Subject: [PATCH 41/52] Adding 64 bit MB support Added new architecture to
+ Microblaze 64-bit support to GDB Signed-off-by :Nagaraju Mekala
+ <nmekala@xilix.com>
-Added new architecture to Microblaze 64-bit support to GDB
-
-Signed-off-by :Nagaraju Mekala <nmekala@xilix.com>
+Conflicts:
+ gdb/Makefile.in
---
bfd/archures.c | 2 +
bfd/bfd-in2.h | 2 +
- bfd/cpu-microblaze.c | 16 +-
- bfd/elf32-microblaze.c | 9 +
+ bfd/cpu-microblaze.c | 8 +-
+ gas/config/tc-microblaze.c | 13 ++
+ gas/config/tc-microblaze.h | 4 +
gdb/features/Makefile | 3 +
gdb/features/microblaze-core.xml | 6 +-
- gdb/features/microblaze-with-stack-protect.c | 4 +-
+ gdb/features/microblaze-stack-protect.xml | 4 +-
+ gdb/features/microblaze-with-stack-protect.c | 8 +-
gdb/features/microblaze.c | 6 +-
- gdb/features/microblaze64-core.xml | 69 +++++++
- gdb/features/microblaze64-stack-protect.xml | 12 ++
- .../microblaze64-with-stack-protect.c | 79 ++++++++
- .../microblaze64-with-stack-protect.xml | 12 ++
- gdb/features/microblaze64.c | 77 ++++++++
- gdb/features/microblaze64.xml | 11 ++
- gdb/microblaze-linux-tdep.c | 29 ++-
- gdb/microblaze-tdep.c | 176 ++++++++++++++++--
- gdb/microblaze-tdep.h | 9 +-
+ gdb/features/microblaze64-core.xml | 69 ++++++
+ gdb/features/microblaze64-stack-protect.xml | 12 +
+ .../microblaze64-with-stack-protect.c | 79 +++++++
+ .../microblaze64-with-stack-protect.xml | 12 +
+ gdb/features/microblaze64.c | 77 +++++++
+ gdb/features/microblaze64.xml | 11 +
+ gdb/microblaze-tdep.c | 207 ++++++++++++++++--
+ gdb/microblaze-tdep.h | 8 +-
.../microblaze-with-stack-protect.dat | 4 +-
- 20 files changed, 504 insertions(+), 40 deletions(-)
+ 19 files changed, 491 insertions(+), 44 deletions(-)
create mode 100644 gdb/features/microblaze64-core.xml
create mode 100644 gdb/features/microblaze64-stack-protect.xml
create mode 100644 gdb/features/microblaze64-with-stack-protect.c
@@ -33,10 +35,10 @@
create mode 100644 gdb/features/microblaze64.c
create mode 100644 gdb/features/microblaze64.xml
-diff --git a/bfd/archures.c b/bfd/archures.c
-index 7866c6095b5..abc1541afe6 100644
---- a/bfd/archures.c
-+++ b/bfd/archures.c
+Index: gdb-9.2/bfd/archures.c
+===================================================================
+--- gdb-9.2.orig/bfd/archures.c
++++ gdb-9.2/bfd/archures.c
@@ -513,6 +513,8 @@ DESCRIPTION
. bfd_arch_lm32, {* Lattice Mico32. *}
.#define bfd_mach_lm32 1
@@ -46,10 +48,10 @@
. bfd_arch_tilepro, {* Tilera TILEPro. *}
. bfd_arch_tilegx, {* Tilera TILE-Gx. *}
.#define bfd_mach_tilepro 1
-diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 91761bf6964..cc34ce0d8c3 100644
---- a/bfd/bfd-in2.h
-+++ b/bfd/bfd-in2.h
+Index: gdb-9.2/bfd/bfd-in2.h
+===================================================================
+--- gdb-9.2.orig/bfd/bfd-in2.h
++++ gdb-9.2/bfd/bfd-in2.h
@@ -1896,6 +1896,8 @@ enum bfd_architecture
bfd_arch_lm32, /* Lattice Mico32. */
#define bfd_mach_lm32 1
@@ -59,38 +61,29 @@
bfd_arch_tilepro, /* Tilera TILEPro. */
bfd_arch_tilegx, /* Tilera TILE-Gx. */
#define bfd_mach_tilepro 1
-diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c
-index 4b48b310c6a..a32c4a33d75 100644
---- a/bfd/cpu-microblaze.c
-+++ b/bfd/cpu-microblaze.c
-@@ -30,8 +30,8 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
- 64, /* 32 bits in a word. */
+Index: gdb-9.2/bfd/cpu-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/cpu-microblaze.c
++++ gdb-9.2/bfd/cpu-microblaze.c
+@@ -31,7 +31,7 @@ const bfd_arch_info_type bfd_microblaze_
64, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
-- bfd_arch_microblaze, /* Architecture. */
+ bfd_arch_microblaze, /* Architecture. */
- 0, /* Machine number - 0 for now. */
-+ bfd_arch_microblaze, /* Architecture. */
-+ bfd_mach_microblaze64, /* 64 bit Machine */
++ bfd_mach_microblaze64, /* 64 bit Machine */
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -43,11 +43,11 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
- 0 /* Maximum offset of a reloc from the start of an insn. */
- },
- {
-- 32, /* Bits in a word. */
-- 32, /* Bits in an address. */
-- 8, /* Bits in a byte. */
-+ 32, /* 32 bits in a word. */
-+ 32, /* 32 bits in an address. */
-+ 8, /* 8 bits in a byte. */
+@@ -46,7 +46,7 @@ const bfd_arch_info_type bfd_microblaze_
+ 32, /* Bits in an address. */
+ 8, /* Bits in a byte. */
bfd_arch_microblaze, /* Architecture number. */
- 0, /* Machine number - 0 for now. */
-+ bfd_mach_microblaze, /* 32 bit Machine */
++ bfd_mach_microblaze, /* 32 bit Machine */
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -64,7 +64,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -63,7 +63,7 @@ const bfd_arch_info_type bfd_microblaze_
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_microblaze, /* Architecture. */
@@ -99,7 +92,7 @@
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-@@ -80,7 +80,7 @@ const bfd_arch_info_type bfd_microblaze_arch[] =
+@@ -78,7 +78,7 @@ const bfd_arch_info_type bfd_microblaze_
64, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_microblaze, /* Architecture. */
@@ -108,37 +101,11 @@
"microblaze", /* Architecture name. */
"MicroBlaze", /* Printable name. */
3, /* Section align power. */
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index cb7a98d307e..e4a70150190 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -3684,6 +3684,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
- return TRUE;
- }
-
-+
-+static bfd_boolean
-+elf_microblaze_object_p (bfd *abfd)
-+{
-+ /* Set the right machine number for an s390 elf32 file. */
-+ return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze);
-+}
-+
- /* Hook called by the linker routine which adds symbols from an object
- file. We use it to put .comm items in .sbss, and not .bss. */
-
-@@ -3756,5 +3764,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd,
-
- #define elf_backend_grok_prstatus microblaze_elf_grok_prstatus
- #define elf_backend_grok_psinfo microblaze_elf_grok_psinfo
-+#define elf_backend_object_p elf_microblaze_object_p
-
- #include "elf32-target.h"
-diff --git a/gdb/features/Makefile b/gdb/features/Makefile
-index 9a98b0542c4..438e0c5a3fe 100644
---- a/gdb/features/Makefile
-+++ b/gdb/features/Makefile
-@@ -48,6 +48,7 @@ WHICH = arm/arm-with-iwmmxt arm/arm-with-vfpv2 arm/arm-with-vfpv3 \
+Index: gdb-9.2/gdb/features/Makefile
+===================================================================
+--- gdb-9.2.orig/gdb/features/Makefile
++++ gdb-9.2/gdb/features/Makefile
+@@ -48,6 +48,7 @@ WHICH = arm/arm-with-iwmmxt arm/arm-with
arm/arm-with-neon \
mips-linux mips-dsp-linux \
microblaze-with-stack-protect \
@@ -156,10 +123,10 @@
mips-dsp-linux.xml \
mips-linux.xml \
mips64-dsp-linux.xml \
-diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml
-index f272650a41b..d1f2282fd1e 100644
---- a/gdb/features/microblaze-core.xml
-+++ b/gdb/features/microblaze-core.xml
+Index: gdb-9.2/gdb/features/microblaze-core.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-core.xml
++++ gdb-9.2/gdb/features/microblaze-core.xml
@@ -8,7 +8,7 @@
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.microblaze.core">
@@ -182,14 +149,27 @@
<reg name="rtlbsx" bitsize="32"/>
<reg name="rtlblo" bitsize="32"/>
<reg name="rtlbhi" bitsize="32"/>
-+ <reg name="rslr" bitsize="32"/>
-+ <reg name="rshr" bitsize="32"/>
++ <reg name="slr" bitsize="32"/>
++ <reg name="shr" bitsize="32"/>
</feature>
-diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c
-index b39aa198874..ab162fd2588 100644
---- a/gdb/features/microblaze-with-stack-protect.c
-+++ b/gdb/features/microblaze-with-stack-protect.c
-@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+Index: gdb-9.2/gdb/features/microblaze-stack-protect.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-stack-protect.xml
++++ gdb-9.2/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+- <reg name="rslr" bitsize="32"/>
+- <reg name="rshr" bitsize="32"/>
++ <reg name="slr" bitsize="32"/>
++ <reg name="shr" bitsize="32"/>
+ </feature>
+Index: gdb-9.2/gdb/features/microblaze-with-stack-protect.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-with-stack-protect.c
++++ gdb-9.2/gdb/features/microblaze-with-stack-protect.c
+@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_p
feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.core");
tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
@@ -198,7 +178,7 @@
tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
-@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void)
+@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_p
tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int");
tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int");
@@ -207,10 +187,21 @@
tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int");
tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int");
-diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c
-index 6c86fc07700..7919ac96e62 100644
---- a/gdb/features/microblaze.c
-+++ b/gdb/features/microblaze.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_p
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+- tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
+
+ tdesc_microblaze_with_stack_protect = result;
+ }
+Index: gdb-9.2/gdb/features/microblaze.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze.c
++++ gdb-9.2/gdb/features/microblaze.c
@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void)
feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.core");
@@ -233,16 +224,15 @@
tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
tdesc_microblaze = result;
}
-diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml
-new file mode 100644
-index 00000000000..b9adadfade6
+Index: gdb-9.2/gdb/features/microblaze64-core.xml
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64-core.xml
++++ gdb-9.2/gdb/features/microblaze64-core.xml
@@ -0,0 +1,69 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
@@ -310,14 +300,13 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
-+ <reg name="rslr" bitsize="64"/>
-+ <reg name="rshr" bitsize="64"/>
++ <reg name="slr" bitsize="64"/>
++ <reg name="shr" bitsize="64"/>
+</feature>
-diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml
-new file mode 100644
-index 00000000000..9d7ea8b9fd7
+Index: gdb-9.2/gdb/features/microblaze64-stack-protect.xml
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64-stack-protect.xml
++++ gdb-9.2/gdb/features/microblaze64-stack-protect.xml
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
@@ -328,14 +317,13 @@
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.microblaze64.stack-protect">
-+ <reg name="rslr" bitsize="64"/>
-+ <reg name="rshr" bitsize="64"/>
++ <reg name="slr" bitsize="64"/>
++ <reg name="shr" bitsize="64"/>
+</feature>
-diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c
-new file mode 100644
-index 00000000000..249cb534daa
+Index: gdb-9.2/gdb/features/microblaze64-with-stack-protect.c
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64-with-stack-protect.c
++++ gdb-9.2/gdb/features/microblaze64-with-stack-protect.c
@@ -0,0 +1,79 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: microblaze-with-stack-protect.xml */
@@ -411,16 +399,15 @@
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64_with_stack_protect = result;
+}
-diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml
-new file mode 100644
-index 00000000000..0e9f01611f3
+Index: gdb-9.2/gdb/features/microblaze64-with-stack-protect.xml
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64-with-stack-protect.xml
++++ gdb-9.2/gdb/features/microblaze64-with-stack-protect.xml
@@ -0,0 +1,12 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
@@ -434,11 +421,10 @@
+ <xi:include href="microblaze64-core.xml"/>
+ <xi:include href="microblaze64-stack-protect.xml"/>
+</target>
-diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c
-new file mode 100644
-index 00000000000..5d3e2c8cd91
+Index: gdb-9.2/gdb/features/microblaze64.c
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64.c
++++ gdb-9.2/gdb/features/microblaze64.c
@@ -0,0 +1,77 @@
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: microblaze.xml */
@@ -512,16 +498,15 @@
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
-+ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
-+ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64 = result;
+}
-diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml
-new file mode 100644
-index 00000000000..515d18e65cf
+Index: gdb-9.2/gdb/features/microblaze64.xml
+===================================================================
--- /dev/null
-+++ b/gdb/features/microblaze64.xml
++++ gdb-9.2/gdb/features/microblaze64.xml
@@ -0,0 +1,11 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
@@ -534,57 +519,10 @@
+<target>
+ <xi:include href="microblaze64-core.xml"/>
+</target>
-diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c
-index 0afb6efeba3..48459a76991 100644
---- a/gdb/microblaze-linux-tdep.c
-+++ b/gdb/microblaze-linux-tdep.c
-@@ -159,9 +159,30 @@ microblaze_linux_init_abi (struct gdbarch_info info,
-
- /* BFD target for core files. */
- if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
-- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+ {
-+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
-+ MICROBLAZE_REGISTER_SIZE=8;
-+ }
-+ else
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
-+ }
- else
-- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+ {
-+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
-+ MICROBLAZE_REGISTER_SIZE=8;
-+ }
-+ else
-+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
-+ }
-+
-+ switch (info.bfd_arch_info->mach)
-+ {
-+ case bfd_mach_microblaze64:
-+ set_gdbarch_ptr_bit (gdbarch, 64);
-+ break;
-+ }
-
-
- /* Shared library handling. */
-@@ -176,6 +197,8 @@ microblaze_linux_init_abi (struct gdbarch_info info,
- void
- _initialize_microblaze_linux_tdep (void)
- {
-- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX,
-+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX,
-+ microblaze_linux_init_abi);
-+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX,
- microblaze_linux_init_abi);
- }
-diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c
-index 98944f38d2a..5c0d6dd48ae 100644
---- a/gdb/microblaze-tdep.c
-+++ b/gdb/microblaze-tdep.c
+Index: gdb-9.2/gdb/microblaze-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.c
++++ gdb-9.2/gdb/microblaze-tdep.c
@@ -40,7 +40,9 @@
#include "remote.h"
@@ -595,34 +533,57 @@
/* Instruction macros used for analyzing the prologue. */
/* This set of instruction macros need to be changed whenever the
-@@ -79,8 +81,9 @@ static const char *microblaze_register_names[] =
+@@ -75,12 +77,13 @@ static const char *microblaze_register_n
+ "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+ "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+ "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+- "rslr", "rshr"
++ "slr", "shr"
};
#define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
--
-+
+
static unsigned int microblaze_debug_flag = 0;
-+int MICROBLAZE_REGISTER_SIZE = 4;
++int reg_size = 4;
static void ATTRIBUTE_PRINTF (1, 2)
microblaze_debug (const char *fmt, ...)
-@@ -137,6 +140,7 @@ microblaze_fetch_instruction (CORE_ADDR pc)
- constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
-
- typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+@@ -145,6 +148,7 @@ microblaze_store_arguments (struct regca
+ error (_("store_arguments not implemented"));
+ return sp;
+ }
+#if 0
static int
microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
-@@ -169,6 +173,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -154,7 +158,7 @@ microblaze_linux_memory_remove_breakpoin
+ int val;
+ int bplen;
+ gdb_byte old_contents[BREAKPOINT_MAX];
+- struct cleanup *cleanup;
++ //struct cleanup *cleanup;
+ /* Determine appropriate breakpoint contents and size for this address. */
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+@@ -162,7 +166,8 @@ microblaze_linux_memory_remove_breakpoin
+ error (_("Software breakpoints not implemented for this target."));
+
+ /* Make sure we see the memory breakpoints. */
+- cleanup = make_show_memory_breakpoints_cleanup (1);
++ scoped_restore
++ cleanup = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
+@@ -178,6 +183,7 @@ microblaze_linux_memory_remove_breakpoin
return val;
}
-+#endif
++#endif
/* Allocate and initialize a frame cache. */
-@@ -556,7 +561,6 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache,
+ static struct microblaze_frame_cache *
+@@ -570,17 +576,16 @@ microblaze_extract_return_value (struct
gdb_byte *valbuf)
{
gdb_byte buf[8];
@@ -630,7 +591,19 @@
/* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
switch (TYPE_LENGTH (type))
{
-@@ -633,7 +637,113 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
+ case 1: /* return last byte in the register. */
+ regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
++ memcpy(valbuf, buf + reg_size - 1, 1);
+ return;
+ case 2: /* return last 2 bytes in register. */
+ regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
+- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
++ memcpy(valbuf, buf + reg_size - 2, 2);
+ return;
+ case 4: /* for sizes 4 or 8, copy the required length. */
+ case 8:
+@@ -647,7 +652,119 @@ microblaze_stabs_argument_has_addr (stru
return (TYPE_LENGTH (type) == 16);
}
@@ -742,14 +715,16 @@
+}
+#endif
+
++static void
++microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
++{
++ regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
++}
++
static int dwarf2_to_reg_map[78] =
{ 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
-@@ -665,24 +775,27 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
- return -1;
- }
-
-+#if 0
+@@ -682,13 +799,14 @@ microblaze_dwarf2_reg_to_regnum (struct
static void
microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
{
@@ -765,27 +740,46 @@
- tdesc_microblaze_with_stack_protect);
+ tdesc_microblaze64_with_stack_protect);
}
-+#endif
void
- microblaze_supply_gregset (const struct regset *regset,
+@@ -696,15 +814,15 @@ microblaze_supply_gregset (const struct
struct regcache *regcache,
int regnum, const void *gregs)
{
-- const unsigned int *regs = (const unsigned int *)gregs;
+- unsigned int *regs = gregs;
+ const gdb_byte *regs = (const gdb_byte *) gregs;
if (regnum >= 0)
- regcache->raw_supply (regnum, regs + regnum);
+- regcache_raw_supply (regcache, regnum, regs + regnum);
++ regcache->raw_supply (regnum, regs + regnum);
-@@ -713,7 +826,6 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch,
+ if (regnum == -1) {
+ int i;
+
+ for (i = 0; i < 50; i++) {
+- regcache_raw_supply (regcache, i, regs + i);
++ regcache->raw_supply (regnum, regs + i);
+ }
+ }
+ }
+@@ -755,6 +873,17 @@ microblaze_regset_from_core_section (str
}
--
++static void
++make_regs (struct gdbarch *arch)
++{
++ struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
++ int mach = gdbarch_bfd_arch_info (arch)->mach;
++
++ if (mach == bfd_mach_microblaze64)
++ {
++ set_gdbarch_ptr_bit (arch, 64);
++ }
++}
+
static struct gdbarch *
microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
- {
-@@ -727,8 +839,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -769,8 +898,15 @@ microblaze_gdbarch_init (struct gdbarch_
if (arches != NULL)
return arches->gdbarch;
if (tdesc == NULL)
@@ -795,7 +789,7 @@
+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64)
+ {
+ tdesc = tdesc_microblaze64;
-+ MICROBLAZE_REGISTER_SIZE = 8;
++ reg_size = 8;
+ }
+ else
+ tdesc = tdesc_microblaze;
@@ -803,7 +797,7 @@
/* Check any target description for validity. */
if (tdesc_has_registers (tdesc))
{
-@@ -736,27 +855,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -778,27 +914,35 @@ microblaze_gdbarch_init (struct gdbarch_
int valid_p;
int i;
@@ -844,7 +838,7 @@
}
if (!valid_p)
-@@ -764,6 +891,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -806,6 +950,7 @@ microblaze_gdbarch_init (struct gdbarch_
tdesc_data_cleanup (tdesc_data);
return NULL;
}
@@ -852,7 +846,7 @@
}
/* Allocate space for the new architecture. */
-@@ -783,7 +911,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -825,7 +970,17 @@ microblaze_gdbarch_init (struct gdbarch_
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM);
@@ -870,7 +864,7 @@
/* Map Dwarf2 registers to GDB registers. */
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
-@@ -803,13 +941,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+@@ -845,13 +1000,15 @@ microblaze_gdbarch_init (struct gdbarch_
microblaze_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
microblaze_breakpoint::bp_from_kind);
@@ -888,7 +882,21 @@
frame_base_set_default (gdbarch, µblaze_frame_base);
-@@ -840,6 +980,8 @@ _initialize_microblaze_tdep (void)
+@@ -866,11 +1023,11 @@ microblaze_gdbarch_init (struct gdbarch_
+ tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+ //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer);
+
+- /* If we have register sets, enable the generic core file support. */
++ /* If we have register sets, enable the generic core file support.
+ if (tdep->gregset) {
+ set_gdbarch_regset_from_core_section (gdbarch,
+ microblaze_regset_from_core_section);
+- }
++ }*/
+
+ return gdbarch;
+ }
+@@ -882,6 +1039,8 @@ _initialize_microblaze_tdep (void)
initialize_tdesc_microblaze_with_stack_protect ();
initialize_tdesc_microblaze ();
@@ -897,10 +905,10 @@
/* Debug this files internals. */
add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
µblaze_debug_flag, _("\
-diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
-index d2112dc07e1..bd03e969b9b 100644
---- a/gdb/microblaze-tdep.h
-+++ b/gdb/microblaze-tdep.h
+Index: gdb-9.2/gdb/microblaze-tdep.h
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.h
++++ gdb-9.2/gdb/microblaze-tdep.h
@@ -27,7 +27,7 @@ struct microblaze_gregset
microblaze_gregset() {}
unsigned int gregs[32];
@@ -922,20 +930,19 @@
};
struct microblaze_frame_cache
-@@ -128,7 +128,8 @@ struct microblaze_frame_cache
+@@ -128,7 +128,7 @@ struct microblaze_frame_cache
struct trad_frame_saved_reg *saved_regs;
};
/* All registers are 32 bits. */
-#define MICROBLAZE_REGISTER_SIZE 4
-+extern int microblaze_reg_size;
-+#define MICROBLAZE_REGISTER_SIZE microblaze_reg_size
++//#define MICROBLAZE_REGISTER_SIZE 8
/* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used.
Only used for native debugging. */
-diff --git a/gdb/regformats/microblaze-with-stack-protect.dat b/gdb/regformats/microblaze-with-stack-protect.dat
-index 8040a7b3fd0..450e321d49e 100644
---- a/gdb/regformats/microblaze-with-stack-protect.dat
-+++ b/gdb/regformats/microblaze-with-stack-protect.dat
+Index: gdb-9.2/gdb/regformats/microblaze-with-stack-protect.dat
+===================================================================
+--- gdb-9.2.orig/gdb/regformats/microblaze-with-stack-protect.dat
++++ gdb-9.2/gdb/regformats/microblaze-with-stack-protect.dat
@@ -60,5 +60,5 @@ expedite:r1,rpc
32:rtlbsx
32:rtlblo
@@ -944,6 +951,3 @@
-32:rshr
+32:slr
+32:shr
---
-2.17.1
-
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0042-porting-GDB-for-linux.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0042-porting-GDB-for-linux.patch
new file mode 100644
index 0000000..947ac9a
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0042-porting-GDB-for-linux.patch
@@ -0,0 +1,151 @@
+From ecccc76dd8ea2e75cc31435b5885173690b3e07a Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Thu, 12 Dec 2019 14:56:17 +0530
+Subject: [PATCH 42/52] porting GDB for linux
+
+---
+ gdb/features/microblaze-linux.xml | 12 ++++++++++
+ gdb/gdbserver/Makefile.in | 2 ++
+ gdb/gdbserver/configure.srv | 3 ++-
+ gdb/microblaze-linux-tdep.c | 39 ++++++++++++++++++++++++-------
+ 4 files changed, 47 insertions(+), 9 deletions(-)
+ create mode 100644 gdb/features/microblaze-linux.xml
+
+Index: gdb-9.2/gdb/features/microblaze-linux.xml
+===================================================================
+--- /dev/null
++++ gdb-9.2/gdb/features/microblaze-linux.xml
+@@ -0,0 +1,12 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2014-2018 Free Software Foundation, Inc.
++
++ Copying and distribution of this file, with or without modification,
++ are permitted in any medium without royalty provided the copyright
++ notice and this notice are preserved. -->
++
++<!DOCTYPE target SYSTEM "gdb-target.dtd">
++<target>
++ <osabi>GNU/Linux</osabi>
++ <xi:include href="microblaze-core.xml"/>
++</target>
+Index: gdb-9.2/gdb/gdbserver/Makefile.in
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/Makefile.in
++++ gdb-9.2/gdb/gdbserver/Makefile.in
+@@ -659,6 +659,8 @@ gdbsupport/%.o: ../gdbsupport/%.c
+
+ %-generated.c: ../regformats/rs6000/%.dat | $(regdat_sh)
+ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@
++microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh)
++ $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c
+
+ #
+ # Dependency tracking.
+Index: gdb-9.2/gdb/gdbserver/configure.srv
+===================================================================
+--- gdb-9.2.orig/gdb/gdbserver/configure.srv
++++ gdb-9.2/gdb/gdbserver/configure.srv
+@@ -184,8 +184,9 @@ case "${target}" in
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+ ;;
+- microblaze*-*-linux*) srv_regobj=microblaze-linux.o
++ microblaze*-*-linux*) srv_regobj="microblaze-linux.o"
+ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o "
++ srv_xmlfiles="microblaze-linux.xml"
+ srv_linux_regsets=yes
+ srv_linux_usrregs=yes
+ srv_linux_thread_db=yes
+Index: gdb-9.2/gdb/microblaze-linux-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-linux-tdep.c
++++ gdb-9.2/gdb/microblaze-linux-tdep.c
+@@ -41,7 +41,7 @@
+
+ #ifndef REGSET_H
+ #define REGSET_H 1
+-
++int MICROBLAZE_REGISTER_SIZE=4;
+ struct gdbarch;
+ struct regcache;
+
+@@ -115,7 +115,7 @@ microblaze_debug (const char *fmt, ...)
+ va_end (args);
+ }
+ }
+-
++#if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+@@ -131,7 +131,7 @@ microblaze_linux_memory_remove_breakpoin
+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
+
+ /* Make sure we see the memory breakpoints. */
+- cleanup = make_show_memory_breakpoints_cleanup (1);
++ cleanup = make_scoped_restore_show_memory_breakpoints (1);
+ val = target_read_memory (addr, old_contents, bplen);
+
+ /* If our breakpoint is no longer at the address, this means that the
+@@ -146,6 +146,7 @@ microblaze_linux_memory_remove_breakpoin
+ do_cleanups (cleanup);
+ return val;
+ }
++#endif
+
+ static void
+ microblaze_linux_sigtramp_cache (struct frame_info *next_frame,
+@@ -248,8 +249,8 @@ microblaze_linux_init_abi (struct gdbarc
+
+ linux_init_abi (info, gdbarch);
+
+- set_gdbarch_memory_remove_breakpoint (gdbarch,
+- microblaze_linux_memory_remove_breakpoint);
++// set_gdbarch_memory_remove_breakpoint (gdbarch,
++// microblaze_linux_memory_remove_breakpoint);
+
+ /* Shared library handling. */
+ set_solib_svr4_fetch_link_map_offsets (gdbarch,
+@@ -261,10 +262,30 @@ microblaze_linux_init_abi (struct gdbarc
+
+ /* BFD target for core files. */
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++ {
++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze");
++ MICROBLAZE_REGISTER_SIZE=8;
++ }
++ else
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze");
++ }
+ else
+- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++ {
++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) {
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel");
++ MICROBLAZE_REGISTER_SIZE=8;
++ }
++ else
++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel");
++ }
+
++ switch (info.bfd_arch_info->mach)
++ {
++ case bfd_mach_microblaze64:
++ set_gdbarch_ptr_bit (gdbarch, 64);
++ break;
++ }
+
+ /* Shared library handling. */
+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
+@@ -278,6 +299,8 @@ microblaze_linux_init_abi (struct gdbarc
+ void
+ _initialize_microblaze_linux_tdep (void)
+ {
+- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX,
++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX,
++ microblaze_linux_init_abi);
++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX,
+ microblaze_linux_init_abi);
+ }
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0043-Binutils-security-check-is-causing-build-error-for-w.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0043-Binutils-security-check-is-causing-build-error-for-w.patch
new file mode 100644
index 0000000..bfe57a8
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0043-Binutils-security-check-is-causing-build-error-for-w.patch
@@ -0,0 +1,32 @@
+From 187f46b3a0d31c5b1eac0ce9ddc7c136b2d53d70 Mon Sep 17 00:00:00 2001
+From: Mahesh Bodapati <mbodapat@xilinx.com>
+Date: Mon, 11 Mar 2019 13:57:42 +0530
+Subject: [PATCH 43/52] Binutils security check is causing build error for
+ windows builds.commenting for now.
+
+---
+ bfd/elf-attrs.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+Index: gdb-9.2/bfd/elf-attrs.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf-attrs.c
++++ gdb-9.2/bfd/elf-attrs.c
+@@ -440,7 +440,8 @@ _bfd_elf_parse_attributes (bfd *abfd, El
+ /* PR 17512: file: 2844a11d. */
+ if (hdr->sh_size == 0)
+ return;
+- if (hdr->sh_size > bfd_get_file_size (abfd))
++#if 0
++if (hdr->sh_size > bfd_get_file_size (abfd))
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%pB: error: attribute section '%pA' too big: %#llx"),
+@@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, El
+ bfd_set_error (bfd_error_invalid_operation);
+ return;
+ }
++#endif
+
+ contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1);
+ if (!contents)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
new file mode 100644
index 0000000..a60ed5e
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0044-Correcting-the-register-names-from-slr-shr-to-rslr-r.patch
@@ -0,0 +1,143 @@
+From 2c3cd36f5198c5b023f3dd157ef3fa90ab5893d7 Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Thu, 19 Dec 2019 12:22:04 +0530
+Subject: [PATCH 44/52] Correcting the register names from slr & shr to rslr &
+ rshr
+
+---
+ gdb/features/microblaze-core.xml | 4 ++--
+ gdb/features/microblaze-stack-protect.xml | 4 ++--
+ gdb/features/microblaze-with-stack-protect.c | 4 ++--
+ gdb/features/microblaze.c | 4 ++--
+ gdb/features/microblaze64-core.xml | 4 ++--
+ gdb/features/microblaze64-stack-protect.xml | 4 ++--
+ gdb/features/microblaze64-with-stack-protect.c | 4 ++--
+ gdb/features/microblaze64.c | 4 ++--
+ gdb/microblaze-tdep.c | 2 +-
+ 9 files changed, 17 insertions(+), 17 deletions(-)
+
+Index: gdb-9.2/gdb/features/microblaze-core.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-core.xml
++++ gdb-9.2/gdb/features/microblaze-core.xml
+@@ -64,6 +64,6 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
+- <reg name="slr" bitsize="32"/>
+- <reg name="shr" bitsize="32"/>
++ <reg name="rslr" bitsize="32"/>
++ <reg name="rshr" bitsize="32"/>
+ </feature>
+Index: gdb-9.2/gdb/features/microblaze-stack-protect.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-stack-protect.xml
++++ gdb-9.2/gdb/features/microblaze-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze.stack-protect">
+- <reg name="slr" bitsize="32"/>
+- <reg name="shr" bitsize="32"/>
++ <reg name="rslr" bitsize="32"/>
++ <reg name="rshr" bitsize="32"/>
+ </feature>
+Index: gdb-9.2/gdb/features/microblaze-with-stack-protect.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze-with-stack-protect.c
++++ gdb-9.2/gdb/features/microblaze-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_p
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.stack-protect");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int");
+
+ tdesc_microblaze_with_stack_protect = result;
+ }
+Index: gdb-9.2/gdb/features/microblaze.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze.c
++++ gdb-9.2/gdb/features/microblaze.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void)
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze = result;
+ }
+Index: gdb-9.2/gdb/features/microblaze64-core.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze64-core.xml
++++ gdb-9.2/gdb/features/microblaze64-core.xml
+@@ -64,6 +64,6 @@
+ <reg name="rtlbsx" bitsize="32"/>
+ <reg name="rtlblo" bitsize="32"/>
+ <reg name="rtlbhi" bitsize="32"/>
+- <reg name="slr" bitsize="64"/>
+- <reg name="shr" bitsize="64"/>
++ <reg name="rslr" bitsize="64"/>
++ <reg name="rshr" bitsize="64"/>
+ </feature>
+Index: gdb-9.2/gdb/features/microblaze64-stack-protect.xml
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze64-stack-protect.xml
++++ gdb-9.2/gdb/features/microblaze64-stack-protect.xml
+@@ -7,6 +7,6 @@
+
+ <!DOCTYPE feature SYSTEM "gdb-target.dtd">
+ <feature name="org.gnu.gdb.microblaze64.stack-protect">
+- <reg name="slr" bitsize="64"/>
+- <reg name="shr" bitsize="64"/>
++ <reg name="rslr" bitsize="64"/>
++ <reg name="rshr" bitsize="64"/>
+ </feature>
+Index: gdb-9.2/gdb/features/microblaze64-with-stack-protect.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze64-with-stack-protect.c
++++ gdb-9.2/gdb/features/microblaze64-with-stack-protect.c
+@@ -72,8 +72,8 @@ initialize_tdesc_microblaze64_with_stack
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze64.stack-protect");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64_with_stack_protect = result;
+ }
+Index: gdb-9.2/gdb/features/microblaze64.c
+===================================================================
+--- gdb-9.2.orig/gdb/features/microblaze64.c
++++ gdb-9.2/gdb/features/microblaze64.c
+@@ -70,8 +70,8 @@ initialize_tdesc_microblaze64 (void)
+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int");
+- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64");
+- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rslr", 57, 1, NULL, 64, "uint64");
++ tdesc_create_reg (feature, "rshr", 58, 1, NULL, 64, "uint64");
+
+ tdesc_microblaze64 = result;
+ }
+Index: gdb-9.2/gdb/microblaze-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.c
++++ gdb-9.2/gdb/microblaze-tdep.c
+@@ -77,7 +77,7 @@ static const char *microblaze_register_n
+ "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
+ "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
+ "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
+- "slr", "shr"
++ "rslr", "rshr"
+ };
+
+ #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
new file mode 100644
index 0000000..eac20e3
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0045-Removing-the-header-gdb_assert.h-from-MB-target-file.patch
@@ -0,0 +1,21 @@
+From 38e5305c8e008ded46a9f351cd7f79c8f81df8fd Mon Sep 17 00:00:00 2001
+From: Nagaraju <nmekala@xilinx.com>
+Date: Fri, 17 Jan 2020 15:45:48 +0530
+Subject: [PATCH 45/52] Removing the header "gdb_assert.h" from MB target file
+
+---
+ gdb/microblaze-linux-tdep.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+Index: gdb-9.2/gdb/microblaze-linux-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-linux-tdep.c
++++ gdb-9.2/gdb/microblaze-linux-tdep.c
+@@ -37,7 +37,6 @@
+ #include "linux-tdep.h"
+ #include "glibc-tdep.h"
+
+-#include "gdb_assert.h"
+
+ #ifndef REGSET_H
+ #define REGSET_H 1
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
new file mode 100644
index 0000000..de93c81
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0046-bfd-cpu-microblaze.c-Enhance-disassembler.patch
@@ -0,0 +1,36 @@
+From eba7561a36a20c814ca69dc42fa8b0b7f4a33510 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 10:08:53 -0800
+Subject: [PATCH 46/52] bfd/cpu-microblaze.c: Enhance disassembler
+
+See commit aebcfb76fc165795e67917cb67cf985c4dfdc577 for why this is needed.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/cpu-microblaze.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+Index: gdb-9.2/bfd/cpu-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/cpu-microblaze.c
++++ gdb-9.2/bfd/cpu-microblaze.c
+@@ -39,7 +39,8 @@ const bfd_arch_info_type bfd_microblaze_
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
+- &bfd_microblaze_arch[1] /* Next in list. */
++ &bfd_microblaze_arch[1], /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+ },
+ {
+ 32, /* Bits in a word. */
+@@ -71,7 +72,8 @@ const bfd_arch_info_type bfd_microblaze_
+ bfd_default_compatible, /* Architecture comparison function. */
+ bfd_default_scan, /* String to architecture conversion. */
+ bfd_arch_default_fill, /* Default fill. */
+- &bfd_microblaze_arch[1] /* Next in list. */
++ &bfd_microblaze_arch[1], /* Next in list. */
++ 0 /* Maximum offset of a reloc from the start of an insn. */
+ },
+ {
+ 64, /* 32 bits in a word. */
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
new file mode 100644
index 0000000..ad63a72
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0047-bfd-elf64-microblaze.c-Fix-build-failures.patch
@@ -0,0 +1,84 @@
+From c848ddceb98359db1efb3ed0d1e7b5a90053dddf Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:02:11 -0800
+Subject: [PATCH 47/52] bfd/elf64-microblaze.c: Fix build failures
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1572,7 +1572,7 @@ microblaze_elf_relocate_section (bfd *ou
+ {
+ BFD_FAIL ();
+ (*_bfd_error_handler)
+- (_("%B: probably compiled without -fPIC?"),
++ (_("%pB: probably compiled without -fPIC?"),
+ input_bfd);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+@@ -2691,7 +2691,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+ /* If this is a global symbol, we count the number of
+ relocations we need for this symbol. */
+ if (h != NULL)
+- head = &h->dyn_relocs;
++ head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs;
+ else
+ {
+ /* Track dynamic relocs needed for local syms too.
+@@ -2911,7 +2911,7 @@ microblaze_elf_adjust_dynamic_symbol (st
+
+ /* If we didn't find any dynamic relocs in read-only sections, then
+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */
+- if (!_bfd_elf_readonly_dynrelocs (h))
++ if (p == NULL)
+ {
+ h->non_got_ref = 0;
+ return TRUE;
+@@ -3096,7 +3096,7 @@ allocate_dynrelocs (struct elf_link_hash
+ else
+ h->got.offset = (bfd_vma) -1;
+
+- if (h->dyn_relocs == NULL)
++ if (eh->dyn_relocs == NULL)
+ return TRUE;
+
+ /* In the shared -Bsymbolic case, discard space allocated for
+@@ -3113,7 +3113,7 @@ allocate_dynrelocs (struct elf_link_hash
+ {
+ struct elf64_mb_dyn_relocs **pp;
+
+- for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
++ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
+ {
+ p->count -= p->pc_count;
+ p->pc_count = 0;
+@@ -3124,7 +3124,7 @@ allocate_dynrelocs (struct elf_link_hash
+ }
+ }
+ else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
+- h->dyn_relocs = NULL;
++ eh->dyn_relocs = NULL;
+ }
+ else
+ {
+@@ -3154,13 +3154,13 @@ allocate_dynrelocs (struct elf_link_hash
+ goto keep;
+ }
+
+- h->dyn_relocs = NULL;
++ eh->dyn_relocs = NULL;
+
+ keep: ;
+ }
+
+ /* Finally, allocate space. */
+- for (p = h->dyn_relocs; p != NULL; p = p->next)
++ for (p = eh->dyn_relocs; p != NULL; p = p->next)
+ {
+ asection *sreloc = elf_section_data (p->sec)->sreloc;
+ sreloc->size += p->count * sizeof (Elf64_External_Rela);
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
new file mode 100644
index 0000000..bee50ed
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0048-bfd-elf-microblaze.c-Remove-obsolete-entries.patch
@@ -0,0 +1,72 @@
+From 359ee1650d98372a2f2cd360a7ea9877077f6ece Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 11:23:26 -0800
+Subject: [PATCH 48/52] bfd/elf*-microblaze.c: Remove obsolete entries
+
+Replace microblaze_elf_merge_private_bfd_data with a direct call to
+_bfd_generic_verify_endian_match, this simplifies the implementation.
+
+Remove microblaze_elf_gc_sweep_hook, removed in 2017.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 29 +----------------------------
+ 1 file changed, 1 insertion(+), 28 deletions(-)
+
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1690,21 +1690,6 @@ microblaze_elf_relocate_section (bfd *ou
+ return ret;
+ }
+
+-/* Merge backend specific data from an object file to the output
+- object file when linking.
+-
+- Note: We only use this hook to catch endian mismatches. */
+-static bfd_boolean
+-microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
+-{
+- /* Check if we have the same endianess. */
+- if (! _bfd_generic_verify_endian_match (ibfd, obfd))
+- return FALSE;
+-
+- return TRUE;
+-}
+-
+-
+ /* Calculate fixup value for reference. */
+
+ static int
+@@ -2427,17 +2412,6 @@ microblaze_elf_gc_mark_hook (asection *s
+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
+ }
+
+-/* Update the got entry reference counts for the section being removed. */
+-
+-static bfd_boolean
+-microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED,
+- struct bfd_link_info * info ATTRIBUTE_UNUSED,
+- asection * sec ATTRIBUTE_UNUSED,
+- const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
+-{
+- return TRUE;
+-}
+-
+ /* PIC support. */
+
+ #define PLT_ENTRY_SIZE 16
+@@ -3704,11 +3678,10 @@ microblaze_elf_add_symbol_hook (bfd *abf
+ #define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name
+ #define elf_backend_relocate_section microblaze_elf_relocate_section
+ #define bfd_elf64_bfd_relax_section microblaze_elf_relax_section
+-#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data
++#define bfd_elf64_bfd_merge_private_bfd_data _bfd_generic_verify_endian_match
+ #define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup
+
+ #define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook
+-#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook
+ #define elf_backend_check_relocs microblaze_elf_check_relocs
+ #define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol
+ #define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
new file mode 100644
index 0000000..9b95e10
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0049-bfd-elf64-microblaze.c-Resolve-various-compiler-warn.patch
@@ -0,0 +1,42 @@
+From bee1ab76011aca029f89f98b9388aeb0390ee90f Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:02:25 -0800
+Subject: [PATCH 49/52] bfd/elf64-microblaze.c: Resolve various compiler
+ warnings
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ bfd/elf64-microblaze.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+Index: gdb-9.2/bfd/elf64-microblaze.c
+===================================================================
+--- gdb-9.2.orig/bfd/elf64-microblaze.c
++++ gdb-9.2/bfd/elf64-microblaze.c
+@@ -1258,6 +1258,7 @@ microblaze_elf_relocate_section (bfd *ou
+ goto dogot;
+ case (int) R_MICROBLAZE_TLSLD:
+ tls_type = (TLS_TLS | TLS_LD);
++ /* Fall through. */
+ dogot:
+ case (int) R_MICROBLAZE_GOT_64:
+ {
+@@ -2569,6 +2570,7 @@ microblaze_elf_check_relocs (bfd * abfd,
+ tls_type |= (TLS_TLS | TLS_LD);
+ dogottls:
+ sec->has_tls_reloc = 1;
++ /* Fall through. */
+ case R_MICROBLAZE_GOT_64:
+ if (htab->sgot == NULL)
+ {
+@@ -2802,10 +2804,8 @@ microblaze_elf_adjust_dynamic_symbol (st
+ struct elf64_mb_link_hash_table *htab;
+ struct elf64_mb_link_hash_entry * eh;
+ struct elf64_mb_dyn_relocs *p;
+- asection *sdynbss;
+ asection *s, *srel;
+ unsigned int power_of_two;
+- bfd *dynobj;
+
+ htab = elf64_mb_hash_table (info);
+ if (htab == NULL)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
new file mode 100644
index 0000000..ba8394c
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0050-opcodes-microblaze-dis.c-Fix-compile-warnings.patch
@@ -0,0 +1,34 @@
+From a0d3bb3d528dfb75e54a0b0c6ff0d6095ba1c2c7 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 12:30:09 -0800
+Subject: [PATCH 50/52] opcodes/microblaze-dis.c: Fix compile warnings
+
+Two compiler warnings were evident, it appears both are likely real bugs.
+
+Missing type declaration for a function, and a case statement without a break.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ opcodes/microblaze-dis.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+Index: gdb-9.2/opcodes/microblaze-dis.c
+===================================================================
+--- gdb-9.2.orig/opcodes/microblaze-dis.c
++++ gdb-9.2/opcodes/microblaze-dis.c
+@@ -130,6 +130,7 @@ get_field_imm15 (struct string_buf *buf,
+ return p;
+ }
+
++static char *
+ get_field_imm16 (struct string_buf *buf, long instr)
+ {
+ char *p = strbuf (buf);
+@@ -327,6 +328,7 @@ print_insn_microblaze (bfd_vma memaddr,
+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1 (&buf, inst), get_field_imm (&buf, inst));
+ /* TODO: Also print symbol */
++ break;
+ case INST_TYPE_RD_R1_IMMS:
+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst),
+ get_field_r1(&buf, inst), get_field_imms (&buf, inst));
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
new file mode 100644
index 0000000..f329015
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0051-gdb-microblaze-tdep.c-Remove-unused-functions.patch
@@ -0,0 +1,96 @@
+From 202c9a6e8c4e3bfe8f84d1066c8993a77e4ad4a8 Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@xilinx.com>
+Date: Thu, 3 Dec 2020 14:51:37 -0800
+Subject: [PATCH 51/52] gdb/microblaze-tdep.c: Remove unused functions
+
+Compiler warns the removed functions are not referenced anywhere.
+
+Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
+---
+ gdb/microblaze-tdep.c | 45 -------------------------------------------
+ 1 file changed, 45 deletions(-)
+
+Index: gdb-9.2/gdb/microblaze-tdep.c
+===================================================================
+--- gdb-9.2.orig/gdb/microblaze-tdep.c
++++ gdb-9.2/gdb/microblaze-tdep.c
+@@ -140,14 +140,6 @@ microblaze_fetch_instruction (CORE_ADDR
+ constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
+
+ typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
+-static CORE_ADDR
+-microblaze_store_arguments (struct regcache *regcache, int nargs,
+- struct value **args, CORE_ADDR sp,
+- int struct_return, CORE_ADDR struct_addr)
+-{
+- error (_("store_arguments not implemented"));
+- return sp;
+-}
+ #if 0
+ static int
+ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
+@@ -555,12 +547,6 @@ microblaze_frame_base_address (struct fr
+ return cache->base;
+ }
+
+-static const struct frame_unwind *
+-microblaze_frame_sniffer (struct frame_info *next_frame)
+-{
+- return µblaze_frame_unwind;
+-}
+-
+ static const struct frame_base microblaze_frame_base =
+ {
+ µblaze_frame_unwind,
+@@ -759,12 +745,6 @@ microblaze_software_single_step (struct
+ }
+ #endif
+
+-static void
+-microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
+-{
+- regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
+-}
+-
+ static int dwarf2_to_reg_map[78] =
+ { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
+ 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
+@@ -796,19 +776,6 @@ microblaze_dwarf2_reg_to_regnum (struct
+ return -1;
+ }
+
+-static void
+-microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
+-{
+-
+- register_remote_g_packet_guess (gdbarch,
+- 4 * MICROBLAZE_NUM_REGS,
+- tdesc_microblaze64);
+-
+- register_remote_g_packet_guess (gdbarch,
+- 4 * MICROBLAZE_NUM_REGS,
+- tdesc_microblaze64_with_stack_protect);
+-}
+-
+ void
+ microblaze_supply_gregset (const struct microblaze_gregset *gregset,
+ struct regcache *regcache,
+@@ -873,18 +840,6 @@ microblaze_regset_from_core_section (str
+ }
+
+
+-static void
+-make_regs (struct gdbarch *arch)
+-{
+- struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
+- int mach = gdbarch_bfd_arch_info (arch)->mach;
+-
+- if (mach == bfd_mach_microblaze64)
+- {
+- set_gdbarch_ptr_bit (arch, 64);
+- }
+-}
+-
+ static struct gdbarch *
+ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+ {
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0052-sim-Allow-microblaze-architecture.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0052-sim-Allow-microblaze-architecture.patch
new file mode 100644
index 0000000..88095de
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0052-sim-Allow-microblaze-architecture.patch
@@ -0,0 +1,37 @@
+From acee53a9c9b6cbe826dacb9f02102ae4d58e36ba Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Thu, 6 Aug 2020 15:37:52 -0500
+Subject: [PATCH 52/52] sim: Allow microblaze* architecture
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ sim/configure | 2 +-
+ sim/configure.tgt | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: gdb-9.2/sim/configure
+===================================================================
+--- gdb-9.2.orig/sim/configure
++++ gdb-9.2/sim/configure
+@@ -3795,7 +3795,7 @@ subdirs="$subdirs aarch64"
+
+
+ ;;
+- microblaze-*-*)
++ microblaze*-*-*)
+
+ sim_arch=microblaze
+ subdirs="$subdirs microblaze"
+Index: gdb-9.2/sim/configure.tgt
+===================================================================
+--- gdb-9.2.orig/sim/configure.tgt
++++ gdb-9.2/sim/configure.tgt
+@@ -59,7 +59,7 @@ case "${target}" in
+ mcore-*-*)
+ SIM_ARCH(mcore)
+ ;;
+- microblaze-*-*)
++ microblaze*-*-*)
+ SIM_ARCH(microblaze)
+ ;;
+ mips*-*-*)
diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0053-gdb-Fix-microblaze-target-compilation.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0053-gdb-Fix-microblaze-target-compilation.patch
new file mode 100644
index 0000000..01e48a0
--- /dev/null
+++ b/meta-xilinx/meta-microblaze/recipes-devtools/gdb/gdb/0053-gdb-Fix-microblaze-target-compilation.patch
@@ -0,0 +1,288 @@
+From e770e163e918c6065fc437687839bfbbd0137cff Mon Sep 17 00:00:00 2001
+From: Mark Hatle <mark.hatle@kernel.crashing.org>
+Date: Mon, 7 Dec 2020 12:03:25 -0600
+Subject: [PATCH] gdb: Fix microblaze target compilation
+
+Add microblaze-linux-nat.c to configure.nat
+
+Transition microblaze-linux-nat.c to use the new gdb C++ style functions.
+
+Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org>
+---
+ gdb/configure.nat | 5 ++
+ gdb/microblaze-linux-nat.c | 96 ++++++++++++++------------------------
+ gdb/microblaze-tdep.h | 3 ++
+ 3 files changed, 43 insertions(+), 61 deletions(-)
+
+diff --git a/gdb/configure.nat b/gdb/configure.nat
+index fb4522f579..2b6873f9d6 100644
+--- a/gdb/configure.nat
++++ b/gdb/configure.nat
+@@ -261,6 +261,11 @@ case ${gdb_host} in
+ # Host: Motorola m68k running GNU/Linux.
+ NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o"
+ ;;
++ microblaze)
++ # Host: Microblaze running GNU/Linux.
++ NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o"
++ NAT_CDEPS=
++ ;;
+ mips)
+ # Host: Linux/MIPS
+ NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
+diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c
+index e9b8c9c522..bac4697e1e 100644
+--- a/gdb/microblaze-linux-nat.c
++++ b/gdb/microblaze-linux-nat.c
+@@ -36,13 +36,14 @@
+ #include "dwarf2-frame.h"
+ #include "osabi.h"
+
+-#include "gdb_assert.h"
+-#include "gdb_string.h"
++#include "gdbsupport/gdb_assert.h"
++#include <string.h>
+ #include "target-descriptions.h"
+ #include "opcodes/microblaze-opcm.h"
+ #include "opcodes/microblaze-dis.h"
+
+ #include "linux-nat.h"
++#include "linux-tdep.h"
+ #include "target-descriptions.h"
+
+ #include <sys/user.h>
+@@ -61,22 +62,17 @@
+ /* Defines ps_err_e, struct ps_prochandle. */
+ #include "gdb_proc_service.h"
+
+-/* On GNU/Linux, threads are implemented as pseudo-processes, in which
+- case we may be tracing more than one process at a time. In that
+- case, inferior_ptid will contain the main process ID and the
+- individual thread (process) ID. get_thread_id () is used to get
+- the thread id if it's available, and the process id otherwise. */
+-
+-int
+-get_thread_id (ptid_t ptid)
++class microblaze_linux_nat_target final : public linux_nat_target
+ {
+- int tid = TIDGET (ptid);
+- if (0 == tid)
+- tid = PIDGET (ptid);
+- return tid;
+-}
++public:
++ /* Add our register access methods. */
++ void fetch_registers (struct regcache *, int) override;
++ void store_registers (struct regcache *, int) override;
++
++ const struct target_desc *read_description () override;
++};
+
+-#define GET_THREAD_ID(PTID) get_thread_id (PTID)
++static microblaze_linux_nat_target the_microblaze_linux_nat_target;
+
+ /* Non-zero if our kernel may support the PTRACE_GETREGS and
+ PTRACE_SETREGS requests, for reading and writing the
+@@ -88,7 +84,6 @@ static int
+ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
+ {
+ int u_addr = -1;
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace
+ interface, and not the wordsize of the program's ABI. */
+ int wordsize = sizeof (long);
+@@ -105,18 +100,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno)
+ static void
+ fetch_register (struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++ struct gdbarch *gdbarch = regcache->arch ();
+ /* This isn't really an address. But ptrace thinks of it as one. */
+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
+ int bytes_transferred;
+- unsigned int offset; /* Offset of registers within the u area. */
+- char buf[MAX_REGISTER_SIZE];
++ char buf[MICROBLAZE_MAX_REGISTER_SIZE];
+
+ if (regaddr == -1)
+ {
+ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */
+- regcache_raw_supply (regcache, regno, buf);
++ regcache->raw_supply (regno, buf);
+ return;
+ }
+
+@@ -149,14 +142,14 @@ fetch_register (struct regcache *regcache, int tid, int regno)
+ {
+ /* Little-endian values are always found at the left end of the
+ bytes transferred. */
+- regcache_raw_supply (regcache, regno, buf);
++ regcache->raw_supply (regno, buf);
+ }
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ {
+ /* Big-endian values are found at the right end of the bytes
+ transferred. */
+ size_t padding = (bytes_transferred - register_size (gdbarch, regno));
+- regcache_raw_supply (regcache, regno, buf + padding);
++ regcache->raw_supply (regno, buf + padding);
+ }
+ else
+ internal_error (__FILE__, __LINE__,
+@@ -175,8 +168,6 @@ fetch_register (struct regcache *regcache, int tid, int regno)
+ static int
+ fetch_all_gp_regs (struct regcache *regcache, int tid)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_gregset_t gregset;
+
+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
+@@ -204,8 +195,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid)
+ static void
+ fetch_gp_regs (struct regcache *regcache, int tid)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ if (have_ptrace_getsetregs)
+@@ -223,13 +212,12 @@ fetch_gp_regs (struct regcache *regcache, int tid)
+ static void
+ store_register (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
++ struct gdbarch *gdbarch = regcache->arch ();
+ /* This isn't really an address. But ptrace thinks of it as one. */
+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno);
+ int i;
+ size_t bytes_to_transfer;
+- char buf[MAX_REGISTER_SIZE];
++ char buf[MICROBLAZE_MAX_REGISTER_SIZE];
+
+ if (regaddr == -1)
+ return;
+@@ -242,13 +230,13 @@ store_register (const struct regcache *regcache, int tid, int regno)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
+ {
+ /* Little-endian values always sit at the left end of the buffer. */
+- regcache_raw_collect (regcache, regno, buf);
++ regcache->raw_collect (regno, buf);
+ }
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ {
+ /* Big-endian values sit at the right end of the buffer. */
+ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno));
+- regcache_raw_collect (regcache, regno, buf + padding);
++ regcache->raw_collect (regno, buf + padding);
+ }
+
+ for (i = 0; i < bytes_to_transfer; i += sizeof (long))
+@@ -281,8 +269,6 @@ store_register (const struct regcache *regcache, int tid, int regno)
+ static int
+ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ gdb_gregset_t gregset;
+
+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0)
+@@ -319,8 +305,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno)
+ static void
+ store_gp_regs (const struct regcache *regcache, int tid, int regno)
+ {
+- struct gdbarch *gdbarch = get_regcache_arch (regcache);
+- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ if (have_ptrace_getsetregs)
+@@ -339,12 +323,12 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno)
+ regno == -1, otherwise fetch all general registers or all floating
+ point registers depending upon the value of regno. */
+
+-static void
+-microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
+- struct regcache *regcache, int regno)
++void
++microblaze_linux_nat_target::fetch_registers (struct regcache * regcache,
++ int regno)
+ {
+ /* Get the thread id for the ptrace call. */
+- int tid = GET_THREAD_ID (inferior_ptid);
++ int tid = regcache->ptid ().lwp ();
+
+ if (regno == -1)
+ fetch_gp_regs (regcache, tid);
+@@ -356,12 +340,12 @@ microblaze_linux_fetch_inferior_registers (struct target_ops *ops,
+ regno == -1, otherwise store all general registers or all floating
+ point registers depending upon the value of regno. */
+
+-static void
+-microblaze_linux_store_inferior_registers (struct target_ops *ops,
+- struct regcache *regcache, int regno)
++void
++microblaze_linux_nat_target::store_registers (struct regcache *regcache,
++ int regno)
+ {
+ /* Get the thread id for the ptrace call. */
+- int tid = GET_THREAD_ID (inferior_ptid);
++ int tid = regcache->ptid ().lwp ();
+
+ if (regno >= 0)
+ store_register (regcache, tid, regno);
+@@ -398,12 +382,12 @@ supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
+ /* FIXME. */
+ }
+
+-static const struct target_desc *
+-microblaze_linux_read_description (struct target_ops *ops)
++const struct target_desc *
++microblaze_linux_nat_target::read_description ()
+ {
+- CORE_ADDR microblaze_hwcap = 0;
++ CORE_ADDR microblaze_hwcap = linux_get_hwcap (this);
+
+- if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1)
++ if (microblaze_hwcap != 1)
+ return NULL;
+
+ return NULL;
+@@ -415,17 +399,7 @@ void _initialize_microblaze_linux_nat (void);
+ void
+ _initialize_microblaze_linux_nat (void)
+ {
+- struct target_ops *t;
+-
+- /* Fill in the generic GNU/Linux methods. */
+- t = linux_target ();
+-
+- /* Add our register access methods. */
+- t->to_fetch_registers = microblaze_linux_fetch_inferior_registers;
+- t->to_store_registers = microblaze_linux_store_inferior_registers;
+-
+- t->to_read_description = microblaze_linux_read_description;
+-
+ /* Register the target. */
+- linux_nat_add_target (t);
++ linux_target = &the_microblaze_linux_nat_target;
++ add_inf_child_target (&the_microblaze_linux_nat_target);
+ }
+diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h
+index c0fc900733..c777d93a95 100644
+--- a/gdb/microblaze-tdep.h
++++ b/gdb/microblaze-tdep.h
+@@ -106,6 +106,9 @@ enum microblaze_regnum
+ MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS
+ };
+
++/* Big enough to hold the size of the largest register in bytes. */
++#define MICROBLAZE_MAX_REGISTER_SIZE 64
++
+ struct microblaze_frame_cache
+ {
+ /* Base address. */
+--
+2.17.1
+