diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json
new file mode 100644
index 0000000..e46faca
--- /dev/null
+++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json
@@ -0,0 +1,93 @@
+{
+    "gpio_configs": [
+        {
+            "Name" : "IdButton",
+            "LineName" : "",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "NMIButton",
+            "LineName" : "NMI_BTN_N",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "NMIOut",
+            "LineName" : "BMC_NMI",
+            "Type" : "GPIO",
+            "Polarity": "ActiveHigh"
+        },
+        {
+            "Name" : "PostComplete",
+            "LineName" : "FM_BIOS_POST_CMPLT_N",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "PowerButton",
+            "LineName" : "BMC_PSIN",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "PowerOk",
+            /*
+             * The e3c246d4i doesn't have a PS_PWROK signal as far as
+             * I can tell.  It does have an O_PWROK line that's driven
+             * by the SuperIO chip, which may "actually" be
+             * SioPowerGood, but it seems to work for this, so...?
+             */
+            "LineName" : "O_PWROK",
+            "Type" : "GPIO",
+            "Polarity": "ActiveHigh"
+        },
+        {
+            "Name" : "PowerOut",
+            "LineName" : "BMC_PSOUT",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "ResetButton",
+            "LineName" : "BMC_RESETCON",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "ResetOut",
+            "LineName" : "RESETCON",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "SioOnControl",
+            "LineName" : "",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        },
+        {
+            "Name" : "SioPowerGood",
+            "LineName" : "",
+            "Type" : "GPIO",
+            "Polarity": "ActiveHigh"
+        },
+        {
+            "Name" : "SIOS5",
+            "LineName" : "SLP_S5",
+            "Type" : "GPIO",
+            "Polarity": "ActiveLow"
+        }
+    ],
+    "timing_configs": {
+        "PowerPulseMs": 200,
+        "ForceOffPulseMs": 15000,
+        "ResetPulseMs": 500,
+        "PowerCycleMs": 5000,
+        "SioPowerGoodWatchdogMs": 1000,
+        "PsPowerOKWatchdogMs": 8000,
+        "GracefulPowerOffS": 300,
+        "WarmResetCheckMs": 500,
+        "PowerOffSaveMs": 7000
+    }
+}
diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend
new file mode 100644
index 0000000..f54fe06
--- /dev/null
+++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend
@@ -0,0 +1,10 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+
+SRC_URI += " \
+	file://power-config-host0.json \
+	"
+
+do_install:append() {
+	install -d  ${D}/${datadir}/${PN}
+	install -m 0644 ${WORKDIR}/power-config-host0.json ${D}/${datadir}/${PN}
+}