diff --git a/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-device-tree-for-Ampere-s-Mt.-Jade.patch b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-device-tree-for-Ampere-s-Mt.-Jade.patch
new file mode 100644
index 0000000..b517fd1
--- /dev/null
+++ b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-device-tree-for-Ampere-s-Mt.-Jade.patch
@@ -0,0 +1,599 @@
+From 5c45537b1d74c22cd95c196bf261b3ee3aa4856f Mon Sep 17 00:00:00 2001
+From: Quan Nguyen <quan@os.amperecomputing.com>
+Date: Thu, 12 Nov 2020 13:42:43 +0700
+Subject: [PATCH 2/2] ARM: dts: aspeed: Add device tree for Ampere's Mt. Jade
+ BMC
+
+The Mt. Jade BMC is an ASPEED AST2500-based BMC for the Mt. Jade
+hardware reference platform with Ampere's Altra Processor Family.
+
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Reviewed-by: Joel Stanley <joel@jms.id.au>
+Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
+Signed-off-by: Phong Vo <phong@os.amperecomputing.com>
+Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
+---
+ arch/arm/boot/dts/Makefile                    |   1 +
+ .../arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 558 ++++++++++++++++++
+ 2 files changed, 559 insertions(+)
+ create mode 100644 arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 9f9f3e49132a..5da5e8f93554 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1398,6 +1398,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
+ 	aspeed-ast2500-evb.dtb \
+ 	aspeed-ast2600-evb.dtb \
+ 	aspeed-bmc-amd-ethanolx.dtb \
++	aspeed-bmc-ampere-mtjade.dtb \
+ 	aspeed-bmc-arm-centriq2400-rep.dtb \
+ 	aspeed-bmc-arm-stardragon4800-rep2.dtb \
+ 	aspeed-bmc-bytedance-g220a.dtb \
+diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+new file mode 100644
+index 000000000000..8f5ec22e51c2
+--- /dev/null
++++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+@@ -0,0 +1,558 @@
++// SPDX-License-Identifier: GPL-2.0+
++/dts-v1/;
++#include "aspeed-g5.dtsi"
++#include <dt-bindings/gpio/aspeed-gpio.h>
++
++/ {
++	model = "Ampere Mt. Jade BMC";
++	compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
++
++	chosen {
++		stdout-path = &uart5;
++		bootargs = "console=ttyS4,115200 earlyprintk";
++	};
++
++	memory@80000000 {
++		reg = <0x80000000 0x20000000>;
++	};
++
++	reserved-memory {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		ranges;
++
++		vga_memory: framebuffer@9f000000 {
++			no-map;
++			reg = <0x9f000000 0x01000000>; /* 16M */
++		};
++
++		gfx_memory: framebuffer {
++			size = <0x01000000>;
++			alignment = <0x01000000>;
++			compatible = "shared-dma-pool";
++			reusable;
++		};
++
++		video_engine_memory: jpegbuffer {
++			size = <0x02000000>;	/* 32M */
++			alignment = <0x01000000>;
++			compatible = "shared-dma-pool";
++			reusable;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++
++		fault {
++			gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
++		};
++
++		identify {
++			gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
++		};
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++
++		shutdown_ack {
++			label = "SHUTDOWN_ACK";
++			gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(G, 2)>;
++		};
++
++		reboot_ack {
++			label = "REBOOT_ACK";
++			gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(J, 3)>;
++		};
++
++		S0_overtemp {
++			label = "S0_OVERTEMP";
++			gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(G, 3)>;
++		};
++
++		S0_hightemp {
++			label = "S0_HIGHTEMP";
++			gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(J, 0)>;
++		};
++
++		S0_cpu_fault {
++			label = "S0_CPU_FAULT";
++			gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
++			linux,code = <ASPEED_GPIO(J, 1)>;
++		};
++
++		S1_overtemp {
++			label = "S1_OVERTEMP";
++			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(Z, 6)>;
++		};
++
++		S1_hightemp {
++			label = "S1_HIGHTEMP";
++			gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(AB, 0)>;
++		};
++
++		S1_cpu_fault {
++			label = "S1_CPU_FAULT";
++			gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
++			linux,code = <ASPEED_GPIO(Z, 1)>;
++		};
++
++		id_button {
++			label = "ID_BUTTON";
++			gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
++			linux,code = <ASPEED_GPIO(Q, 5)>;
++		};
++
++	};
++
++	gpioA0mux: mux-controller {
++		compatible = "gpio-mux";
++		#mux-control-cells = <0>;
++		mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
++	};
++
++	adc0mux: adc0mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 0>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc1mux: adc1mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 1>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc2mux: adc2mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 2>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc3mux: adc3mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 3>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc4mux: adc4mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 4>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc5mux: adc5mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 5>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc6mux: adc6mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 6>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc7mux: adc7mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 7>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc8mux: adc8mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 8>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc9mux: adc9mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 9>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc10mux: adc10mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 10>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc11mux: adc11mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 11>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc12mux: adc12mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 12>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	adc13mux: adc13mux {
++		compatible = "io-channel-mux";
++		io-channels = <&adc 13>;
++		#io-channel-cells = <1>;
++		io-channel-names = "parent";
++		mux-controls = <&gpioA0mux>;
++		channels = "s0", "s1";
++	};
++
++	iio-hwmon {
++		compatible = "iio-hwmon";
++		io-channels = <&adc0mux 0>, <&adc0mux 1>,
++			<&adc1mux 0>, <&adc1mux 1>,
++			<&adc2mux 0>, <&adc2mux 1>,
++			<&adc3mux 0>, <&adc3mux 1>,
++			<&adc4mux 0>, <&adc4mux 1>,
++			<&adc5mux 0>, <&adc5mux 1>,
++			<&adc6mux 0>, <&adc6mux 1>,
++			<&adc7mux 0>, <&adc7mux 1>,
++			<&adc8mux 0>, <&adc8mux 1>,
++			<&adc9mux 0>, <&adc9mux 1>,
++			<&adc10mux 0>, <&adc10mux 1>,
++			<&adc11mux 0>, <&adc11mux 1>,
++			<&adc12mux 0>, <&adc12mux 1>,
++			<&adc13mux 0>, <&adc13mux 1>;
++	};
++
++	iio-hwmon-adc14 {
++		compatible = "iio-hwmon";
++		io-channels = <&adc 14>;
++	};
++
++	iio-hwmon-battery {
++		compatible = "iio-hwmon";
++		io-channels = <&adc 15>;
++	};
++};
++
++&fmc {
++	status = "okay";
++	flash@0 {
++		status = "okay";
++		m25p,fast-read;
++		label = "bmc";
++		/* spi-max-frequency = <50000000>; */
++#include "openbmc-flash-layout.dtsi"
++	};
++};
++
++&spi1 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_spi1_default>;
++
++	flash@0 {
++		status = "okay";
++		m25p,fast-read;
++		label = "pnor";
++		/* spi-max-frequency = <100000000>; */
++	};
++};
++
++&uart1 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_txd1_default
++			 &pinctrl_rxd1_default
++			 &pinctrl_ncts1_default
++			 &pinctrl_nrts1_default>;
++};
++
++&uart2 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_txd2_default
++			 &pinctrl_rxd2_default>;
++};
++
++&uart3 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_txd3_default
++			 &pinctrl_rxd3_default>;
++};
++
++&uart4 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_txd4_default
++			 &pinctrl_rxd4_default>;
++};
++
++/* The BMC's uart */
++&uart5 {
++	status = "okay";
++};
++
++&mac1 {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
++};
++
++&i2c0 {
++	status = "okay";
++};
++
++&i2c1 {
++	status = "okay";
++};
++
++&i2c2 {
++	status = "okay";
++};
++
++&i2c3 {
++	status = "okay";
++	eeprom@50 {
++		compatible = "microchip,24c64", "atmel,24c64";
++		reg = <0x50>;
++		pagesize = <32>;
++	};
++
++	inlet_mem2: tmp175@28 {
++		compatible = "ti,tmp175";
++		reg = <0x28>;
++	};
++
++	inlet_cpu: tmp175@29 {
++		compatible = "ti,tmp175";
++		reg = <0x29>;
++	};
++
++	inlet_mem1: tmp175@2a {
++		compatible = "ti,tmp175";
++		reg = <0x2a>;
++	};
++
++	outlet_cpu: tmp175@2b {
++		compatible = "ti,tmp175";
++		reg = <0x2b>;
++	};
++
++	outlet1: tmp175@2c {
++		compatible = "ti,tmp175";
++		reg = <0x2c>;
++	};
++
++	outlet2: tmp175@2d {
++		compatible = "ti,tmp175";
++		reg = <0x2d>;
++	};
++};
++
++&i2c4 {
++	status = "okay";
++	rtc@51 {
++		compatible = "nxp,pcf85063a";
++		reg = <0x51>;
++	};
++};
++
++&i2c5 {
++	status = "okay";
++};
++
++&i2c6 {
++	status = "okay";
++	psu@58 {
++		compatible = "pmbus";
++		reg = <0x58>;
++	};
++
++	psu@59 {
++		compatible = "pmbus";
++		reg = <0x59>;
++	};
++};
++
++&i2c7 {
++	status = "okay";
++};
++
++&i2c8 {
++	status = "okay";
++};
++
++&i2c9 {
++	status = "okay";
++};
++
++&gfx {
++	status = "okay";
++	memory-region = <&gfx_memory>;
++};
++
++&pinctrl {
++	aspeed,external-nodes = <&gfx &lhc>;
++};
++
++&pwm_tacho {
++	status = "okay";
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
++			&pinctrl_pwm4_default &pinctrl_pwm5_default
++			&pinctrl_pwm6_default &pinctrl_pwm7_default>;
++
++	fan@0 {
++		reg = <0x02>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x04>;
++	};
++
++	fan@1 {
++		reg = <0x02>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x05>;
++	};
++
++	fan@2 {
++		reg = <0x03>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x06>;
++	};
++
++	fan@3 {
++		reg = <0x03>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x07>;
++	};
++
++	fan@4 {
++		reg = <0x04>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x08>;
++	};
++
++	fan@5 {
++		reg = <0x04>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x09>;
++	};
++
++	fan@6 {
++		reg = <0x05>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
++	};
++
++	fan@7 {
++		reg = <0x05>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
++	};
++
++	fan@8 {
++		reg = <0x06>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
++	};
++
++	fan@9 {
++		reg = <0x06>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
++	};
++
++	fan@10 {
++		reg = <0x07>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
++	};
++
++	fan@11 {
++		reg = <0x07>;
++		aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
++	};
++
++};
++
++&vhub {
++	status = "okay";
++};
++
++&adc {
++	status = "okay";
++};
++
++&video {
++	status = "okay";
++	memory-region = <&video_engine_memory>;
++};
++
++&gpio {
++	gpio-line-names =
++	/*A0-A7*/	"","","","S0_BMC_SPECIAL_BOOT","","","","",
++	/*B0-B7*/	"BMC_SELECT_EEPROM","","","",
++			"POWER_BUTTON","","","",
++	/*C0-C7*/	"","","","","","","","",
++	/*D0-D7*/	"","","","","","","","",
++	/*E0-E7*/	"","","","","","","","",
++	/*F0-F7*/	"","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
++			"S1_DDR_SAVE","","",
++	/*G0-G7*/	"S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","",
++			"","",
++	/*H0-H7*/	"","","","","","","","",
++	/*I0-I7*/	"","","S1_BMC_SPECIAL_BOOT","","","","","",
++	/*J0-J7*/	"S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
++			"","","","",
++	/*K0-K7*/	"","","","","","","","",
++	/*L0-L7*/       "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
++	/*M0-M7*/	"","","","","","","","",
++	/*N0-N7*/	"","","","","","","","",
++	/*O0-O7*/	"","","","","","","","",
++	/*P0-P7*/	"","","","","","","","",
++	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
++	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","","","RESET_BUTTON","","",
++	/*S0-S7*/	"","","","","","","","",
++	/*T0-T7*/	"","","","","","","","",
++	/*U0-U7*/	"","","","","","","","",
++	/*V0-V7*/	"","","","","","","","",
++	/*W0-W7*/	"","","","","","","","",
++	/*X0-X7*/	"","","","","","","","",
++	/*Y0-Y7*/	"","","","","","","","",
++	/*Z0-Z7*/	"S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
++			"S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
++	/*AA0-AA7*/	"","","","","","","","",
++	/*AB0-AB7*/	"S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
++			"S1_BMC_DDR_ADR","","","","",
++	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
++			"BMC_OCP_PG";
++};
+-- 
+2.28.0
+
diff --git a/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/mtjade.cfg b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/mtjade.cfg
new file mode 100644
index 0000000..9afe14a
--- /dev/null
+++ b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed/mtjade.cfg
@@ -0,0 +1,16 @@
+#
+# BOM
+#
+CONFIG_RTC_DRV_PCF85063=y
+CONFIG_IIO_MUX=y
+CONFIG_MUX_GPIO=y
+CONFIG_I2C_MUX=y
+
+#
+# Mtjade driver build flags
+#
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_ASPEED_ADC=y
+CONFIG_SENSORS_LM75=y
+CONFIG_I2C_SLAVE=y
+CONFIG_SENSORS_ASPEED=y
diff --git a/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed_%.bbappend
new file mode 100644
index 0000000..109cc07
--- /dev/null
+++ b/meta-ampere/meta-jade/recipes-kernel/linux/linux-aspeed_%.bbappend
@@ -0,0 +1,7 @@
+FILESEXTRAPATHS_prepend_mtjade := "${THISDIR}/${PN}:"
+
+SRC_URI += " \
+    file://${MACHINE}.cfg \
+    file://0001-ARM-dts-aspeed-Add-device-tree-for-Ampere-s-Mt.-Jade.patch \
+"
+