Import 80d60e7 from yoctoproject.org meta-arm
To support ARMv8 SoCs.
meta-arm has several patch files. Since they are maintained by the
upstream meta-arm community, add meta-arm to the ignore list in
run-repotest.
Change-Id: Ia87a2e947bbabd347d256eccc47a343e1c885479
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch
new file mode 100644
index 0000000..74ab361
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch
@@ -0,0 +1,43 @@
+From 008cfc6457c239466ca62610d59aaf1a78f6b2f6 Mon Sep 17 00:00:00 2001
+From: Tudor Cretu <tudor.cretu@arm.com>
+Date: Fri, 21 May 2021 14:56:37 +0000
+Subject: [PATCH 1/7] plat: tc: Increase maximum BL2 size.
+
+BL2 size gets increased due to the firmware update changes.
+Increase the MAX_BL2_SIZE by 8Kb.
+
+Signed-off-by: Tudor Cretu <tudor.cretu@arm.com>
+Change-Id: I1cb28b0eb7f834426873ff9f4c40bd496413806f
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ plat/arm/board/tc/include/platform_def.h | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h
+index 745d91cab..cd77773aa 100644
+--- a/plat/arm/board/tc/include/platform_def.h
++++ b/plat/arm/board/tc/include/platform_def.h
+@@ -120,9 +120,9 @@
+ * little space for growth.
+ */
+ #if TRUSTED_BOARD_BOOT
+-# define PLAT_ARM_MAX_BL2_SIZE 0x20000
++# define PLAT_ARM_MAX_BL2_SIZE 0x25000
+ #else
+-# define PLAT_ARM_MAX_BL2_SIZE 0x14000
++# define PLAT_ARM_MAX_BL2_SIZE 0x19000
+ #endif
+
+ /*
+@@ -130,7 +130,7 @@
+ * calculated using the current BL31 PROGBITS debug size plus the sizes of
+ * BL2 and BL1-RW
+ */
+-#define PLAT_ARM_MAX_BL31_SIZE 0x3F000
++#define PLAT_ARM_MAX_BL31_SIZE 0x4F000
+
+ /*
+ * Size of cacheable stacks
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch
new file mode 100644
index 0000000..75cabdd
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch
@@ -0,0 +1,46 @@
+From 2f8b0cc6be3787717247d1c02a45181a5ac6f125 Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Mon, 11 Apr 2022 14:36:54 +0100
+Subject: [PATCH 2/7] Makefile: add trusty_sp_fw_config build option
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: Ief90ae9113d32265ee2200f35f3e517b7b9a4bea
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ Makefile | 4 ++++
+ docs/plat/arm/arm-build-options.rst | 4 ++++
+ 2 files changed, 8 insertions(+)
+
+diff --git a/Makefile b/Makefile
+index 3941f8698..a20d647a2 100644
+--- a/Makefile
++++ b/Makefile
+@@ -531,6 +531,10 @@ ifneq (${SPD},none)
+ DTC_CPPFLAGS += -DOPTEE_SP_FW_CONFIG
+ endif
+
++ ifeq ($(findstring trusty_sp,$(ARM_SPMC_MANIFEST_DTS)),trusty_sp)
++ DTC_CPPFLAGS += -DTRUSTY_SP_FW_CONFIG
++ endif
++
+ ifeq ($(TS_SP_FW_CONFIG),1)
+ DTC_CPPFLAGS += -DTS_SP_FW_CONFIG
+ endif
+diff --git a/docs/plat/arm/arm-build-options.rst b/docs/plat/arm/arm-build-options.rst
+index 339ebbe33..3c9a41fb8 100644
+--- a/docs/plat/arm/arm-build-options.rst
++++ b/docs/plat/arm/arm-build-options.rst
+@@ -107,6 +107,10 @@ Arm Platform Build Options
+ device tree. This flag is defined only when ``ARM_SPMC_MANIFEST_DTS`` manifest
+ file name contains pattern optee_sp.
+
++- ``TRUSTY_SP_FW_CONFIG``: DTC build flag to include Trusty as SP in
++ tb_fw_config device tree. This flag is defined only when
++ ``ARM_SPMC_MANIFEST_DTS`` manifest file name contains pattern trusty_sp.
++
+ - ``TS_SP_FW_CONFIG``: DTC build flag to include Trusted Services (Crypto and
+ internal-trusted-storage) as SP in tb_fw_config device tree.
+
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch
new file mode 100644
index 0000000..6807191
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch
@@ -0,0 +1,30 @@
+From 0060b1a4fbe3bc9992f59a2d4cb986821f7bcf13 Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Mon, 11 Apr 2022 18:31:01 +0100
+Subject: [PATCH 3/7] fix(plat/arm): increase sp max image size
+
+Increase ARM_SP_MAX_SIZE to support Trusty image.
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: I9ef9e755769445aee998062a7fba508fad50b33e
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ include/plat/arm/common/fconf_arm_sp_getter.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/include/plat/arm/common/fconf_arm_sp_getter.h b/include/plat/arm/common/fconf_arm_sp_getter.h
+index aa628dfd3..3ed953d1c 100644
+--- a/include/plat/arm/common/fconf_arm_sp_getter.h
++++ b/include/plat/arm/common/fconf_arm_sp_getter.h
+@@ -13,7 +13,7 @@
+ /* arm_sp getter */
+ #define arm__sp_getter(prop) arm_sp.prop
+
+-#define ARM_SP_MAX_SIZE U(0xb0000)
++#define ARM_SP_MAX_SIZE U(0x2000000)
+ #define ARM_SP_OWNER_NAME_LEN U(8)
+
+ struct arm_sp_t {
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch
new file mode 100644
index 0000000..aec8be0
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch
@@ -0,0 +1,69 @@
+From 000e19d360a5ad9abd7d823af86a364bac2afc58 Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Mon, 11 Apr 2022 17:38:17 +0100
+Subject: [PATCH 4/7] fix(plat/tc): increase tc_tzc_dram1_size
+
+Increase TC_TZC_DRAM1_SIZE for Trusty image and its memory size.
+Update OP-TEE reserved memory range in DTS
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: Iad433c3c155f28860b15bde2398df653487189dd
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ fdts/tc.dts | 4 ++--
+ plat/arm/board/tc/include/platform_def.h | 10 ++++++----
+ 2 files changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/fdts/tc.dts b/fdts/tc.dts
+index 20992294b..af64504a4 100644
+--- a/fdts/tc.dts
++++ b/fdts/tc.dts
+@@ -213,8 +213,8 @@
+ linux,cma-default;
+ };
+
+- optee@0xfce00000 {
+- reg = <0x00000000 0xfce00000 0 0x00200000>;
++ optee@0xf8e00000 {
++ reg = <0x00000000 0xf8e00000 0 0x00200000>;
+ no-map;
+ };
+ };
+diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h
+index cd77773aa..35d8fd24e 100644
+--- a/plat/arm/board/tc/include/platform_def.h
++++ b/plat/arm/board/tc/include/platform_def.h
+@@ -31,7 +31,7 @@
+ */
+ #define TC_TZC_DRAM1_BASE (ARM_AP_TZC_DRAM1_BASE - \
+ TC_TZC_DRAM1_SIZE)
+-#define TC_TZC_DRAM1_SIZE UL(0x02000000) /* 32 MB */
++#define TC_TZC_DRAM1_SIZE UL(0x06000000) /* 96 MB */
+ #define TC_TZC_DRAM1_END (TC_TZC_DRAM1_BASE + \
+ TC_TZC_DRAM1_SIZE - 1)
+
+@@ -68,7 +68,9 @@
+ * max size of BL32 image.
+ */
+ #if defined(SPD_spmd)
+-#define PLAT_ARM_SPMC_BASE TC_TZC_DRAM1_BASE
++#define TC_EL2SPMC_LOAD_ADDR (TC_TZC_DRAM1_BASE + 0x04000000)
++
++#define PLAT_ARM_SPMC_BASE TC_EL2SPMC_LOAD_ADDR
+ #define PLAT_ARM_SPMC_SIZE UL(0x200000) /* 2 MB */
+ #endif
+
+@@ -259,8 +261,8 @@
+ (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DEFAULT))
+
+ /*
+- * The first region below, TC_TZC_DRAM1_BASE (0xfd000000) to
+- * ARM_SCP_TZC_DRAM1_END (0xffffffff) will mark the last 48 MB of DRAM as
++ * The first region below, TC_TZC_DRAM1_BASE (0xf9000000) to
++ * ARM_SCP_TZC_DRAM1_END (0xffffffff) will mark the last 112 MB of DRAM as
+ * secure. The second and third regions gives non secure access to rest of DRAM.
+ */
+ #define TC_TZC_REGIONS_DEF \
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch
new file mode 100644
index 0000000..0b34683
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch
@@ -0,0 +1,169 @@
+From a04466ceb81a04c5179e8064837c34a89c2b11bd Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Mon, 11 Apr 2022 14:43:15 +0100
+Subject: [PATCH 5/7] feat(plat/tc): add spmc manifest with trusty sp
+
+Add SPMC manifest with Trusty SP. Define Trusty's load address,
+vcpu count, memory size.
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: If4363580a478776d233f7f391a30e1cb345453c2
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ .../tc/fdts/tc_spmc_trusty_sp_manifest.dts | 120 ++++++++++++++++++
+ plat/arm/board/tc/fdts/tc_tb_fw_config.dts | 7 +-
+ 2 files changed, 126 insertions(+), 1 deletion(-)
+ create mode 100644 plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts
+
+diff --git a/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts b/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts
+new file mode 100644
+index 000000000..e2ea7b811
+--- /dev/null
++++ b/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts
+@@ -0,0 +1,120 @@
++/*
++ * Copyright (c) 2022, Arm Limited. All rights reserved.
++ *
++ * SPDX-License-Identifier: BSD-3-Clause
++ */
++/dts-v1/;
++
++/ {
++ compatible = "arm,ffa-core-manifest-1.0";
++ #address-cells = <2>;
++ #size-cells = <1>;
++
++ attribute {
++ spmc_id = <0x8000>;
++ maj_ver = <0x1>;
++ min_ver = <0x1>;
++ exec_state = <0x0>;
++ load_address = <0x0 0xfd000000>;
++ entrypoint = <0x0 0xfd000000>;
++ binary_size = <0x80000>;
++ };
++
++ hypervisor {
++ compatible = "hafnium,hafnium";
++ vm1 {
++ is_ffa_partition;
++ debug_name = "trusty";
++ load_address = <0xf901f000>;
++ vcpu_count = <8>;
++ mem_size = <0x3f00000>; /* 64MB TZC DRAM - 1MB align */
++ };
++#ifdef TS_SP_FW_CONFIG
++ vm2 {
++ is_ffa_partition;
++ debug_name = "internal-trusted-storage";
++ load_address = <0xfee00000>;
++ vcpu_count = <1>;
++ mem_size = <2097152>; /* 2MB TZC DRAM */
++ };
++ vm3 {
++ is_ffa_partition;
++ debug_name = "crypto";
++ load_address = <0xfec00000>;
++ vcpu_count = <1>;
++ mem_size = <2097152>; /* 2MB TZC DRAM */
++ };
++#endif
++ };
++
++ cpus {
++ #address-cells = <0x2>;
++ #size-cells = <0x0>;
++
++ CPU0:cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x0>;
++ enable-method = "psci";
++ };
++
++ /*
++ * SPMC (Hafnium) requires secondary cpu nodes are declared in
++ * descending order
++ */
++ CPU7:cpu@700 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x700>;
++ enable-method = "psci";
++ };
++
++ CPU6:cpu@600 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x600>;
++ enable-method = "psci";
++ };
++
++ CPU5:cpu@500 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x500>;
++ enable-method = "psci";
++ };
++
++ CPU4:cpu@400 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x400>;
++ enable-method = "psci";
++ };
++
++ CPU3:cpu@300 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x300>;
++ enable-method = "psci";
++ };
++
++ CPU2:cpu@200 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x200>;
++ enable-method = "psci";
++ };
++
++ CPU1:cpu@100 {
++ device_type = "cpu";
++ compatible = "arm,armv8";
++ reg = <0x0 0x100>;
++ enable-method = "psci";
++ };
++ };
++
++ /* 96MB of TC_TZC_DRAM1_BASE */
++ memory@f9000000 {
++ device_type = "memory";
++ reg = <0x0 0xf9000000 0x6000000>;
++ };
++};
+diff --git a/plat/arm/board/tc/fdts/tc_tb_fw_config.dts b/plat/arm/board/tc/fdts/tc_tb_fw_config.dts
+index 4c6ccef25..a72772fb3 100644
+--- a/plat/arm/board/tc/fdts/tc_tb_fw_config.dts
++++ b/plat/arm/board/tc/fdts/tc_tb_fw_config.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2020-2021, Arm Limited. All rights reserved.
++ * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+@@ -47,6 +47,11 @@
+ uuid = "486178e0-e7f8-11e3-bc5e-0002a5d5c51b";
+ load-address = <0xfd280000>;
+ };
++#elif TRUSTY_SP_FW_CONFIG
++ trusty {
++ uuid = "40ee25f0-a2bc-304c-8c4c-a173c57d8af1";
++ load-address = <0xf901f000>;
++ };
+ #else
+ cactus-primary {
+ uuid = "b4b5671e-4a90-4fe1-b81f-fb13dae1dacb";
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch
new file mode 100644
index 0000000..e2bfb2c
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch
@@ -0,0 +1,50 @@
+From 96151af7eed28d63fdaa1ac6de2d14a9c71f1d4a Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Wed, 30 Mar 2022 12:14:49 +0000
+Subject: [PATCH 6/7] feat(plat/tc): update dts with trusty compatible string
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: Ic6661df479e114bf3f464165c14df5fa02dc0139
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ fdts/tc.dts | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/fdts/tc.dts b/fdts/tc.dts
+index af64504a4..dc86958bf 100644
+--- a/fdts/tc.dts
++++ b/fdts/tc.dts
+@@ -555,4 +555,30 @@
+ compatible = "arm,trace-buffer-extension";
+ interrupts = <1 2 4>;
+ };
++
++ trusty {
++ #size-cells = <0x02>;
++ #address-cells = <0x02>;
++ ranges = <0x00>;
++ compatible = "android,trusty-v1";
++
++ virtio {
++ compatible = "android,trusty-virtio-v1";
++ };
++
++ test {
++ compatible = "android,trusty-test-v1";
++ };
++
++ log {
++ compatible = "android,trusty-log-v1";
++ };
++
++ irq {
++ ipi-range = <0x08 0x0f 0x08>;
++ interrupt-ranges = <0x00 0x0f 0x00 0x10 0x1f 0x01 0x20 0x3f 0x02>;
++ interrupt-templates = <0x01 0x00 0x8001 0x01 0x01 0x04 0x8001 0x01 0x00 0x04>;
++ compatible = "android,trusty-irq-v1";
++ };
++ };
+ };
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch
new file mode 100644
index 0000000..91f5a9e
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch
@@ -0,0 +1,64 @@
+From 1a051bef6c63f6871edd8d87e969460f073820a7 Mon Sep 17 00:00:00 2001
+From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Date: Wed, 27 Apr 2022 18:15:47 +0100
+Subject: [PATCH 7/7] fix(plat/tc): disable smmu
+
+Reserve static shared-dma-pool below 4GB. This removes dependency on
+SMMU driver. As there are stability issues in SMMU driver, it is
+disabled. This change is temporary and will be reverted upon proper
+fix and testing.
+
+Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
+Change-Id: I6b1b4c2a0acdf62df8c26007c7ca596774e13710
+Upstream-Status: Pending [Not submitted to upstream yet]
+---
+ fdts/tc.dts | 16 +++-------------
+ 1 file changed, 3 insertions(+), 13 deletions(-)
+
+diff --git a/fdts/tc.dts b/fdts/tc.dts
+index dc86958bf..fbae3e3e8 100644
+--- a/fdts/tc.dts
++++ b/fdts/tc.dts
+@@ -209,12 +209,12 @@
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+- size = <0x0 0x8000000>;
++ reg = <0x0 0xf1000000 0x0 0x8000000>;
+ linux,cma-default;
+ };
+
+- optee@0xf8e00000 {
+- reg = <0x00000000 0xf8e00000 0 0x00200000>;
++ optee@0xf0e00000 {
++ reg = <0x0 0xf0e00000 0 0x00200000>;
+ no-map;
+ };
+ };
+@@ -460,13 +460,6 @@
+ >;
+ };
+
+- smmu: smmu@2ce00000 {
+- #iommu-cells = <1>;
+- compatible = "arm,smmu-v3";
+- reg = <0x0 0x2ce00000 0x0 0x20000>;
+- status = "okay";
+- };
+-
+ dp0: display@2cc00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -476,9 +469,6 @@
+ interrupt-names = "DPU";
+ clocks = <&scmi_clk 0>;
+ clock-names = "aclk";
+- iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+- <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+- <&smmu 8>, <&smmu 9>;
+ pl0: pipeline@0 {
+ reg = <0>;
+ clocks = <&scmi_clk 1>;
+--
+2.30.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py
new file mode 100644
index 0000000..f3670ce
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py
@@ -0,0 +1,63 @@
+#!/usr/bin/env python3
+# Copyright (c) 2021, Arm Limited. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+
+import argparse
+import uuid
+import zlib
+
+def main(metadata_file, img_type_uuids, location_uuids, img_uuids):
+ def add_field_to_metadata(value):
+ # Write the integer values to file in little endian representation
+ with open(metadata_file, "ab") as fp:
+ fp.write(value.to_bytes(4, byteorder='little'))
+
+ def add_uuid_to_metadata(uuid_str):
+ # Validate UUID string and write to file in little endian representation
+ uuid_val = uuid.UUID(uuid_str)
+ with open(metadata_file, "ab") as fp:
+ fp.write(uuid_val.bytes_le)
+
+ # Fill metadata preamble
+ add_field_to_metadata(1) #version=1
+ add_field_to_metadata(0) #active_index=0
+ add_field_to_metadata(0) #previous_active_index=0
+
+ for img_type_uuid, location_uuid in zip(img_type_uuids, location_uuids):
+ # Fill metadata image entry
+ add_uuid_to_metadata(img_type_uuid) # img_type_uuid
+ add_uuid_to_metadata(location_uuid) # location_uuid
+
+ for img_uuid in img_uuids:
+ # Fill metadata bank image info
+ add_uuid_to_metadata(img_uuid) # image unique bank_uuid
+ add_field_to_metadata(1) # accepted=1
+ add_field_to_metadata(0) # reserved (MBZ)
+
+ # Prepend CRC32
+ with open(metadata_file, 'rb+') as fp:
+ content = fp.read()
+ crc = zlib.crc32(content)
+ fp.seek(0)
+ fp.write(crc.to_bytes(4, byteorder='little') + content)
+
+if __name__ == "__main__":
+ parser = argparse.ArgumentParser()
+ parser.add_argument('--metadata_file', required=True,
+ help='Output binary file to store the metadata')
+ parser.add_argument('--img_type_uuids', type=str, nargs='+', required=True,
+ help='A list of UUIDs identifying the image types')
+ parser.add_argument('--location_uuids', type=str, nargs='+', required=True,
+ help='A list of UUIDs of the storage volumes where the images are located. '
+ 'Must have the same length as img_type_uuids.')
+ parser.add_argument('--img_uuids', type=str, nargs='+', required=True,
+ help='A list UUIDs of the images in a firmware bank')
+
+ args = parser.parse_args()
+
+ if len(args.img_type_uuids) != len(args.location_uuids):
+ parser.print_help()
+ raise argparse.ArgumentError(None, 'Arguments img_type_uuids and location_uuids must have the same length.')
+
+ main(args.metadata_file, args.img_type_uuids, args.location_uuids, args.img_uuids)