commit e30a1ee780615d68f37de8758890a6e16a787278
author Andrew Geissler <openbmcbump-github@yahoo.com> Thu Sep 15 19:33:26 2022 -0500
committer Andrew Geissler <andrew@geissonator.com> Fri Sep 16 15:37:33 2022 +0000
tree 6b95e15341ff16b57a9ad2a8a947e6411f54f480
parent 538d3da0642c3f0495366d01114f4e8da0f8cabd

x86-power-control: srcrev bump 9dbcee8522..8643c79740

Ping Guo (1):
      Set NMI_OUT according to the configuration file

Change-Id: I201db5c6eb5453e8d83bc0c33fa056aaa7d4aecc
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>

meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb

diff --git a/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb b/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb
index 1d56282..f68629f 100755
--- a/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb
+++ b/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb
@@ -2,7 +2,7 @@
 DESCRIPTION = "Chassis Power Control service for Intel based platforms"
 
 SRC_URI = "git://github.com/openbmc/x86-power-control.git;protocol=https;branch=master"
-SRCREV = "9dbcee8522674d42e75687cb9916c1b25bd875c3"
+SRCREV = "8643c79740d21f4a21184de729c19f9aec0f7c48"
 
 PV = "1.0+git${SRCPV}"