Add meta-xilinx subtree
Import git://git.yoctoproject.org/meta-xilinx from 5fccc46503 as
meta-xilinx subtree.
Change-Id: I3d59bcf3a57cee588aab7f5cdd0287af66450c8a
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/device-tree.bbappend
new file mode 100644
index 0000000..d9535da
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/device-tree.bbappend
@@ -0,0 +1,6 @@
+FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
+
+# device tree sources for MiniZed
+COMPATIBLE_MACHINE_minized-zynq7 = ".*"
+SRC_URI_append_minized-zynq7 = " file://minized-zynq7.dts"
+
diff --git a/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/files/minized-zynq7.dts b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/files/minized-zynq7.dts
new file mode 100644
index 0000000..4570fa6
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/device-tree/files/minized-zynq7.dts
@@ -0,0 +1,254 @@
+/*
+* dts file for MiniZed
+*
+* Copyright (C) 2018 Clément Laigle <clement.laigle8@gmail.com>
+*/
+
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+
+/ {
+ model = "Zynq Minized Board";
+ compatible = "xlnx,zynq-Minized", "xlnx,zynq-7000";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ cpu@0 {
+ operating-points = <666666 1000000 333333 1000000>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart1;
+ serial1 = &bluetooth_uart;
+ spi0 = &qspi;
+ mmc0 = &sdhci1;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0x20000000>;
+ };
+
+ usb_phy0: phy0 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0x0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-psg {
+ label = "led-psg";
+ gpios = <&gpio0 53 0>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ led-psr {
+ label = "led-psr";
+ gpios = <&gpio0 52 0>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ autorepeat;
+ sw3 {
+ label = "ps-bp";
+ gpios = <&gpio0 0 0>;
+ linux,code = <108>; /* down */
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ };
+
+ amba_pl: amba_pl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges ;
+
+ axi_gpio_0: gpio@41200000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x41200000 0x10000>;
+ xlnx,all-inputs = <0x0>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x1>;
+ xlnx,all-outputs-2 = <0x1>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x1>;
+ xlnx,gpio2-width = <0x1>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x1>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_gpio_1: gpio@41210000 {
+ #gpio-cells = <2>;
+ compatible = "xlnx,xps-gpio-1.00.a";
+ gpio-controller ;
+ reg = <0x41210000 0x10000>;
+ xlnx,all-inputs = <0x1>;
+ xlnx,all-inputs-2 = <0x0>;
+ xlnx,all-outputs = <0x0>;
+ xlnx,all-outputs-2 = <0x0>;
+ xlnx,dout-default = <0x00000000>;
+ xlnx,dout-default-2 = <0x00000000>;
+ xlnx,gpio-width = <0x1>;
+ xlnx,gpio2-width = <0x20>;
+ xlnx,interrupt-present = <0x0>;
+ xlnx,is-dual = <0x0>;
+ xlnx,tri-default = <0xFFFFFFFF>;
+ xlnx,tri-default-2 = <0xFFFFFFFF>;
+ };
+ axi_iic_0: i2c@41600000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-names = "ref_clk";
+ clocks = <&clkc 15>;
+ compatible = "xlnx,xps-iic-2.00.a";
+ interrupt-parent = <&intc>;
+ interrupts = <0 30 4>;
+ reg = <0x41600000 0x10000>;
+ };
+ bluetooth_uart: serial@43c00000 {
+ clock-frequency = <0x2dc6c00>;
+ clock-names = "ref_clk";
+ clocks = <&clkc 0>;
+ compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a";
+ current-speed = <115200>;
+ device_type = "serial";
+ interrupt-parent = <&intc>;
+ interrupts = <0 29 4>;
+ port-number = <1>;
+ reg = <0x43c00000 0x10000>;
+ reg-offset = <0x1000>;
+ reg-shift = <2>;
+ xlnx,external-xin-clk-hz = <0x2dc6c00>;
+ xlnx,external-xin-clk-hz-d = <0x30>;
+ xlnx,has-external-rclk = <0x0>;
+ xlnx,has-external-xin = <0x1>;
+ xlnx,is-a-16550 = <0x1>;
+ xlnx,s-axi-aclk-freq-hz-d = "100.0";
+ xlnx,use-modem-ports = <0x1>;
+ xlnx,use-user-ports = <0x1>;
+ };
+ };
+
+ wlreg_on: wlreg-on {
+ compatible = "regulator-fixed";
+ regulator-name = "wlreg_on";
+ enable-active-high;
+ gpio = <&gpio0 56 0>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100>;
+ };
+};
+
+&gpio0 {
+ emio-gpio-width = <4>;
+ gpio-mask-high = <0x0>;
+ gpio-mask-low = <0x5600>;
+};
+
+&intc {
+ num_cpus = <1>;
+ num_interrupts = <96>;
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&sdhci0 {
+ status = "okay";
+ bus-width= <4>;
+ xlnx,has-cd = <0x0>;
+ xlnx,has-power = <0x0>;
+ xlnx,has-wp = <0x0>;
+ non-removeable;
+ broken-cd;
+ vmmc-supply = <&wlreg_on>;
+
+ brcmf: brcmf@1 {
+ status = "okay";
+ reg = <1>;
+ compatible = "brcm,bcm43430-fmac";
+ };
+};
+
+&sdhci1 {
+ status = "okay";
+ non-removable;
+ bus-width = <4>;
+ max-frequency = <12000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mmccard: mmccard@0 {
+ compatible = "mmc-card";
+ reg = <0>;
+ broken-hpi;
+ };
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+ usb-reset = <&gpio0 7 0>;
+ usb-phy = <&usb_phy0>;
+};
+
+&uart1 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&qspi {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <0x3>;
+ is-dual = <0x0>;
+ num-cs = <0x1>;
+
+
+ flash0: flash@0 {
+ compatible = "micron,m25p80";
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
+
+ partition@0x00000000 {
+ label = "boot";
+ reg = <0x0 0xff0000>;
+ };
+ partition@0x00270000 {
+ label = "kernel";
+ reg = <0x270000 0xd80000>;
+ };
+ partition@0x00ff0000 {
+ label = "bootenv";
+ reg = <0xff0000 0x10000>;
+ };
+
+ partition@0x01000000 {
+ label = "spare";
+ reg = <0x1000000 0x0>;
+ };
+
+ };
+};
+
diff --git a/meta-xilinx/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb
new file mode 100644
index 0000000..be68918
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb
@@ -0,0 +1,66 @@
+SUMMARY = "The reference design for zybo-linux-bd"
+DESCRIPTION = "Contains the Reference Design Files and hardware software \
+hand-off file. The HDF provides bitstream and Xilinx ps7_init_gpl.c/h \
+platform headers."
+SECTION = "bsp"
+
+DEPENDS += "unzip-native"
+
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://Projects/${HW_BD}/readme.txt;md5=e1cb7639bf00b6e730ff3a7f13714951"
+
+COMPATIBLE_MACHINE = "zybo-linux-bd-zynq7"
+
+HW_BD = "linux_bd"
+
+SRC_URI = "git://github.com/Digilent/ZYBO.git;protocol=https;nobranch=1"
+SRCREV = "63ca49fe027da49f3b0ac636bd404fd31fbbd945"
+
+PV = "+git${SRCPV}"
+
+S = "${WORKDIR}/git"
+
+HDF = "/Projects/${HW_BD}/hw_handoff/${HW_BD}_wrapper.hdf"
+
+S ?= "${WORKDIR}/${MACHINE}"
+
+PROVIDES = "virtual/bitstream virtual/xilinx-platform-init"
+
+FILES_${PN}-platform-init += "${PLATFORM_INIT_DIR}/*"
+
+FILES_${PN}-bitstream += " \
+ download.bit \
+ "
+
+PACKAGES = "${PN}-platform-init ${PN}-bitstream"
+
+BITSTREAM ?= "bitstream-${PV}-${PR}.bit"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+inherit xilinx-platform-init
+inherit deploy
+
+SYSROOT_DIRS += "${PLATFORM_INIT_DIR}"
+
+do_install() {
+ fn=$(unzip -l ${S}/${HDF} | awk '{print $NF}' | grep ".bit$")
+ unzip -o ${S}/${HDF} ${fn} -d ${D}
+ [ "${fn}" == "download.bit" ] || mv ${D}/${fn} ${D}/download.bit
+
+ install -d ${D}${PLATFORM_INIT_DIR}
+ for fn in ${PLATFORM_INIT_FILES}; do
+ unzip -o ${S}/${HDF} ${fn} -d ${D}${PLATFORM_INIT_DIR}
+ done
+}
+
+do_deploy () {
+ if [ -e ${D}/download.bit ]; then
+ install -d ${DEPLOYDIR}
+ install -m 0644 ${D}/download.bit ${DEPLOYDIR}/${BITSTREAM}
+ ln -sf ${BITSTREAM} ${DEPLOYDIR}/download.bit
+ # for u-boot 2016.3 with spl load bitstream patch
+ ln -sf ${BITSTREAM} ${DEPLOYDIR}/bitstream
+ fi
+}
+addtask deploy before do_build after do_install
diff --git a/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch
new file mode 100644
index 0000000..4b9d72b
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/files/minized-u-boot.patch
@@ -0,0 +1,217 @@
+From dfe572bcea9b74086d5bd9b963af26e64a043336 Mon Sep 17 00:00:00 2001
+From: Clement Laigle <clement.laigle8@gmail.com>
+Date: Sun, 10 Jun 2018 23:21:28 +0200
+Subject: [PATCH] zynq: Add initial support for Avnet MiniZed
+
+Initial support for Avnet MiniZed board.
+
+Signed-off-by: Clement Laigle <clement.laigle8@gmail.com>
+---
+ arch/arm/dts/Makefile | 1 +
+ arch/arm/dts/zynq-minized.dts | 106 +++++++++++++++++++++++++++++++++++++++++
+ configs/zynq_minized_defconfig | 68 ++++++++++++++++++++++++++
+ 3 files changed, 175 insertions(+)
+ create mode 100644 arch/arm/dts/zynq-minized.dts
+ create mode 100644 configs/zynq_minized_defconfig
+
+diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
+index a895c70..32f9ae1 100644
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
+ zynq-cse-qspi-single.dtb \
+ zynq-microzed.dtb \
+ zynq-picozed.dtb \
++ zynq-minized.dtb \
+ zynq-syzygy-hub.dtb \
+ zynq-topic-miami.dtb \
+ zynq-topic-miamilite.dtb \
+diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts
+new file mode 100644
+index 0000000..3a05518
+--- /dev/null
++++ b/arch/arm/dts/zynq-minized.dts
+@@ -0,0 +1,106 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * dts file for Avnet MiniZed board
++ *
++ * (C) Copyright 2017 - 2018, Xilinx, Inc.
++ *
++ * Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
++ */
++
++/dts-v1/;
++#include "zynq-7000.dtsi"
++
++/ {
++ model = "Avnet Zynq MiniZed Development Board";
++ compatible = "avnet,minized", "xlnx,zynq-7000";
++
++ aliases {
++ serial0 = &uart1;
++ serial1 = &uart0;
++ spi0 = &qspi;
++ mmc0 = &sdhci0;
++ };
++
++ memory@0 {
++ device_type = "memory";
++ reg = <0x0 0x20000000>;
++ };
++
++ chosen {
++ bootargs = "";
++ stdout-path = "serial0:115200n8";
++ };
++
++ usb_phy0: phy0 {
++ compatible = "usb-nop-xceiv";
++ #phy-cells = <0>;
++ };
++};
++
++&qspi {
++ status = "okay";
++ is-dual = <0>;
++ num-cs = <1>;
++ flash@0 {
++ compatible = "micron,m25p128";
++ reg = <0x0>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
++ spi-max-frequency = <50000000>;
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ partition@0 {
++ label = "boot";
++ reg = <0x0 0xff0000>;
++ };
++
++ partition@270000 {
++ label = "kernel";
++ reg = <0x270000 0xd80000>;
++ };
++
++ partition@ff0000 {
++ label = "bootenv";
++ reg = <0xff0000 0x10000>;
++ };
++
++ partition@1000000 {
++ label = "spare";
++ reg = <0x1000000 0x0>;
++ };
++ };
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&uart1 {
++ u-boot,dm-pre-reloc;
++ status = "okay";
++};
++
++&usb0 {
++ status = "okay";
++ dr_mode = "host";
++ usb-phy = <&usb_phy0>;
++ usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */
++};
++
++&sdhci1 {
++ status = "okay";
++ non-removable;
++ bus-width = <4>;
++ max-frequency = <12000000>;
++
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mmccard: mmccard@0 {
++ compatible = "mmc-card";
++ reg = <0>;
++ broken-hpi;
++ };
++};
+diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig
+new file mode 100644
+index 0000000..44d65fc
+--- /dev/null
++++ b/configs/zynq_minized_defconfig
+@@ -0,0 +1,68 @@
++CONFIG_ARM=y
++CONFIG_ARCH_ZYNQ=y
++CONFIG_SYS_TEXT_BASE=0x4000000
++CONFIG_SPL=y
++CONFIG_SPL_STACK_R_ADDR=0x200000
++CONFIG_DEFAULT_DEVICE_TREE="zynq-minized"
++CONFIG_DEBUG_UART=y
++CONFIG_DISTRO_DEFAULTS=y
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_FIT=y
++CONFIG_FIT_SIGNATURE=y
++CONFIG_FIT_VERBOSE=y
++CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
++CONFIG_SPL_STACK_R=y
++CONFIG_SPL_OS_BOOT=y
++CONFIG_SYS_PROMPT="Zynq> "
++CONFIG_CMD_THOR_DOWNLOAD=y
++CONFIG_CMD_DFU=y
++# CONFIG_CMD_FLASH is not set
++CONFIG_CMD_FPGA_LOADBP=y
++CONFIG_CMD_FPGA_LOADFS=y
++CONFIG_CMD_FPGA_LOADMK=y
++CONFIG_CMD_FPGA_LOADP=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_SF=y
++CONFIG_CMD_USB=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_TFTPPUT=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_EXT4_WRITE=y
++CONFIG_ENV_IS_IN_SPI_FLASH=y
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_SPL_DM_SEQ_ALIAS=y
++CONFIG_DFU_MMC=y
++CONFIG_DFU_RAM=y
++CONFIG_FPGA_XILINX=y
++CONFIG_FPGA_ZYNQPL=y
++CONFIG_DM_GPIO=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_ZYNQ=y
++CONFIG_SPI_FLASH=y
++CONFIG_SPI_FLASH_BAR=y
++CONFIG_SPI_FLASH_SPANSION=y
++CONFIG_SPI_FLASH_STMICRO=y
++CONFIG_SPI_FLASH_WINBOND=y
++CONFIG_PHY_MARVELL=y
++CONFIG_PHY_REALTEK=y
++CONFIG_PHY_XILINX=y
++CONFIG_ZYNQ_GEM=y
++CONFIG_DEBUG_UART_ZYNQ=y
++CONFIG_DEBUG_UART_BASE=0xe0001000
++CONFIG_DEBUG_UART_CLOCK=50000000
++CONFIG_ZYNQ_SERIAL=y
++CONFIG_ZYNQ_QSPI=y
++CONFIG_USB=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_ULPI_VIEWPORT=y
++CONFIG_USB_ULPI=y
++CONFIG_USB_STORAGE=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
++CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
++CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
++CONFIG_CI_UDC=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_THOR=y
++CONFIG_OF_EMBED=y
+--
+2.7.4
+
diff --git a/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend
new file mode 100644
index 0000000..2fdbdb4
--- /dev/null
+++ b/meta-xilinx/meta-xilinx-contrib/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -0,0 +1,8 @@
+FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
+
+SRC_URI_append = " file://minized-u-boot.patch"
+
+HAS_PLATFORM_INIT_append = " \
+ zynq_minized_config \
+ "
+