Patrick Williams | c124f4f | 2015-09-15 14:41:29 -0500 | [diff] [blame] | 1 | List-Id: <gcc-patches.gcc.gnu.org> |
| 2 | List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> |
| 3 | List-Post: <mailto:gcc-patches at gcc dot gnu dot org> |
| 4 | List-Help: <mailto:gcc-patches-help at gcc dot gnu dot org> |
| 5 | Date: Mon, 20 Apr 2015 12:40:49 +0930 |
| 6 | From: Alan Modra <amodra at gmail dot com> |
| 7 | To: gcc-patches at gcc dot gnu dot org |
| 8 | Subject: [Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc |
| 9 | |
| 10 | This patch removes bogus debug info left around by shrink-wrapping, |
| 11 | which on some powerpc targets with just the right register allocation |
| 12 | led to assembly errors. |
| 13 | |
| 14 | Bootstrapped and regression tested powerpc64-linux and x86_64-linux. |
| 15 | |
| 16 | https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65779 |
| 17 | |
| 18 | gcc/ |
| 19 | PR debug/65779 |
| 20 | * shrink-wrap.c (insn_uses_reg): New function. |
| 21 | (move_insn_for_shrink_wrap): Remove debug insns using regs set |
| 22 | by the moved insn. |
| 23 | gcc/testsuite/ |
| 24 | * gcc.dg/pr65779.c: New. |
| 25 | |
| 26 | Upstream-Status: Pending (from mailing list, not merged yet) |
| 27 | |
| 28 | Index: a/gcc/shrink-wrap.c |
| 29 | =================================================================== |
| 30 | --- a/gcc/shrink-wrap.c.orig |
| 31 | +++ b/gcc/shrink-wrap.c |
| 32 | @@ -182,6 +182,21 @@ live_edge_for_reg (basic_block bb, int r |
| 33 | return live_edge; |
| 34 | } |
| 35 | |
| 36 | +static bool |
| 37 | +insn_uses_reg (rtx_insn *insn, unsigned int regno, unsigned int end_regno) |
| 38 | +{ |
| 39 | + df_ref use; |
| 40 | + |
| 41 | + FOR_EACH_INSN_USE (use, insn) |
| 42 | + { |
| 43 | + rtx reg = DF_REF_REG (use); |
| 44 | + |
| 45 | + if (REG_P (reg) && REGNO (reg) >= regno && REGNO (reg) < end_regno) |
| 46 | + return true; |
| 47 | + } |
| 48 | + return false; |
| 49 | +} |
| 50 | + |
| 51 | /* Try to move INSN from BB to a successor. Return true on success. |
| 52 | USES and DEFS are the set of registers that are used and defined |
| 53 | after INSN in BB. SPLIT_P indicates whether a live edge from BB |
| 54 | @@ -340,10 +355,15 @@ move_insn_for_shrink_wrap (basic_block b |
| 55 | *split_p = true; |
| 56 | } |
| 57 | |
| 58 | + vec<basic_block> live_bbs; |
| 59 | + if (MAY_HAVE_DEBUG_INSNS) |
| 60 | + live_bbs.create (5); |
| 61 | /* At this point we are committed to moving INSN, but let's try to |
| 62 | move it as far as we can. */ |
| 63 | do |
| 64 | { |
| 65 | + if (MAY_HAVE_DEBUG_INSNS) |
| 66 | + live_bbs.safe_push (bb); |
| 67 | live_out = df_get_live_out (bb); |
| 68 | live_in = df_get_live_in (next_block); |
| 69 | bb = next_block; |
| 70 | @@ -426,6 +446,34 @@ move_insn_for_shrink_wrap (basic_block b |
| 71 | SET_REGNO_REG_SET (bb_uses, i); |
| 72 | } |
| 73 | |
| 74 | + /* Remove debug insns using regs set by the insn we are moving. */ |
| 75 | + if (MAY_HAVE_DEBUG_INSNS) |
| 76 | + { |
| 77 | + while (!live_bbs.is_empty ()) |
| 78 | + { |
| 79 | + rtx_insn *dinsn; |
| 80 | + basic_block tmp_bb = live_bbs.pop (); |
| 81 | + |
| 82 | + FOR_BB_INSNS_REVERSE (tmp_bb, dinsn) |
| 83 | + { |
| 84 | + if (dinsn == insn) |
| 85 | + break; |
| 86 | + if (DEBUG_INSN_P (dinsn) |
| 87 | + && insn_uses_reg (dinsn, dregno, end_dregno)) |
| 88 | + { |
| 89 | + if (*split_p) |
| 90 | + /* If split, then we will be moving insn into a |
| 91 | + newly created block immediately after the entry |
| 92 | + block. Move the debug info there too. */ |
| 93 | + emit_debug_insn_after (PATTERN (dinsn), bb_note (bb)); |
| 94 | + delete_insn (dinsn); |
| 95 | + break; |
| 96 | + } |
| 97 | + } |
| 98 | + } |
| 99 | + live_bbs.release (); |
| 100 | + } |
| 101 | + |
| 102 | emit_insn_after (PATTERN (insn), bb_note (bb)); |
| 103 | delete_insn (insn); |
| 104 | return true; |
| 105 | Index: b/gcc/testsuite/gcc.dg/pr65779.c |
| 106 | =================================================================== |
| 107 | --- /dev/null |
| 108 | +++ b/gcc/testsuite/gcc.dg/pr65779.c |
| 109 | @@ -0,0 +1,64 @@ |
| 110 | +/* { dg-do run } */ |
| 111 | +/* { dg-options "-O2 -g" } */ |
| 112 | +/* { dg-additional-options "-mrelocatable" { target powerpc-*-rtems* } } */ |
| 113 | + |
| 114 | +unsigned long __attribute__ ((noinline)) |
| 115 | +adler32 (unsigned long adler, unsigned char *buf, unsigned int len) |
| 116 | +{ |
| 117 | + unsigned long s1 = adler & 0xffff; |
| 118 | + unsigned long s2 = (adler >> 16) & 0xffff; |
| 119 | + int k; |
| 120 | + |
| 121 | + if (buf == 0) |
| 122 | + return 1L; |
| 123 | + |
| 124 | + while (len > 0) |
| 125 | + { |
| 126 | + k = len < 5552 ? len : 5552; |
| 127 | + len -= k; |
| 128 | + while (k >= 16) |
| 129 | + { |
| 130 | + s1 += *buf++; s2 += s1; |
| 131 | + s1 += *buf++; s2 += s1; |
| 132 | + s1 += *buf++; s2 += s1; |
| 133 | + s1 += *buf++; s2 += s1; |
| 134 | + s1 += *buf++; s2 += s1; |
| 135 | + s1 += *buf++; s2 += s1; |
| 136 | + s1 += *buf++; s2 += s1; |
| 137 | + s1 += *buf++; s2 += s1; |
| 138 | + s1 += *buf++; s2 += s1; |
| 139 | + s1 += *buf++; s2 += s1; |
| 140 | + s1 += *buf++; s2 += s1; |
| 141 | + s1 += *buf++; s2 += s1; |
| 142 | + s1 += *buf++; s2 += s1; |
| 143 | + s1 += *buf++; s2 += s1; |
| 144 | + s1 += *buf++; s2 += s1; |
| 145 | + s1 += *buf++; s2 += s1; |
| 146 | + k -= 16; |
| 147 | + } |
| 148 | + if (k != 0) |
| 149 | + do |
| 150 | + { |
| 151 | + s1 += *buf++; s2 += s1; |
| 152 | + } while (--k); |
| 153 | + s1 &= 0xffffffffUL; |
| 154 | + s2 &= 0xffffffffUL; |
| 155 | + s1 %= 65521L; |
| 156 | + s2 %= 65521L; |
| 157 | + } |
| 158 | + return (s2 << 16) | s1; |
| 159 | +} |
| 160 | + |
| 161 | +unsigned char buf[] = { 0, 1, 2, 3, 4, 5, 6, 7, |
| 162 | + 8, 9, 10, 11, 12, 13, 14, 15, |
| 163 | + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, |
| 164 | + 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, |
| 165 | + 0x55, 0xaa }; |
| 166 | +int |
| 167 | +main () |
| 168 | +{ |
| 169 | + unsigned long x = adler32 (0, buf, sizeof buf); |
| 170 | + if (x != 0x640409efUL) |
| 171 | + __builtin_abort (); |
| 172 | + return 0; |
| 173 | +} |