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Patrick Williams92b42cb2022-09-03 06:53:57 -05001#
2# Copyright OpenEmbedded Contributors
3#
4# SPDX-License-Identifier: MIT
5#
6
7# This class exists to provide information about the targets that
8# may be needed by other classes and/or recipes. If you add a new
9# target this will probably need to be updated.
10
11#
12# Returns information about 'what' for the named target 'target'
13# where 'target' == "<arch>-<os>"
14#
15# 'what' can be one of
16# * target: Returns the target name ("<arch>-<os>")
17# * endianness: Return "be" for big endian targets, "le" for little endian
18# * bits: Returns the bit size of the target, either "32" or "64"
19# * libc: Returns the name of the c library used by the target
20#
21# It is an error for the target not to exist.
22# If 'what' doesn't exist then an empty value is returned
23#
24def siteinfo_data_for_machine(arch, os, d):
25 archinfo = {
26 "allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for allarch
27 "aarch64": "endian-little bit-64 arm-common arm-64",
28 "aarch64_be": "endian-big bit-64 arm-common arm-64",
29 "arc": "endian-little bit-32 arc-common",
30 "arceb": "endian-big bit-32 arc-common",
31 "arm": "endian-little bit-32 arm-common arm-32",
32 "armeb": "endian-big bit-32 arm-common arm-32",
33 "avr32": "endian-big bit-32 avr32-common",
34 "bfin": "endian-little bit-32 bfin-common",
35 "epiphany": "endian-little bit-32",
36 "i386": "endian-little bit-32 ix86-common",
37 "i486": "endian-little bit-32 ix86-common",
38 "i586": "endian-little bit-32 ix86-common",
39 "i686": "endian-little bit-32 ix86-common",
40 "ia64": "endian-little bit-64",
41 "lm32": "endian-big bit-32",
Patrick Williams864cc432023-02-09 14:54:44 -060042 "loongarch32": "endian-little bit-32 loongarch",
43 "loongarch64": "endian-little bit-64 loongarch",
Patrick Williams92b42cb2022-09-03 06:53:57 -050044 "m68k": "endian-big bit-32",
45 "microblaze": "endian-big bit-32 microblaze-common",
46 "microblazeel": "endian-little bit-32 microblaze-common",
47 "mips": "endian-big bit-32 mips-common",
48 "mips64": "endian-big bit-64 mips-common",
49 "mips64el": "endian-little bit-64 mips-common",
50 "mipsisa64r6": "endian-big bit-64 mips-common",
51 "mipsisa64r6el": "endian-little bit-64 mips-common",
52 "mipsel": "endian-little bit-32 mips-common",
53 "mipsisa32r6": "endian-big bit-32 mips-common",
54 "mipsisa32r6el": "endian-little bit-32 mips-common",
55 "powerpc": "endian-big bit-32 powerpc-common",
56 "powerpcle": "endian-little bit-32 powerpc-common",
57 "nios2": "endian-little bit-32 nios2-common",
58 "powerpc64": "endian-big bit-64 powerpc-common",
59 "powerpc64le": "endian-little bit-64 powerpc-common",
60 "ppc": "endian-big bit-32 powerpc-common",
61 "ppc64": "endian-big bit-64 powerpc-common",
62 "ppc64le" : "endian-little bit-64 powerpc-common",
63 "riscv32": "endian-little bit-32 riscv-common",
64 "riscv64": "endian-little bit-64 riscv-common",
65 "sh3": "endian-little bit-32 sh-common",
66 "sh3eb": "endian-big bit-32 sh-common",
67 "sh4": "endian-little bit-32 sh-common",
68 "sh4eb": "endian-big bit-32 sh-common",
69 "sparc": "endian-big bit-32",
70 "viac3": "endian-little bit-32 ix86-common",
71 "x86_64": "endian-little", # bitinfo specified in targetinfo
72 }
73 osinfo = {
74 "darwin": "common-darwin",
75 "darwin9": "common-darwin",
76 "linux": "common-linux common-glibc",
77 "linux-gnu": "common-linux common-glibc",
78 "linux-gnu_ilp32": "common-linux common-glibc",
79 "linux-gnux32": "common-linux common-glibc",
80 "linux-gnun32": "common-linux common-glibc",
81 "linux-gnueabi": "common-linux common-glibc",
82 "linux-gnuspe": "common-linux common-glibc",
83 "linux-musl": "common-linux common-musl",
84 "linux-muslx32": "common-linux common-musl",
85 "linux-musleabi": "common-linux common-musl",
86 "linux-muslspe": "common-linux common-musl",
87 "uclinux-uclibc": "common-uclibc",
88 "cygwin": "common-cygwin",
89 "mingw32": "common-mingw",
90 }
91 targetinfo = {
92 "aarch64-linux-gnu": "aarch64-linux",
93 "aarch64_be-linux-gnu": "aarch64_be-linux",
94 "aarch64-linux-gnu_ilp32": "bit-32 aarch64_be-linux arm-32",
95 "aarch64_be-linux-gnu_ilp32": "bit-32 aarch64_be-linux arm-32",
96 "aarch64-linux-musl": "aarch64-linux",
97 "aarch64_be-linux-musl": "aarch64_be-linux",
98 "arm-linux-gnueabi": "arm-linux",
99 "arm-linux-musleabi": "arm-linux",
100 "armeb-linux-gnueabi": "armeb-linux",
101 "armeb-linux-musleabi": "armeb-linux",
Patrick Williams864cc432023-02-09 14:54:44 -0600102 "loongarch32-linux": "loongarch32-linux",
103 "loongarch64-linux": "loongarch64-linux",
Patrick Williams92b42cb2022-09-03 06:53:57 -0500104 "microblazeel-linux" : "microblaze-linux",
105 "microblazeel-linux-musl" : "microblaze-linux",
106 "mips-linux-musl": "mips-linux",
107 "mipsel-linux-musl": "mipsel-linux",
108 "mips64-linux-musl": "mips64-linux",
109 "mips64el-linux-musl": "mips64el-linux",
110 "mips64-linux-gnun32": "mips-linux bit-32",
111 "mips64el-linux-gnun32": "mipsel-linux bit-32",
112 "mipsisa64r6-linux-gnun32": "mipsisa32r6-linux bit-32",
113 "mipsisa64r6el-linux-gnun32": "mipsisa32r6el-linux bit-32",
114 "powerpc-linux": "powerpc32-linux powerpc32-linux-glibc",
115 "powerpc-linux-musl": "powerpc-linux powerpc32-linux powerpc32-linux-musl",
116 "powerpcle-linux": "powerpc32-linux powerpc32-linux-glibc",
117 "powerpcle-linux-musl": "powerpc-linux powerpc32-linux powerpc32-linux-musl",
118 "powerpc-linux-gnuspe": "powerpc-linux powerpc32-linux powerpc32-linux-glibc",
119 "powerpc-linux-muslspe": "powerpc-linux powerpc32-linux powerpc32-linux-musl",
120 "powerpc64-linux-gnuspe": "powerpc-linux powerpc64-linux powerpc64-linux-glibc",
121 "powerpc64-linux-muslspe": "powerpc-linux powerpc64-linux powerpc64-linux-musl",
122 "powerpc64-linux": "powerpc-linux powerpc64-linux powerpc64-linux-glibc",
123 "powerpc64-linux-musl": "powerpc-linux powerpc64-linux powerpc64-linux-musl",
124 "powerpc64le-linux": "powerpc-linux powerpc64-linux powerpc64-linux-glibc",
125 "powerpc64le-linux-musl": "powerpc-linux powerpc64-linux powerpc64-linux-musl",
126 "riscv32-linux": "riscv32-linux",
127 "riscv32-linux-musl": "riscv32-linux",
128 "riscv64-linux": "riscv64-linux",
129 "riscv64-linux-musl": "riscv64-linux",
130 "x86_64-cygwin": "bit-64",
131 "x86_64-darwin": "bit-64",
132 "x86_64-darwin9": "bit-64",
133 "x86_64-linux": "bit-64",
134 "x86_64-linux-musl": "x86_64-linux bit-64",
135 "x86_64-linux-muslx32": "bit-32 ix86-common x32-linux",
136 "x86_64-elf": "bit-64",
137 "x86_64-linux-gnu": "bit-64 x86_64-linux",
138 "x86_64-linux-gnux32": "bit-32 ix86-common x32-linux",
139 "x86_64-mingw32": "bit-64",
140 }
141
142 # Add in any extra user supplied data which may come from a BSP layer, removing the
143 # need to always change this class directly
144 extra_siteinfo = (d.getVar("SITEINFO_EXTRA_DATAFUNCS") or "").split()
145 for m in extra_siteinfo:
146 call = m + "(archinfo, osinfo, targetinfo, d)"
147 locs = { "archinfo" : archinfo, "osinfo" : osinfo, "targetinfo" : targetinfo, "d" : d}
148 archinfo, osinfo, targetinfo = bb.utils.better_eval(call, locs)
149
150 target = "%s-%s" % (arch, os)
151
152 sitedata = []
153 if arch in archinfo:
154 sitedata.extend(archinfo[arch].split())
155 if os in osinfo:
156 sitedata.extend(osinfo[os].split())
157 if target in targetinfo:
158 sitedata.extend(targetinfo[target].split())
159 sitedata.append(target)
160 sitedata.append("common")
161
162 bb.debug(1, "SITE files %s" % sitedata);
163 return sitedata
164
165def siteinfo_data(d):
166 return siteinfo_data_for_machine(d.getVar("HOST_ARCH"), d.getVar("HOST_OS"), d)
167
168python () {
169 sitedata = set(siteinfo_data(d))
170 if "endian-little" in sitedata:
171 d.setVar("SITEINFO_ENDIANNESS", "le")
172 elif "endian-big" in sitedata:
173 d.setVar("SITEINFO_ENDIANNESS", "be")
174 else:
175 bb.error("Unable to determine endianness for architecture '%s'" %
176 d.getVar("HOST_ARCH"))
177 bb.fatal("Please add your architecture to siteinfo.bbclass")
178
179 if "bit-32" in sitedata:
180 d.setVar("SITEINFO_BITS", "32")
181 elif "bit-64" in sitedata:
182 d.setVar("SITEINFO_BITS", "64")
183 else:
184 bb.error("Unable to determine bit size for architecture '%s'" %
185 d.getVar("HOST_ARCH"))
186 bb.fatal("Please add your architecture to siteinfo.bbclass")
187}
188
189# Layers with siteconfig need to add a replacement path to this variable so the
190# sstate isn't path specific
191SITEINFO_PATHVARS = "COREBASE"
192
193def siteinfo_get_files(d, sysrootcache=False):
194 sitedata = siteinfo_data(d)
195 sitefiles = []
196 searched = []
197 for path in d.getVar("BBPATH").split(":"):
198 for element in sitedata:
199 filename = os.path.join(path, "site", element)
200 if os.path.exists(filename):
201 searched.append(filename + ":True")
202 sitefiles.append(filename)
203 else:
204 searched.append(filename + ":False")
205
206 # Have to parameterise out hardcoded paths such as COREBASE for the main site files
207 for var in d.getVar("SITEINFO_PATHVARS").split():
208 searched2 = []
209 replace = os.path.normpath(d.getVar(var))
210 for s in searched:
211 searched2.append(s.replace(replace, "${" + var + "}"))
212 searched = searched2
213
214 if bb.data.inherits_class('native', d) or bb.data.inherits_class('cross', d) or bb.data.inherits_class('crosssdk', d):
215 # We need sstate sigs for native/cross not to vary upon arch so we can't depend on the site files.
216 # In future we may want to depend upon all site files?
217 # This would show up as breaking sstatetests.SStateTests.test_sstate_32_64_same_hash for example
218 searched = []
219
220 if not sysrootcache:
221 return sitefiles, searched
222
223 # Now check for siteconfig cache files in sysroots
224 path_siteconfig = d.getVar('SITECONFIG_SYSROOTCACHE')
225 if path_siteconfig and os.path.isdir(path_siteconfig):
226 for i in os.listdir(path_siteconfig):
227 if not i.endswith("_config"):
228 continue
229 filename = os.path.join(path_siteconfig, i)
230 sitefiles.append(filename)
231 return sitefiles, searched
232
233#
234# Make some information available via variables
235#
236SITECONFIG_SYSROOTCACHE = "${STAGING_DATADIR}/${TARGET_SYS}_config_site.d"