blob: eaae566794496e750ca206cc1f99427a2c49a3a2 [file] [log] [blame]
Brad Bishop286d45c2018-10-02 15:21:57 -04001From e2a7a582945d24ede55393462a3360f377f45478 Mon Sep 17 00:00:00 2001
2From: Nathan Rossi <nathan@nathanrossi.com>
3Date: Sun, 5 Nov 2017 23:03:54 +1000
4Subject: [PATCH] MicroBlaze fix signed bit fields with bit field instructions
5
6The 'extv' definition is expected to sign extended the result based on
7the width of the bit field.
8
9 https://gcc.gnu.org/onlinedocs/gccint/Standard-Names.html#index-extvm-instruction-pattern
10
11The MicroBlaze 'bsefi' instruction does not sign extended, it zero
12extends. There is no option for the instruction to sign extended the
13result and no simple instruction or expression to implement a variant
14length sign extend (only sext8/sext16 instructions exist).
15
16As such these definitions needs to be changed to the zero extended
17variant of 'extv' which is 'extzv'. This change updates the existing
18definitions to allow for signed bit fields to function correctly and be
19sign extended.
20
21Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
22Upstream-Status: Pending
23---
24 gcc/config/microblaze/microblaze.md | 4 ++--
25 1 file changed, 2 insertions(+), 2 deletions(-)
26
27diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
28index ef53c3069e..b52be42d6e 100644
29--- a/gcc/config/microblaze/microblaze.md
30+++ b/gcc/config/microblaze/microblaze.md
31@@ -2476,7 +2476,7 @@
32 DONE;
33 }")
34
35-(define_expand "extvsi"
36+(define_expand "extzvsi"
37 [(set (match_operand:SI 0 "register_operand" "r")
38 (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
39 (match_operand:SI 2 "immediate_operand" "I")
40@@ -2485,7 +2485,7 @@
41 ""
42 )
43
44-(define_insn "extv_32"
45+(define_insn "extzv_32"
46 [(set (match_operand:SI 0 "register_operand" "=r")
47 (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
48 (match_operand:SI 2 "immediate_operand" "I")
49--
502.14.2
51