blob: 92f933b50f02153a3fc5c53a66cb859c0a53e3b2 [file] [log] [blame]
Jorge Cisneros8a445a02020-09-03 21:09:03 +00001/dts-v1/;
2/ {
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "HPE,GXP";
6 model = "GXP";
7
8 chosen {
9 bootargs = "earlyprintk console=ttyS0,115200 user_debug=31";
10 };
11
12 aliases {
13 };
14
15 memory@40000000 {
16 device_type = "memory";
17 reg = <0x40000000 0x20000000>;
18 };
19
20 ahb@80000000 {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 vic0: vic@ceff0000 {
27 compatible = "arm,pl192-vic";
28 interrupt-controller;
29 reg = <0xceff0000 0x1000>;
30 #interrupt-cells = <1>;
31 };
32
33 vic1: vic@80f00000 {
34 compatible = "arm,pl192-vic";
35 interrupt-controller;
36 reg = <0x80f00000 0x1000>;
37 #interrupt-cells = <1>;
38 };
39
40 timer0: timer@c0000080 {
41 compatible = "hpe,gxp-timer";
42 reg = <0xc0000080 0x1>, <0xc0000094 0x01>, <0xc0000088 0x08>;
43 interrupts = <0>;
44 interrupt-parent = <&vic0>;
45 clock-frequency = <400000000>;
46 };
Mike Garrett6d539b92021-08-27 16:50:20 -050047
Jorge Cisneros8a445a02020-09-03 21:09:03 +000048 watchdog: watchdog@c0000090 {
49 compatible = "hpe,gxp-wdt";
50 reg = <0xc0000090 0x02>, <0xc0000096 0x01>;
51 };
52
53 uartc: serial@c00000f0 {
54 compatible = "ns16550a";
55 reg = <0xc00000f0 0x8>;
56 interrupts = <19>;
57 interrupt-parent = <&vic0>;
58 clock-frequency = <1846153>;
59 reg-shift = <0>;
60 };
61
62 uarta: serial@c00000e0 {
63 compatible = "ns16550a";
64 reg = <0xc00000e0 0x8>;
65 interrupts = <17>;
66 interrupt-parent = <&vic0>;
67 clock-frequency = <1846153>;
68 reg-shift = <0>;
69 };
70
71 uartb: serial@c00000e8 {
72 compatible = "ns16550a";
73 reg = <0xc00000e8 0x8>;
74 interrupts = <18>;
75 interrupt-parent = <&vic0>;
76 clock-frequency = <1846153>;
77 reg-shift = <0>;
78 };
79
80 vuart_a_cfg: vuarta_cfg@80fc0230 {
81 compatible = "hpe,gxp-vuarta_cfg", "simple-mfd", "syscon";
82 reg = <0x80fc0230 0x100>;
83 reg-io-width = <1>;
84 };
Mike Garrett6d539b92021-08-27 16:50:20 -050085
Jorge Cisneros8a445a02020-09-03 21:09:03 +000086 vuart_a: vuart_a@80fd0200 {
87 compatible = "hpe,gxp-vuart";
88 reg = <0x80fd0200 0x100>;
89 interrupts = <2>;
90 interrupt-parent = <&vic1>;
91 clock-frequency = <1846153>;
92 reg-shift = <0>;
93 status = "okay";
94 serial-line = <3>;
95 vuart_cfg = <&vuart_a_cfg>;
96 };
Mike Garrett6d539b92021-08-27 16:50:20 -050097
98 usb0: ehci@cefe0000 {
99 compatible = "generic-ehci";
100 reg = <0xcefe0000 0x100>;
101 interrupts = <7>;
102 interrupt-parent = <&vic0>;
103 };
104
105 usb1: ohci@cefe0100 {
106 compatible = "generic-ohci";
107 reg = <0xcefe0100 0x110>;
108 interrupts = <6>;
109 interrupt-parent = <&vic0>;
110 };
111
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000112 spifi0: spifi@c0000200 {
113 compatible = "hpe,gxp-spifi";
114 reg = <0xc0000200 0x80>, <0xc000c000 0x100>, <0xf8000000 0x8000000>;
115 interrupts = <20>;
116 interrupt-parent = <&vic0>;
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 flash@0 {
121 compatible = "jedec,spi-nor";
122 reg = <0>;
123 partitions {
124 compatible = "fixed-partitions";
125 #address-cells = <1>;
126 #size-cells = <1>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500127
128 bmc@0 {
129 label = "bmc";
130 reg = <0x0 0x2000000>;
131 };
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000132 u-boot@0 {
133 label = "u-boot";
134 reg = <0x0 0x60000>;
135 };
136 u-boot-env@60000 {
137 label = "u-boot-env";
138 reg = <0x60000 0x20000>;
139 };
140 kernel@80000 {
141 label = "kernel";
142 reg = <0x80000 0x4c0000>;
143 };
144 rofs@540000 {
145 label = "rofs";
146 reg = <0x540000 0x1740000>;
147 };
148 rwfs@1c80000 {
149 label = "rwfs";
150 reg = <0x1c80000 0x250000>;
151 };
152 section@1edf000{
Mike Garrett6d539b92021-08-27 16:50:20 -0500153 label = "section";
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000154 reg = <0x1ed0000 0x130000>;
155 };
156 };
157 };
158
159 flash@1 {
160 compatible = "jedec,spi-nor";
161 reg = <1>;
162 partitions {
163 compatible = "fixed-partitions";
164 #address-cells = <1>;
165 #size-cells = <1>;
166 host-prime@0 {
167 label = "host-prime";
168 reg = <0x0 0x02000000>;
169 };
170 host-second@0 {
171 label = "host-second";
172 reg = <0x02000000 0x02000000>;
173 };
174 };
175 };
176 };
177
178 sram@d0000000 {
179 compatible = "mtd-ram";
180 reg = <0xd0000000 0x80000>;
181 bank-width = <1>;
182 erase-size =<1>;
183 partition@0 {
184 label = "host-reserved";
185 reg = <0x0 0x10000>;
186 };
187 partition@10000 {
188 label = "nvram";
189 reg = <0x10000 0x70000>;
190 };
191 };
192
193 srom@80fc0000 {
194 compatible = "hpe,gxp-srom", "simple-mfd", "syscon";
195 reg = <0x80fc0000 0x100>;
196 };
197
198 vrom@58000000 {
199 compatible = "mtd-ram";
200 bank-width = <4>;
201 reg = <0x58000000 0x4000000>;
202 #address-cells = <1>;
203 #size-cells = <1>;
204 partition@0 {
205 label = "vrom-prime";
206 reg = <0x0 0x2000000>;
207 };
208 partition@2000000 {
209 label = "vrom-second";
210 reg = <0x2000000 0x2000000>;
211 };
212 };
213
214 i2cg: i2cg@c00000f8 {
215 compatible = "syscon";
216 reg = <0xc00000f8 0x08>;
217 };
Mike Garrett6d539b92021-08-27 16:50:20 -0500218
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000219 i2c0: i2c@c0002000 {
220 compatible = "hpe,gxp-i2c";
221 reg = <0xc0002000 0x70>;
222 interrupts = <9>;
223 interrupt-parent = <&vic0>;
224 i2cg-handle = <&i2cg>;
225 #address-cells = <1>;
226 #size-cells = <0>;
227 };
228
229 i2c1: i2c@c0002100 {
230 compatible = "hpe,gxp-i2c";
231 reg = <0xc0002100 0x70>;
232 interrupts = <9>;
233 interrupt-parent = <&vic0>;
234 i2cg-handle = <&i2cg>;
235 #address-cells = <1>;
236 #size-cells = <0>;
237 };
238
239 i2c2: i2c@c0002200 {
240 compatible = "hpe,gxp-i2c";
241 reg = <0xc0002200 0x70>;
242 interrupts = <9>;
243 interrupt-parent = <&vic0>;
244 i2cg-handle = <&i2cg>;
245 #address-cells = <1>;
246 #size-cells = <0>;
247
Mike Garrett6d539b92021-08-27 16:50:20 -0500248 24c02@50 {
249 compatible = "atmel,24c02";
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000250 pagesize = <8>;
251 reg = <0x50>;
252 };
253 };
254
255 i2c3: i2c@c0002300 {
256 compatible = "hpe,gxp-i2c";
257 reg = <0xc0002300 0x70>;
258 interrupts = <9>;
259 interrupt-parent = <&vic0>;
260 i2cg-handle = <&i2cg>;
261 #address-cells = <1>;
262 #size-cells = <0>;
263 };
264
265 i2c4: i2c@c0002400 {
266 compatible = "hpe,gxp-i2c";
267 reg = <0xc0002400 0x70>;
268 interrupts = <9>;
269 interrupt-parent = <&vic0>;
270 i2cg-handle = <&i2cg>;
271 #address-cells = <1>;
272 #size-cells = <0>;
273 };
274
275 i2c5: i2c@c0002500 {
276 compatible = "hpe,gxp-i2c";
277 reg = <0xc0002500 0x70>;
278 interrupts = <9>;
279 interrupt-parent = <&vic0>;
280 i2cg-handle = <&i2cg>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000281 };
282
283 i2c6: i2c@c0002600 {
284 compatible = "hpe,gxp-i2c";
285 reg = <0xc0002600 0x70>;
286 interrupts = <9>;
287 interrupt-parent = <&vic0>;
288 i2cg-handle = <&i2cg>;
289 #address-cells = <1>;
290 #size-cells = <0>;
291 };
292
293 i2c7: i2c@c0002700 {
294 compatible = "hpe,gxp-i2c";
295 reg = <0xc0002700 0x70>;
296 interrupts = <9>;
297 interrupt-parent = <&vic0>;
298 i2cg-handle = <&i2cg>;
299 #address-cells = <1>;
300 #size-cells = <0>;
301
302 psu1: psu@58 {
303 compatible = "hpe,gxp-psu";
304 reg = <0x58>;
305 };
306
307 psu2: psu@59 {
308 compatible = "hpe,gxp-psu";
309 reg = <0x59>;
310 };
311 };
312
313 i2c8: i2c@c0002800 {
314 compatible = "hpe,gxp-i2c";
315 reg = <0xc0002800 0x70>;
316 interrupts = <9>;
317 interrupt-parent = <&vic0>;
318 i2cg-handle = <&i2cg>;
319 #address-cells = <1>;
320 #size-cells = <0>;
321 };
322
323 i2c9: i2c@c0002900 {
324 compatible = "hpe,gxp-i2c";
325 reg = <0xc0002900 0x70>;
326 interrupts = <9>;
327 interrupt-parent = <&vic0>;
328 i2cg-handle = <&i2cg>;
329 #address-cells = <1>;
330 #size-cells = <0>;
331 };
332
333 i2cmux@4 {
334 compatible = "i2c-mux-reg";
335 i2c-parent = <&i2c4>;
336 reg = <0xd1000374 1>;
337 #address-cells = <1>;
338 #size-cells = <0>;
339
340 i2c4@1 {
341 reg = <1>;
342 #address-cells = <1>;
343 #size-cells = <0>;
344 };
345
346 i2c4@3 {
347 reg = <3>;
348 #address-cells = <1>;
349 #size-cells = <0>;
350 };
351
352 i2c4@4 {
353 reg = <4>;
354 #address-cells = <1>;
355 #size-cells = <0>;
356 };
357 };
358
359 i2cmux@6 {
360 compatible = "i2c-mux-reg";
361 i2c-parent = <&i2c6>;
362 reg = <0xd1000376 1>;
363 #address-cells = <1>;
364 #size-cells = <0>;
365
366 i2c6@1 {
367 reg = <1>;
368 #address-cells = <1>;
369 #size-cells = <0>;
370 };
371
372 i2c6@2 {
373 reg = <2>;
374 #address-cells = <1>;
375 #size-cells = <0>;
376 };
377
378 i2c6@3 {
379 reg = <3>;
380 #address-cells = <1>;
381 #size-cells = <0>;
382 };
383
384 i2c6@4 {
385 reg = <4>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 };
389
390 i2c6@5 {
391 reg = <5>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394 };
395 };
396
397 mdio0: mdio@c0004080 {
398 compatible = "hpe,gxp-umac-mdio";
399 reg = <0xc0004080 0x10>;
400 #address-cells = <1>;
401 #size-cells = <0>;
402 ext_phy0: ethernt-phy@0 {
403 compatible = "marvell,88e1415","ethernet-phy-ieee802.3-c22";
404 phy-mode = "sgmii";
405 reg = <0>;
406 };
407 };
408
409 mdio1: mdio@c0005080 {
410 compatible = "hpe,gxp-umac-mdio";
411 reg = <0xc0005080 0x10>;
412 #address-cells = <1>;
413 #size-cells = <0>;
414 int_phy0: ethernt-phy@0 {
415 compatible = "ethernet-phy-ieee802.3-c22";
416 phy-mode = "gmii";
417 reg = <0>;
418 };
419 int_phy1: ethernt-phy@1 {
420 compatible = "ethernet-phy-ieee802.3-c22";
421 phy-mode = "gmii";
422 reg = <1>;
423 };
424 };
425
426 umac0: umac@c0004000 {
427 compatible = "hpe, gxp-umac";
428 reg = <0xc0004000 0x80>;
429 interrupts = <10>;
430 interrupt-parent = <&vic0>;
431 mac-address = [94 18 82 16 04 d8];
432 phy-handle = <&ext_phy0>;
433 int-phy-handle = <&int_phy0>;
434 };
435
436 umac1: umac@c0005000 {
437 compatible = "hpe, gxp-umac";
438 use-ncsi;
439 reg = <0xc0005000 0x80>;
440 interrupts = <11>;
441 interrupt-parent = <&vic0>;
442 mac-address = [94 18 82 16 04 d9];
443 phy-handle = <&int_phy1>;
444 };
445
446 kcs_conf: kcs_conf@80fc0430 {
447 compatible = "hpe,gxp-kcs-bmc-cfg", "simple-mfd", "syscon";
448 reg = <0x80fc0430 0x100>;
449 };
Mike Garrett6d539b92021-08-27 16:50:20 -0500450
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000451 kcs_reg: kcs_reg@080fd0400 {
452 compatible = "hpe,gxp-kcs-bmc";
453 reg = <0x80fd0400 0x8>;
454 interrupts = <6>;
455 interrupt-parent = <&vic1>;
456 kcs_chan = <1>;
457 status = "okay";
458 kcs-bmc-cfg = <&kcs_conf>;
459 };
460
461 thumbnail: thumbnail@c0000500 {
462 compatible = "hpe,gxp-thumbnail";
463 reg = <0xc0000500 0x20>;
464 bits-per-pixel = <32>;
465 width = <800>;
466 height = <600>;
467 };
468
Mike Garrett6d539b92021-08-27 16:50:20 -0500469 xreg: xreg@d1000300 {
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000470 compatible = "hpe,gxp-xreg", "simple-mfd", "syscon";
471 reg = <0xd1000300 0xFF>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500472 interrupts = <26>;
473 interrupt-parent = <&vic0>;
474 #gpio-cells = <2>;
475 gpio-line-names =
476 "", "", "", "", "", "", "POWER", "HEARTBEAT", "FAN1_INST", "FAN2_INST",
477 "FAN3_INST", "FAN4_INST", "FAN5_INST", "FAN6_INST", "FAN7_INST", "FAN8_INST", "FAN9_INST", "FAN10_INST", "FAN11_INST", "FAN12_INST",
478 "FAN13_INST", "FAN14_INST", "FAN15_INST", "FAN16_INST", "FAN1_FAIL", "FAN2_FAIL", "FAN3_FAIL", "FAN4_FAIL", "FAN5_FAIL", "FAN6_FAIL",
479 "FAN7_FAIL", "FAN8_FAIL", "FAN9_FAIL", "FAN10_FAIL", "FAN11_FAIL", "FAN12_FAIL", "FAN13_FAIL", "FAN14_FAIL", "FAN15_FAIL", "FAN16_FAIL",
480 "", "", "", "", "", "", "", "", "", "",
481 "", "", "", "", "", "", "IDENTIFY", "HEALTH_RED", "HEALTH_AMBER", "POWER_BUTTON",
482 "", "SIO_POWER_GOOD", "NMI_BUTTON", "RESET_BUTTON", "SIO_S5", "SIO_ONCONTROL", "", "", "", "",
483 "", "", "", "", "", "", "", "", "", "",
484 "", "", "", "", "", "", "", "", "", "",
485 "", "", "", "", "", "", "", "", "", "";
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000486 };
487
488 fanctrl: fanctrl@c1000c00 {
489 compatible = "hpe,gxp-fan-ctrl";
490 reg = <0xc1000c00 0x200>;
491 xreg_handle = <&xreg>;
492 fn2_handle = <&fn2>;
493 };
494
495 fn2: fn2@80200000 {
496 compatible = "hpe,gxp-fn2", "simple-mfd", "syscon";
497 reg = <0x80200000 0x100000>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500498 xreg_handle = <&xreg>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000499 interrupts = <0>;
500 interrupt-parent = <&vic1>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500501 #gpio-cells = <2>;
502 gpio-line-names =
503 "POWER_OUT", "PS_PWROK", "PCIERST", "POST_COMPLETE", "", "", "", "", "", "",
504 "", "", "", "", "", "", "", "", "", "",
505 "", "", "", "", "", "", "", "", "", "",
506 "", "", "", "", "", "", "", "", "", "",
507 "", "", "", "", "", "", "", "", "", "",
508 "", "", "", "", "", "", "", "", "", "",
509 "", "", "", "", "", "", "", "", "", "",
510 "", "", "", "", "", "", "", "", "", "",
511 "", "", "", "", "", "", "", "", "", "",
512 "", "", "", "", "", "", "", "", "", "";
513 chif {
514 compatible = "hpe,gxp-chif";
515 interrupts = <12>;
516 };
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000517 };
518
519 csm: csm@80000000 {
520 compatible = "hpe,gxp-csm", "simple-mfd", "syscon";
Mike Garrett6d539b92021-08-27 16:50:20 -0500521 reg = <0x80000000 0x400>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000522 };
523
Mike Garrett6d539b92021-08-27 16:50:20 -0500524 gpio: gpio@0 {
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000525 compatible = "hpe,gxp-gpio";
526 #gpio-cells = <2>;
527 csm_handle = <&csm>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000528 vuhc0_handle = <&vuhc0>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500529 gpio-line-names =
530 "", "", "", "", "", "", "", "", "", "",
531 "", "", "", "", "", "", "", "", "", "",
532 "", "", "", "", "", "", "", "", "", "",
533 "", "", "", "", "", "", "", "", "", "",
534 "", "", "", "", "", "", "", "", "", "",
535 "", "", "", "", "", "", "", "", "", "",
536 "", "", "", "", "", "", "", "", "", "",
537 "", "", "", "", "", "", "", "", "", "",
538 "", "", "", "", "", "", "", "", "", "",
539 "", "", "", "", "", "", "", "", "", "",
540 "", "", "", "", "", "", "", "", "", "",
541 "", "", "", "", "", "", "", "", "", "",
542 "", "", "", "", "", "", "", "", "", "",
543 "", "", "", "", "", "", "", "", "", "",
544 "", "", "", "", "", "", "", "", "", "",
545 "", "", "", "", "", "", "", "", "", "",
546 "", "", "", "", "", "", "", "", "", "",
547 "", "", "", "", "", "", "", "", "", "",
548 "", "", "", "", "", "", "", "", "", "",
549 "", "", "RESET_OUT", "NMI_OUT", "", "", "", "", "", "",
550 "", "", "", "", "", "", "", "", "", "",
551 "", "", "", "", "", "", "", "", "", "",
552 "", "", "", "", "", "", "", "", "", "",
553 "", "", "", "", "", "", "", "", "", "",
554 "", "", "", "", "", "", "", "", "", "",
555 "", "", "", "", "", "", "", "", "", "",
556 "", "", "", "", "", "", "", "", "", "",
557 "", "", "", "", "", "", "", "", "", "",
558 "", "", "", "", "", "", "", "", "", "",
559 "", "", "", "", "", "", "", "", "", "";
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000560 };
561
562 leds: leds {
563 compatible = "gpio-leds";
564
565 power {
Mike Garrett6d539b92021-08-27 16:50:20 -0500566 gpios = <&xreg 6 0>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000567 default-state = "off";
568 };
569
570 heartbeat {
Mike Garrett6d539b92021-08-27 16:50:20 -0500571 gpios = <&xreg 7 0>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000572 default-state = "off";
573 };
574
575 identify {
Mike Garrett6d539b92021-08-27 16:50:20 -0500576 gpios = <&xreg 56 0>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000577 default-state = "off";
578 };
579
580 health_red {
Mike Garrett6d539b92021-08-27 16:50:20 -0500581 gpios = <&xreg 57 0>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000582 default-state = "off";
583 };
584
585 health_amber {
Mike Garrett6d539b92021-08-27 16:50:20 -0500586 gpios = <&xreg 58 0>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000587 default-state = "off";
588 };
589 };
590
Mike Garrett6d539b92021-08-27 16:50:20 -0500591 xreg_kyes: xreg_keys {
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000592 compatible = "gpio-keys-polled";
593 poll-interval = <100>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000594
Mike Garrett6d539b92021-08-27 16:50:20 -0500595 IdButton {
596 label = "ID Button";
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000597 linux,code = <200>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500598 gpios = <&xreg 60 1>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000599 };
600 };
601
602 vuhc: vuhc {
603 compatible = "gpio-keys-polled";
604 poll-interval = <100>;
605
606 PortOwner@0 {
607 label = "Port Owner";
608 linux,code = <200>;
609 gpios = <&gpio 250 1>;
610 };
611
612 PortOwner@1 {
613 label = "Port Owner";
614 linux,code = <201>;
615 gpios = <&gpio 251 1>;
616 };
Mike Garrett6d539b92021-08-27 16:50:20 -0500617
618 PortOwner@2 {
619 label = "Port Owner";
620 linux,code = <202>;
621 gpios = <&gpio 252 1>;
622 };
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000623 };
624
625 vuhc0: vuhc@80400080 {
626 compatible = "syscon";
627 reg = <0x80400000 0x80>;
628 };
629
630 udcg: udcg@80400800 {
631 compatible = "syscon";
632 reg = <0x80400800 0x200>;
633 };
634
635 udc0: udc@80401000 {
636 compatible = "hpe, gxp-udc";
637 reg = <0x80401000 0x1000>;
638 interrupts = <13>;
639 interrupt-parent = <&vic1>;
640 vdevnum = <0>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500641 fepnum = <4>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000642 udcg-handle = <&udcg>;
643 };
644
645 udc1: udc@80402000 {
646 compatible = "hpe, gxp-udc";
647 reg = <0x80402000 0x1000>;
648 interrupts = <13>;
649 interrupt-parent = <&vic1>;
650 vdevnum = <1>;
Mike Garrett6d539b92021-08-27 16:50:20 -0500651 fepnum = <4>;
652 udcg-handle = <&udcg>;
653 };
654
655 udc2: udc@80403000 {
656 compatible = "hpe, gxp-udc";
657 reg = <0x80403000 0x1000>;
658 interrupts = <13>;
659 interrupt-parent = <&vic1>;
660 vdevnum = <2>;
661 fepnum = <4>;
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000662 udcg-handle = <&udcg>;
663 };
664
665 coretemp: coretemp@c0000130 {
666 compatible = "hpe,gxp-coretemp";
667 reg = <0xc0000130 0x8>;
668 };
669
670 syspower: syspower {
671 compatible = "hpe,gxp-power";
672 psu_phandle = <&psu1>, <&psu2>;
673 };
Mike Garrett6d539b92021-08-27 16:50:20 -0500674
675 peci: peci@80000400 {
676 compatible = "hpe,gxp-peci";
677 reg = <0x80000400 0x200>;
678 interrupts = <22>;
679 interrupt-parent = <&vic1>;
680 };
Jorge Cisneros8a445a02020-09-03 21:09:03 +0000681 };
682
683 clocks {
684 osc: osc {
685 compatible = "fixed-clock";
686 #clock-cells = <0>;
687 clock-output-names = "osc";
688 clock-frequency = <33333333>;
689 };
690
691 iopclk: iopclk {
692 compatible = "fixed-clock";
693 #clock-cells = <0>;
694 clocks = <&osc>;
695 clock-out-put-names = "iopclk";
696 clock-frequency = <400000000>;
697 };
698
699 memclk: memclk {
700 compatible = "fixed-clock";
701 #clock-cells = <0>;
702 clocks = <&osc>;
703 clock-out-put-names = "memclk";
704 clock-frequency = <800000000>;
705 };
706 };
707};