blob: c11ccb023af424c7a36bc25f06cc872bc6200ddb [file] [log] [blame]
Jorge Cisneros8a445a02020-09-03 21:09:03 +00001/dts-v1/;
2/ {
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "HPE,GXP";
6 model = "GXP";
7
8 chosen {
9 bootargs = "earlyprintk console=ttyS0,115200 user_debug=31";
10 };
11
12 aliases {
13 };
14
15 memory@40000000 {
16 device_type = "memory";
17 reg = <0x40000000 0x20000000>;
18 };
19
20 ahb@80000000 {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 vic0: vic@ceff0000 {
27 compatible = "arm,pl192-vic";
28 interrupt-controller;
29 reg = <0xceff0000 0x1000>;
30 #interrupt-cells = <1>;
31 };
32
33 vic1: vic@80f00000 {
34 compatible = "arm,pl192-vic";
35 interrupt-controller;
36 reg = <0x80f00000 0x1000>;
37 #interrupt-cells = <1>;
38 };
39
40 timer0: timer@c0000080 {
41 compatible = "hpe,gxp-timer";
42 reg = <0xc0000080 0x1>, <0xc0000094 0x01>, <0xc0000088 0x08>;
43 interrupts = <0>;
44 interrupt-parent = <&vic0>;
45 clock-frequency = <400000000>;
46 };
47
48 watchdog: watchdog@c0000090 {
49 compatible = "hpe,gxp-wdt";
50 reg = <0xc0000090 0x02>, <0xc0000096 0x01>;
51 };
52
53 uartc: serial@c00000f0 {
54 compatible = "ns16550a";
55 reg = <0xc00000f0 0x8>;
56 interrupts = <19>;
57 interrupt-parent = <&vic0>;
58 clock-frequency = <1846153>;
59 reg-shift = <0>;
60 };
61
62 uarta: serial@c00000e0 {
63 compatible = "ns16550a";
64 reg = <0xc00000e0 0x8>;
65 interrupts = <17>;
66 interrupt-parent = <&vic0>;
67 clock-frequency = <1846153>;
68 reg-shift = <0>;
69 };
70
71 uartb: serial@c00000e8 {
72 compatible = "ns16550a";
73 reg = <0xc00000e8 0x8>;
74 interrupts = <18>;
75 interrupt-parent = <&vic0>;
76 clock-frequency = <1846153>;
77 reg-shift = <0>;
78 };
79
80 vuart_a_cfg: vuarta_cfg@80fc0230 {
81 compatible = "hpe,gxp-vuarta_cfg", "simple-mfd", "syscon";
82 reg = <0x80fc0230 0x100>;
83 reg-io-width = <1>;
84 };
85
86 vuart_a: vuart_a@80fd0200 {
87 compatible = "hpe,gxp-vuart";
88 reg = <0x80fd0200 0x100>;
89 interrupts = <2>;
90 interrupt-parent = <&vic1>;
91 clock-frequency = <1846153>;
92 reg-shift = <0>;
93 status = "okay";
94 serial-line = <3>;
95 vuart_cfg = <&vuart_a_cfg>;
96 };
97
98 spifi0: spifi@c0000200 {
99 compatible = "hpe,gxp-spifi";
100 reg = <0xc0000200 0x80>, <0xc000c000 0x100>, <0xf8000000 0x8000000>;
101 interrupts = <20>;
102 interrupt-parent = <&vic0>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 flash@0 {
107 compatible = "jedec,spi-nor";
108 reg = <0>;
109 partitions {
110 compatible = "fixed-partitions";
111 #address-cells = <1>;
112 #size-cells = <1>;
113
114 u-boot@0 {
115 label = "u-boot";
116 reg = <0x0 0x60000>;
117 };
118 u-boot-env@60000 {
119 label = "u-boot-env";
120 reg = <0x60000 0x20000>;
121 };
122 kernel@80000 {
123 label = "kernel";
124 reg = <0x80000 0x4c0000>;
125 };
126 rofs@540000 {
127 label = "rofs";
128 reg = <0x540000 0x1740000>;
129 };
130 rwfs@1c80000 {
131 label = "rwfs";
132 reg = <0x1c80000 0x250000>;
133 };
134 section@1edf000{
135 labele = "section";
136 reg = <0x1ed0000 0x130000>;
137 };
138 };
139 };
140
141 flash@1 {
142 compatible = "jedec,spi-nor";
143 reg = <1>;
144 partitions {
145 compatible = "fixed-partitions";
146 #address-cells = <1>;
147 #size-cells = <1>;
148 host-prime@0 {
149 label = "host-prime";
150 reg = <0x0 0x02000000>;
151 };
152 host-second@0 {
153 label = "host-second";
154 reg = <0x02000000 0x02000000>;
155 };
156 };
157 };
158 };
159
160 sram@d0000000 {
161 compatible = "mtd-ram";
162 reg = <0xd0000000 0x80000>;
163 bank-width = <1>;
164 erase-size =<1>;
165 partition@0 {
166 label = "host-reserved";
167 reg = <0x0 0x10000>;
168 };
169 partition@10000 {
170 label = "nvram";
171 reg = <0x10000 0x70000>;
172 };
173 };
174
175 srom@80fc0000 {
176 compatible = "hpe,gxp-srom", "simple-mfd", "syscon";
177 reg = <0x80fc0000 0x100>;
178 };
179
180 vrom@58000000 {
181 compatible = "mtd-ram";
182 bank-width = <4>;
183 reg = <0x58000000 0x4000000>;
184 #address-cells = <1>;
185 #size-cells = <1>;
186 partition@0 {
187 label = "vrom-prime";
188 reg = <0x0 0x2000000>;
189 };
190 partition@2000000 {
191 label = "vrom-second";
192 reg = <0x2000000 0x2000000>;
193 };
194 };
195
196 i2cg: i2cg@c00000f8 {
197 compatible = "syscon";
198 reg = <0xc00000f8 0x08>;
199 };
200
201 i2c0: i2c@c0002000 {
202 compatible = "hpe,gxp-i2c";
203 reg = <0xc0002000 0x70>;
204 interrupts = <9>;
205 interrupt-parent = <&vic0>;
206 i2cg-handle = <&i2cg>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 };
210
211 i2c1: i2c@c0002100 {
212 compatible = "hpe,gxp-i2c";
213 reg = <0xc0002100 0x70>;
214 interrupts = <9>;
215 interrupt-parent = <&vic0>;
216 i2cg-handle = <&i2cg>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 };
220
221 i2c2: i2c@c0002200 {
222 compatible = "hpe,gxp-i2c";
223 reg = <0xc0002200 0x70>;
224 interrupts = <9>;
225 interrupt-parent = <&vic0>;
226 i2cg-handle = <&i2cg>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229
230 at24c02@50 {
231 compatible = "at24,24c02";
232 pagesize = <8>;
233 reg = <0x50>;
234 };
235 };
236
237 i2c3: i2c@c0002300 {
238 compatible = "hpe,gxp-i2c";
239 reg = <0xc0002300 0x70>;
240 interrupts = <9>;
241 interrupt-parent = <&vic0>;
242 i2cg-handle = <&i2cg>;
243 #address-cells = <1>;
244 #size-cells = <0>;
245 };
246
247 i2c4: i2c@c0002400 {
248 compatible = "hpe,gxp-i2c";
249 reg = <0xc0002400 0x70>;
250 interrupts = <9>;
251 interrupt-parent = <&vic0>;
252 i2cg-handle = <&i2cg>;
253 #address-cells = <1>;
254 #size-cells = <0>;
255 };
256
257 i2c5: i2c@c0002500 {
258 compatible = "hpe,gxp-i2c";
259 reg = <0xc0002500 0x70>;
260 interrupts = <9>;
261 interrupt-parent = <&vic0>;
262 i2cg-handle = <&i2cg>;
263 #address-cells = <1>;
264 #size-cells = <0>;
265
266 emc1402@4c {
267 compatible = "emc1402";
268 reg = <0x4c>;
269 };
270
271 emc1404@1c {
272 compatible = "emc1404";
273 reg = <0x1c>;
274 };
275 };
276
277 i2c6: i2c@c0002600 {
278 compatible = "hpe,gxp-i2c";
279 reg = <0xc0002600 0x70>;
280 interrupts = <9>;
281 interrupt-parent = <&vic0>;
282 i2cg-handle = <&i2cg>;
283 #address-cells = <1>;
284 #size-cells = <0>;
285 };
286
287 i2c7: i2c@c0002700 {
288 compatible = "hpe,gxp-i2c";
289 reg = <0xc0002700 0x70>;
290 interrupts = <9>;
291 interrupt-parent = <&vic0>;
292 i2cg-handle = <&i2cg>;
293 #address-cells = <1>;
294 #size-cells = <0>;
295
296 psu1: psu@58 {
297 compatible = "hpe,gxp-psu";
298 reg = <0x58>;
299 };
300
301 psu2: psu@59 {
302 compatible = "hpe,gxp-psu";
303 reg = <0x59>;
304 };
305 };
306
307 i2c8: i2c@c0002800 {
308 compatible = "hpe,gxp-i2c";
309 reg = <0xc0002800 0x70>;
310 interrupts = <9>;
311 interrupt-parent = <&vic0>;
312 i2cg-handle = <&i2cg>;
313 #address-cells = <1>;
314 #size-cells = <0>;
315 };
316
317 i2c9: i2c@c0002900 {
318 compatible = "hpe,gxp-i2c";
319 reg = <0xc0002900 0x70>;
320 interrupts = <9>;
321 interrupt-parent = <&vic0>;
322 i2cg-handle = <&i2cg>;
323 #address-cells = <1>;
324 #size-cells = <0>;
325 };
326
327 i2cmux@4 {
328 compatible = "i2c-mux-reg";
329 i2c-parent = <&i2c4>;
330 reg = <0xd1000374 1>;
331 #address-cells = <1>;
332 #size-cells = <0>;
333
334 i2c4@1 {
335 reg = <1>;
336 #address-cells = <1>;
337 #size-cells = <0>;
338 };
339
340 i2c4@3 {
341 reg = <3>;
342 #address-cells = <1>;
343 #size-cells = <0>;
344 };
345
346 i2c4@4 {
347 reg = <4>;
348 #address-cells = <1>;
349 #size-cells = <0>;
350 };
351 };
352
353 i2cmux@6 {
354 compatible = "i2c-mux-reg";
355 i2c-parent = <&i2c6>;
356 reg = <0xd1000376 1>;
357 #address-cells = <1>;
358 #size-cells = <0>;
359
360 i2c6@1 {
361 reg = <1>;
362 #address-cells = <1>;
363 #size-cells = <0>;
364 };
365
366 i2c6@2 {
367 reg = <2>;
368 #address-cells = <1>;
369 #size-cells = <0>;
370 };
371
372 i2c6@3 {
373 reg = <3>;
374 #address-cells = <1>;
375 #size-cells = <0>;
376 };
377
378 i2c6@4 {
379 reg = <4>;
380 #address-cells = <1>;
381 #size-cells = <0>;
382 };
383
384 i2c6@5 {
385 reg = <5>;
386 #address-cells = <1>;
387 #size-cells = <0>;
388 };
389 };
390
391 mdio0: mdio@c0004080 {
392 compatible = "hpe,gxp-umac-mdio";
393 reg = <0xc0004080 0x10>;
394 #address-cells = <1>;
395 #size-cells = <0>;
396 ext_phy0: ethernt-phy@0 {
397 compatible = "marvell,88e1415","ethernet-phy-ieee802.3-c22";
398 phy-mode = "sgmii";
399 reg = <0>;
400 };
401 };
402
403 mdio1: mdio@c0005080 {
404 compatible = "hpe,gxp-umac-mdio";
405 reg = <0xc0005080 0x10>;
406 #address-cells = <1>;
407 #size-cells = <0>;
408 int_phy0: ethernt-phy@0 {
409 compatible = "ethernet-phy-ieee802.3-c22";
410 phy-mode = "gmii";
411 reg = <0>;
412 };
413 int_phy1: ethernt-phy@1 {
414 compatible = "ethernet-phy-ieee802.3-c22";
415 phy-mode = "gmii";
416 reg = <1>;
417 };
418 };
419
420 umac0: umac@c0004000 {
421 compatible = "hpe, gxp-umac";
422 reg = <0xc0004000 0x80>;
423 interrupts = <10>;
424 interrupt-parent = <&vic0>;
425 mac-address = [94 18 82 16 04 d8];
426 phy-handle = <&ext_phy0>;
427 int-phy-handle = <&int_phy0>;
428 };
429
430 umac1: umac@c0005000 {
431 compatible = "hpe, gxp-umac";
432 use-ncsi;
433 reg = <0xc0005000 0x80>;
434 interrupts = <11>;
435 interrupt-parent = <&vic0>;
436 mac-address = [94 18 82 16 04 d9];
437 phy-handle = <&int_phy1>;
438 };
439
440 kcs_conf: kcs_conf@80fc0430 {
441 compatible = "hpe,gxp-kcs-bmc-cfg", "simple-mfd", "syscon";
442 reg = <0x80fc0430 0x100>;
443 };
444
445 kcs_reg: kcs_reg@080fd0400 {
446 compatible = "hpe,gxp-kcs-bmc";
447 reg = <0x80fd0400 0x8>;
448 interrupts = <6>;
449 interrupt-parent = <&vic1>;
450 kcs_chan = <1>;
451 status = "okay";
452 kcs-bmc-cfg = <&kcs_conf>;
453 };
454
455 thumbnail: thumbnail@c0000500 {
456 compatible = "hpe,gxp-thumbnail";
457 reg = <0xc0000500 0x20>;
458 bits-per-pixel = <32>;
459 width = <800>;
460 height = <600>;
461 };
462
463 xreg: xreg@d1000000 {
464 compatible = "hpe,gxp-xreg", "simple-mfd", "syscon";
465 reg = <0xd1000300 0xFF>;
466 };
467
468 fanctrl: fanctrl@c1000c00 {
469 compatible = "hpe,gxp-fan-ctrl";
470 reg = <0xc1000c00 0x200>;
471 xreg_handle = <&xreg>;
472 fn2_handle = <&fn2>;
473 };
474
475 fn2: fn2@80200000 {
476 compatible = "hpe,gxp-fn2", "simple-mfd", "syscon";
477 reg = <0x80200000 0x100000>;
478 interrupts = <0>;
479 interrupt-parent = <&vic1>;
480 };
481
482 csm: csm@80000000 {
483 compatible = "hpe,gxp-csm", "simple-mfd", "syscon";
484 reg = <0x80000000 0x100000>;
485 };
486
487 gpio: gpio {
488 compatible = "hpe,gxp-gpio";
489 #gpio-cells = <2>;
490 csm_handle = <&csm>;
491 fn2_handle = <&fn2>;
492 xreg_handle = <&xreg>;
493 vuhc0_handle = <&vuhc0>;
494 interrupts = <26>;
495 interrupt-parent = <&vic0>;
496 };
497
498 leds: leds {
499 compatible = "gpio-leds";
500
501 power {
502 gpios = <&gpio 306 0>;
503 default-state = "off";
504 };
505
506 heartbeat {
507 gpios = <&gpio 307 0>;
508 default-state = "off";
509 };
510
511 identify {
512 gpios = <&gpio 356 0>;
513 default-state = "off";
514 };
515
516 health_red {
517 gpios = <&gpio 357 0>;
518 default-state = "off";
519 };
520
521 health_amber {
522 gpios = <&gpio 358 0>;
523 default-state = "off";
524 };
525 };
526
527 presence: presence {
528 compatible = "gpio-keys-polled";
529 poll-interval = <100>;
530 autorepeat;
531
532 fan1 {
533 label = "fan1 presence";
534 linux,code = <200>;
535 gpios = <&gpio 308 0>;
536 };
537
538 fan2 {
539 label = "fan2 presence";
540 linux,code = <201>;
541 gpios = <&gpio 309 0>;
542 };
543
544 fan3 {
545 label = "fan3 presence";
546 linux,code = <202>;
547 gpios = <&gpio 310 0>;
548 };
549
550 fan4 {
551 label = "fan4 presence";
552 linux,code = <203>;
553 gpios = <&gpio 311 0>;
554 };
555
556 fan5 {
557 label = "fan5 presence";
558 linux,code = <204>;
559 gpios = <&gpio 312 0>;
560 };
561
562 fan6 {
563 label = "fan6 presence";
564 linux,code = <205>;
565 gpios = <&gpio 313 0>;
566 };
567
568 fan7 {
569 label = "fan7 presence";
570 linux,code = <206>;
571 gpios = <&gpio 314 0>;
572 };
573
574 fan8 {
575 label = "fan8 presence";
576 linux,code = <207>;
577 gpios = <&gpio 315 0>;
578 };
579
580 fan9 {
581 label = "fan9 presence";
582 linux,code = <208>;
583 gpios = <&gpio 316 0>;
584 };
585
586 fan10 {
587 label = "fan10 presence";
588 linux,code = <209>;
589 gpios = <&gpio 317 0>;
590 };
591
592 fan11 {
593 label = "fan11 presence";
594 linux,code = <210>;
595 gpios = <&gpio 318 0>;
596 };
597
598 fan12 {
599 label = "fan12 presence";
600 linux,code = <211>;
601 gpios = <&gpio 319 0>;
602 };
603
604 fan13 {
605 label = "fan13 presence";
606 linux,code = <212>;
607 gpios = <&gpio 320 0>;
608 };
609
610 fan14 {
611 label = "fan14 presence";
612 linux,code = <213>;
613 gpios = <&gpio 321 0>;
614 };
615
616 fan15 {
617 label = "fan15 presence";
618 linux,code = <214>;
619 gpios = <&gpio 322 0>;
620 };
621
622 fan16 {
623 label = "fan16 presence";
624 linux,code = <215>;
625 gpios = <&gpio 323 0>;
626 };
627 };
628
629 vuhc: vuhc {
630 compatible = "gpio-keys-polled";
631 poll-interval = <100>;
632
633 PortOwner@0 {
634 label = "Port Owner";
635 linux,code = <200>;
636 gpios = <&gpio 250 1>;
637 };
638
639 PortOwner@1 {
640 label = "Port Owner";
641 linux,code = <201>;
642 gpios = <&gpio 251 1>;
643 };
644 };
645
646 vuhc0: vuhc@80400080 {
647 compatible = "syscon";
648 reg = <0x80400000 0x80>;
649 };
650
651 udcg: udcg@80400800 {
652 compatible = "syscon";
653 reg = <0x80400800 0x200>;
654 };
655
656 udc0: udc@80401000 {
657 compatible = "hpe, gxp-udc";
658 reg = <0x80401000 0x1000>;
659 interrupts = <13>;
660 interrupt-parent = <&vic1>;
661 vdevnum = <0>;
662 fepnum = <7>;
663 udcg-handle = <&udcg>;
664 };
665
666 udc1: udc@80402000 {
667 compatible = "hpe, gxp-udc";
668 reg = <0x80402000 0x1000>;
669 interrupts = <13>;
670 interrupt-parent = <&vic1>;
671 vdevnum = <1>;
672 fepnum = <7>;
673 udcg-handle = <&udcg>;
674 };
675
676 coretemp: coretemp@c0000130 {
677 compatible = "hpe,gxp-coretemp";
678 reg = <0xc0000130 0x8>;
679 };
680
681 syspower: syspower {
682 compatible = "hpe,gxp-power";
683 psu_phandle = <&psu1>, <&psu2>;
684 };
685 };
686
687 clocks {
688 osc: osc {
689 compatible = "fixed-clock";
690 #clock-cells = <0>;
691 clock-output-names = "osc";
692 clock-frequency = <33333333>;
693 };
694
695 iopclk: iopclk {
696 compatible = "fixed-clock";
697 #clock-cells = <0>;
698 clocks = <&osc>;
699 clock-out-put-names = "iopclk";
700 clock-frequency = <400000000>;
701 };
702
703 memclk: memclk {
704 compatible = "fixed-clock";
705 #clock-cells = <0>;
706 clocks = <&osc>;
707 clock-out-put-names = "memclk";
708 clock-frequency = <800000000>;
709 };
710 };
711};