blob: 4495f397bd3e06392e2f3e9e9ff81764b3e6239c [file] [log] [blame]
Patrick Williamsb9af8752023-01-30 13:28:01 -06001From bd354219987dddbf8ab6fd11450b4046547aca1b Mon Sep 17 00:00:00 2001
Andrew Geisslerea144b02023-01-27 16:03:57 -06002From: James Clark <james.clark@arm.com>
3Date: Thu, 17 Nov 2022 10:25:36 +0000
4Subject: [PATCH] arm64: dts: fvp: Add SPE to Foundation FVP
5
6Add SPE DT node to FVP model. If the model doesn't support SPE (e.g.,
7turned off via parameter), the driver will skip the initialisation
8accordingly and thus is safe.
9
10Signed-off-by: James Clark <james.clark@arm.com>
11Link: https://lore.kernel.org/r/20221117102536.237515-1-james.clark@arm.com
12Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
13
14Signed-off-by: Jon Mason <jon.mason@arm.com>
15Upstream-Status: Backport
16---
17 arch/arm64/boot/dts/arm/foundation-v8.dtsi | 5 +++++
18 1 file changed, 5 insertions(+)
19
20diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
21index c8bd23b1a7ba..029578072d8f 100644
22--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
23+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
24@@ -85,6 +85,11 @@ pmu {
25 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
26 };
27
28+ spe-pmu {
29+ compatible = "arm,statistical-profiling-extension-v1";
30+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
31+ };
32+
33 watchdog@2a440000 {
34 compatible = "arm,sbsa-gwdt";
35 reg = <0x0 0x2a440000 0 0x1000>,