| Delphine CC Chiu | 177e987 | 2023-09-22 10:30:23 +0800 | [diff] [blame] | 1 | #!/bin/bash -e |
| 2 | # shellcheck source=meta-facebook/meta-yosemite4/recipes-yosemite4/plat-tool/files/yosemite4-common-functions |
| 3 | source /usr/libexec/yosemite4-common-functions |
| 4 | |
| Eric | a29bca5 | 2023-12-05 10:27:41 +0800 | [diff] [blame^] | 5 | # probe devices behind mux for management board cpld |
| 6 | |
| 7 | rev_id_gpiochip=$(basename "/sys/bus/i2c/devices/13-0020/"*gpiochip*) |
| 8 | rev_id_bit0=$(gpioget "$rev_id_gpiochip" 0) |
| 9 | rev_id_bit1=$(gpioget "$rev_id_gpiochip" 1) |
| 10 | rev_id_bit2=$(gpioget "$rev_id_gpiochip" 2) |
| 11 | rev_id_bit3=$(gpioget "$rev_id_gpiochip" 3) |
| 12 | |
| 13 | # Default devicetree was set for EVT and later, only POC will do following manual devices' probing |
| 14 | if [ "$rev_id_bit0" -eq 0 ] && [ "$rev_id_bit1" -eq 0 ] && [ "$rev_id_bit2" -eq 0 ] && [ "$rev_id_bit3" -eq 0 ] |
| 15 | then |
| 16 | echo 24c128 "0x50" > /sys/bus/i2c/devices/i2c-12/new_device |
| 17 | echo 24c64 "0x54" > /sys/bus/i2c/devices/i2c-12/new_device |
| 18 | echo tmp75 "0x48" > /sys/bus/i2c/devices/i2c-12/new_device |
| 19 | echo nct3018y "0x6f" > /sys/bus/i2c/devices/i2c-12/new_device |
| 20 | fi |
| 21 | |
| Delphine CC Chiu | 177e987 | 2023-09-22 10:30:23 +0800 | [diff] [blame] | 22 | # set initial value for GPIO output pins |
| 23 | set_gpio EN_P5V_USB_CPLD_R 1 |
| 24 | set_gpio EN_NIC0_POWER_BMC_R 1 |
| 25 | set_gpio EN_NIC1_POWER_BMC_R 1 |
| 26 | set_gpio EN_NIC2_POWER_BMC_R 1 |
| 27 | set_gpio EN_NIC3_POWER_BMC_R 1 |
| 28 | set_gpio FM_BMC_RTCRST_R 0 |
| 29 | set_gpio RST_USB_HUB_R_N 1 |
| 30 | set_gpio FM_BMC_READY_R2 1 |
| 31 | set_gpio SPI_LOCK_REQ_BMC_N 1 |
| 32 | set_gpio EN_P3V_BAT_SCALED_R 0 |
| 33 | |
| 34 | set_gpio P48V_OCP_GPIO1 0 |
| 35 | set_gpio P48V_OCP_GPIO2 0 |
| 36 | set_gpio P48V_OCP_GPIO3 0 |
| 37 | set_gpio RST_MUX_R_N 1 |
| 38 | set_gpio RST_LED_CONTROL_FAN_BOARD_0_N 1 |
| 39 | set_gpio RST_LED_CONTROL_FAN_BOARD_1_N 1 |
| 40 | set_gpio RST_IOEXP_FAN_BOARD_0_N 1 |
| 41 | set_gpio RST_IOEXP_FAN_BOARD_1_N 1 |
| 42 | set_gpio EN_P48V_AUX_0 1 |
| 43 | set_gpio EN_P48V_AUX_1 1 |
| 44 | set_gpio HSC_OCP_SLOT_ODD_GPIO1 0 |
| 45 | set_gpio HSC_OCP_SLOT_ODD_GPIO2 0 |
| 46 | set_gpio HSC_OCP_SLOT_ODD_GPIO3 0 |
| 47 | set_gpio HSC_OCP_SLOT_EVEN_GPIO1 0 |
| 48 | set_gpio HSC_OCP_SLOT_EVEN_GPIO2 0 |
| 49 | set_gpio HSC_OCP_SLOT_EVEN_GPIO3 0 |
| 50 | |
| 51 | set_gpio NIC0_MAIN_PWR_EN 1 |
| 52 | set_gpio NIC1_MAIN_PWR_EN 1 |
| 53 | set_gpio NIC2_MAIN_PWR_EN 1 |
| 54 | set_gpio NIC3_MAIN_PWR_EN 1 |
| 55 | |
| 56 | exit 0 |