blob: 0febf924dec28e40b25cc6ce2135cbbd99f8ca75 [file] [log] [blame]
Thang Q. Nguyendd68b8b2020-12-22 03:33:40 +00001FILESEXTRAPATHS_append_mtjade := "${THISDIR}/${PN}:"
2
3SRC_URI += " \
4 file://0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch \
Thang Q. Nguyend76c4132020-12-23 04:45:53 +00005 file://0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch \
Thang Q. Nguyen44cf8fd2020-12-22 04:27:36 +00006 file://0003-aspeed-support-passing-system-reset-status-to-kernel.patch \
Chanh Nguyen89f59762021-03-09 09:38:56 +07007 file://0004-aspeed-add-gpio-support.patch \
Chanh Nguyend86e51f2021-03-10 10:18:49 +07008 file://0005-aspeed-Enable-SPI-master-mode.patch \
Thang Q. Nguyendd68b8b2020-12-22 03:33:40 +00009 "