Delphine CC Chiu | e41b5cb | 2023-11-30 16:13:52 +0800 | [diff] [blame] | 1 | { |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 2 | "Exposes": [ |
| 3 | { |
| 4 | "CheckHysteresisWithSetpoint": true, |
| 5 | "Class": "temp", |
| 6 | "DCoefficient": 0.0, |
| 7 | "FFGainCoefficient": 0.0, |
| 8 | "FFOffCoefficient": 0.0, |
| 9 | "ICoefficient": -0.035, |
| 10 | "ILimitMax": 100, |
| 11 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 12 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 13 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 14 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C", |
| 15 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C", |
| 16 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C", |
| 17 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C", |
| 18 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C", |
| 19 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C", |
| 20 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C", |
| 21 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C", |
| 22 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C", |
| 23 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C", |
| 24 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C", |
| 25 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 26 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 27 | "Name": "PID_MB_DIMM_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 28 | "NegativeHysteresis": 2.0, |
| 29 | "OutLimitMax": 100, |
| 30 | "OutLimitMin": 0, |
| 31 | "PCoefficient": -3.0, |
| 32 | "PositiveHysteresis": 0.0, |
| 33 | "SetPoint": 75.0, |
| 34 | "SlewNeg": 0.0, |
| 35 | "SlewPos": 0.0, |
| 36 | "Type": "Pid", |
| 37 | "Zones": [ |
| 38 | "Zone 1" |
| 39 | ] |
| 40 | }, |
| 41 | { |
| 42 | "CheckHysteresisWithSetpoint": true, |
| 43 | "Class": "temp", |
| 44 | "DCoefficient": 0.0, |
| 45 | "FFGainCoefficient": 0.0, |
| 46 | "FFOffCoefficient": 0.0, |
| 47 | "ICoefficient": -0.035, |
| 48 | "ILimitMax": 100, |
| 49 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 50 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 51 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 52 | "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 53 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 54 | "Name": "PID_MB_CPU_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 55 | "NegativeHysteresis": 3.0, |
| 56 | "OutLimitMax": 100, |
| 57 | "OutLimitMin": 0, |
| 58 | "PCoefficient": -5.5, |
| 59 | "PositiveHysteresis": 0.0, |
| 60 | "SetPoint": 74.0, |
| 61 | "SlewNeg": 0.0, |
| 62 | "SlewPos": 0.0, |
| 63 | "Type": "Pid", |
| 64 | "Zones": [ |
| 65 | "Zone 1" |
| 66 | ] |
| 67 | }, |
| 68 | { |
| 69 | "CheckHysteresisWithSetpoint": true, |
| 70 | "Class": "temp", |
| 71 | "DCoefficient": 0.0, |
| 72 | "FFGainCoefficient": 0.0, |
| 73 | "FFOffCoefficient": 0.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 74 | "ICoefficient": -0.035, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 75 | "ILimitMax": 100, |
| 76 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 77 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 78 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 79 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 80 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 81 | "Name": "PID_MB_SSD_BOOT_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 82 | "NegativeHysteresis": 2.0, |
| 83 | "OutLimitMax": 100, |
| 84 | "OutLimitMin": 0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 85 | "PCoefficient": -5.5, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 86 | "PositiveHysteresis": 0.0, |
| 87 | "SetPoint": 68.0, |
| 88 | "SlewNeg": 0.0, |
| 89 | "SlewPos": 0.0, |
| 90 | "Type": "Pid", |
| 91 | "Zones": [ |
| 92 | "Zone 1" |
| 93 | ] |
| 94 | }, |
| 95 | { |
| 96 | "CheckHysteresisWithSetpoint": true, |
| 97 | "Class": "temp", |
| 98 | "DCoefficient": 0.0, |
| 99 | "FFGainCoefficient": 0.0, |
| 100 | "FFOffCoefficient": 0.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 101 | "ICoefficient": -0.035, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 102 | "ILimitMax": 100, |
| 103 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 104 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 105 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 106 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 107 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 108 | "Name": "PID_MB_SSD_DATA_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 109 | "NegativeHysteresis": 2.0, |
| 110 | "OutLimitMax": 100, |
| 111 | "OutLimitMin": 0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 112 | "PCoefficient": -5.5, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 113 | "PositiveHysteresis": 0.0, |
| 114 | "SetPoint": 68.0, |
| 115 | "SlewNeg": 0.0, |
| 116 | "SlewPos": 0.0, |
| 117 | "Type": "Pid", |
| 118 | "Zones": [ |
| 119 | "Zone 1" |
| 120 | ] |
| 121 | }, |
| 122 | { |
| 123 | "CheckHysteresisWithSetpoint": true, |
| 124 | "Class": "temp", |
| 125 | "DCoefficient": 0.0, |
| 126 | "FFGainCoefficient": 0.0, |
| 127 | "FFOffCoefficient": 0.0, |
| 128 | "ICoefficient": -0.02, |
| 129 | "ILimitMax": 100, |
| 130 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 131 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 132 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 133 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C", |
| 134 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C", |
| 135 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C", |
| 136 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C", |
| 137 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 138 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 139 | "Name": "PID_MB_VR_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 140 | "NegativeHysteresis": 3.0, |
| 141 | "OutLimitMax": 100, |
| 142 | "OutLimitMin": 0, |
| 143 | "PCoefficient": -3.0, |
| 144 | "PositiveHysteresis": 0.0, |
| 145 | "SetPoint": 90.0, |
| 146 | "SlewNeg": 0.0, |
| 147 | "SlewPos": 0.0, |
| 148 | "Type": "Pid", |
| 149 | "Zones": [ |
| 150 | "Zone 1" |
| 151 | ] |
| 152 | }, |
| 153 | { |
| 154 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 155 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 156 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 157 | "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C", |
| 158 | "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 159 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 160 | "Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 161 | "NegativeHysteresis": 0, |
| 162 | "Output": [ |
Ricky CX Wu | 724d45d | 2024-11-15 15:38:28 +0800 | [diff] [blame] | 163 | 10.0 |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 164 | ], |
| 165 | "PositiveHysteresis": 0, |
| 166 | "Reading": [ |
| 167 | 20.0 |
| 168 | ], |
| 169 | "Type": "Stepwise", |
| 170 | "Zones": [ |
| 171 | "Zone 1" |
| 172 | ] |
| 173 | }, |
| 174 | { |
| 175 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 176 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 177 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 178 | "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 179 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 180 | "Name": "Stepwise_MB_FIO_Slot $bus % 15", |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 181 | "NegativeHysteresis": 1, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 182 | "Output": [ |
| 183 | 20.0, |
| 184 | 21.0, |
| 185 | 22.0, |
| 186 | 23.0, |
| 187 | 24.0, |
| 188 | 25.0, |
| 189 | 26.0, |
| 190 | 27.0, |
| 191 | 28.0, |
| 192 | 29.0, |
| 193 | 30.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 194 | 32.0, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 195 | 33.0, |
| 196 | 35.0, |
| 197 | 37.0, |
| 198 | 38.0, |
| 199 | 39.0, |
| 200 | 40.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 201 | 41.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 202 | 42.0 |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 203 | ], |
| 204 | "PositiveHysteresis": 0, |
| 205 | "Reading": [ |
| 206 | 20.0, |
| 207 | 21.0, |
| 208 | 22.0, |
| 209 | 23.0, |
| 210 | 24.0, |
| 211 | 25.0, |
| 212 | 26.0, |
| 213 | 27.0, |
| 214 | 28.0, |
| 215 | 29.0, |
| 216 | 30.0, |
| 217 | 31.0, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 218 | 33.0, |
| 219 | 34.0, |
| 220 | 35.0, |
| 221 | 36.0, |
| 222 | 37.0, |
| 223 | 38.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 224 | 39.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 225 | 40.0 |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 226 | ], |
| 227 | "Type": "Stepwise", |
| 228 | "Zones": [ |
| 229 | "Zone 1" |
| 230 | ] |
| 231 | }, |
| 232 | { |
| 233 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 234 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 235 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 236 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C", |
| 237 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C", |
| 238 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C", |
| 239 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C", |
| 240 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C", |
| 241 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C", |
| 242 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C", |
| 243 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C", |
| 244 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C", |
| 245 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C", |
| 246 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C", |
| 247 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 248 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 249 | "Name": "Stepwise_MB_DIMM_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 250 | "NegativeHysteresis": 2, |
| 251 | "Output": [ |
| 252 | 20.0, |
| 253 | 22.0, |
| 254 | 24.0, |
| 255 | 26.0, |
| 256 | 28.0, |
| 257 | 30.0 |
| 258 | ], |
| 259 | "PositiveHysteresis": 0, |
| 260 | "Reading": [ |
| 261 | 65.0, |
| 262 | 66.0, |
| 263 | 67.0, |
| 264 | 68.0, |
| 265 | 69.0, |
| 266 | 70.0 |
| 267 | ], |
| 268 | "Type": "Stepwise", |
| 269 | "Zones": [ |
| 270 | "Zone 1" |
| 271 | ] |
| 272 | }, |
| 273 | { |
| 274 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 275 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 276 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 277 | "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 278 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 279 | "Name": "Stepwise_MB_CPU_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 280 | "NegativeHysteresis": 3, |
| 281 | "Output": [ |
| 282 | 20.0, |
| 283 | 25.0, |
| 284 | 30.0, |
| 285 | 35.0, |
| 286 | 40.0, |
| 287 | 45.0, |
| 288 | 50.0, |
| 289 | 55.0, |
| 290 | 60.0 |
| 291 | ], |
| 292 | "PositiveHysteresis": 0, |
| 293 | "Reading": [ |
| 294 | 66.0, |
| 295 | 67.0, |
| 296 | 68.0, |
| 297 | 69.0, |
| 298 | 70.0, |
| 299 | 71.0, |
| 300 | 72.0, |
| 301 | 73.0, |
| 302 | 74.0 |
| 303 | ], |
| 304 | "Type": "Stepwise", |
| 305 | "Zones": [ |
| 306 | "Zone 1" |
| 307 | ] |
| 308 | }, |
| 309 | { |
| 310 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 311 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 312 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 313 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 314 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 315 | "Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 316 | "NegativeHysteresis": 2, |
| 317 | "Output": [ |
| 318 | 20.0, |
| 319 | 22.0, |
| 320 | 24.0, |
| 321 | 26.0, |
| 322 | 28.0, |
| 323 | 30.0 |
| 324 | ], |
| 325 | "PositiveHysteresis": 0, |
| 326 | "Reading": [ |
| 327 | 58.0, |
| 328 | 59.0, |
| 329 | 60.0, |
| 330 | 61.0, |
| 331 | 62.0, |
| 332 | 63.0 |
| 333 | ], |
| 334 | "Type": "Stepwise", |
| 335 | "Zones": [ |
| 336 | "Zone 1" |
| 337 | ] |
| 338 | }, |
| 339 | { |
| 340 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 341 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 342 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 343 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 344 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 345 | "Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 346 | "NegativeHysteresis": 2, |
| 347 | "Output": [ |
| 348 | 20.0, |
| 349 | 22.0, |
| 350 | 24.0, |
| 351 | 26.0, |
| 352 | 28.0, |
| 353 | 30.0 |
| 354 | ], |
| 355 | "PositiveHysteresis": 0, |
| 356 | "Reading": [ |
| 357 | 58.0, |
| 358 | 59.0, |
| 359 | 60.0, |
| 360 | 61.0, |
| 361 | 62.0, |
| 362 | 63.0 |
| 363 | ], |
| 364 | "Type": "Stepwise", |
| 365 | "Zones": [ |
| 366 | "Zone 1" |
| 367 | ] |
| 368 | }, |
| 369 | { |
| 370 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 371 | "InputUnavailableAsFailed": false, |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 372 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame] | 373 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C", |
| 374 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C", |
| 375 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C", |
| 376 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C", |
| 377 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C" |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 378 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 379 | "Name": "Stepwise_MB_VR_Slot $bus % 15", |
Delphine CC Chiu | caa0a5f | 2024-05-22 14:45:04 +0800 | [diff] [blame] | 380 | "NegativeHysteresis": 3, |
| 381 | "Output": [ |
| 382 | 20.0, |
| 383 | 22.0, |
| 384 | 24.0, |
| 385 | 26.0, |
| 386 | 28.0, |
| 387 | 30.0 |
| 388 | ], |
| 389 | "PositiveHysteresis": 0, |
| 390 | "Reading": [ |
| 391 | 80.0, |
| 392 | 81.0, |
| 393 | 82.0, |
| 394 | 83.0, |
| 395 | 84.0, |
| 396 | 85.0 |
| 397 | ], |
| 398 | "Type": "Stepwise", |
| 399 | "Zones": [ |
| 400 | "Zone 1" |
| 401 | ] |
| 402 | } |
| 403 | ], |
Delphine CC Chiu | 4a1eed8 | 2024-06-28 16:51:30 +0800 | [diff] [blame] | 404 | "Name": "Yosemite 4 Sentinel Dome T2 Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 405 | "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Sentinel Dome without Retimer', 'PRODUCT_PRODUCT_NAME': 'Yosemite V4', 'PRODUCT_INFO_AM2': 'Yosemite V4 T2'})", |
Delphine CC Chiu | e41b5cb | 2023-11-30 16:13:52 +0800 | [diff] [blame] | 406 | "Type": "Board", |
| 407 | "xyz.openbmc_project.Inventory.Decorator.Asset": { |
Ingrid Chen | f6d0e78 | 2024-07-10 13:41:34 +0800 | [diff] [blame] | 408 | "BuildDate": "$BOARD_MANUFACTURE_DATE", |
| 409 | "Manufacturer": "$BOARD_MANUFACTURER", |
| 410 | "Model": "$BOARD_PRODUCT_NAME", |
| 411 | "PartNumber": "$BOARD_PART_NUMBER", |
| 412 | "SerialNumber": "$BOARD_SERIAL_NUMBER", |
Delphine CC Chiu | 3c0af08 | 2024-05-15 16:33:03 +0800 | [diff] [blame] | 413 | "SparePartNumber": "$BOARD_INFO_AM1" |
Delphine CC Chiu | ec458a8 | 2024-02-16 10:17:49 +0800 | [diff] [blame] | 414 | }, |
Delphine CC Chiu | d827cca | 2024-03-27 17:02:24 +0800 | [diff] [blame] | 415 | "xyz.openbmc_project.Inventory.Decorator.AssetTag": { |
| 416 | "AssetTag": "$PRODUCT_ASSET_TAG" |
| 417 | }, |
Oliver Brewka | bdad3d5 | 2024-08-21 18:49:37 +0200 | [diff] [blame] | 418 | "xyz.openbmc_project.Inventory.Decorator.ManagedHost": { |
| 419 | "HostIndex": "$bus % 15" |
| 420 | }, |
Delphine CC Chiu | baedb72 | 2024-04-01 16:21:03 +0800 | [diff] [blame] | 421 | "xyz.openbmc_project.Inventory.Decorator.Revision": { |
| 422 | "Version": "$PRODUCT_VERSION" |
| 423 | }, |
Delphine CC Chiu | ec458a8 | 2024-02-16 10:17:49 +0800 | [diff] [blame] | 424 | "xyz.openbmc_project.Inventory.Decorator.Slot": { |
| 425 | "SlotNumber": "$bus % 15" |
Ingrid Chen | f3b0272 | 2024-08-30 17:14:37 +0800 | [diff] [blame] | 426 | }, |
| 427 | "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { |
| 428 | "ProductId": 1 |
Delphine CC Chiu | e41b5cb | 2023-11-30 16:13:52 +0800 | [diff] [blame] | 429 | } |
| 430 | } |