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gerrit.openbmc.org / openbmc / entity-manager / 3bfc30c838d6873d520bd1d7ba5f6cb87b73dbbd / . / configurations / harma_mb_vr_infineon.json
blob: 8cf927dfb74516e2329cf8d4d901b9bb2946dfd7 [file] [log] [blame]
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1{
2 "Exposes": [
3 {
4 "BridgeGpio": [
5 {
6 "Name": "rtc-battery-voltage-read-enable",
7 "Polarity": "High",
8 "SetupTime": 1
9 }
10 ],
11 "Index": 7,
12 "Name": "MB_P3V_BAT_VOLT_V",
13 "ScaleFactor": 0.333333333,
14 "Thresholds": [
15 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]16 "Direction": "less than",
17 "Name": "lower critical",
18 "Severity": 1,
19 "Value": 2.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]20 },
21 {
22 "Direction": "greater than",
23 "Name": "upper critical",
24 "Severity": 1,
25 "Value": 3.4
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]26 }
27 ],
28 "Type": "ADC"
29 },
30 {
31 "Address": "0x1d",
32 "Bus": 29,
33 "Labels": [
34 "in1",
35 "in2",
36 "in3",
37 "in4",
38 "in5"
39 ],
40 "Name": "MB_ADC0",
41 "Thresholds": [
42 {
43 "Direction": "less than",
44 "Label": "in1",
45 "Name": "lower critical",
46 "Severity": 1,
47 "Value": 1.045
48 },
49 {
50 "Direction": "greater than",
51 "Label": "in1",
52 "Name": "upper critical",
53 "Severity": 1,
54 "Value": 1.155
55 },
56 {
57 "Direction": "less than",
58 "Label": "in2",
59 "Name": "lower critical",
60 "Severity": 1,
61 "Value": 3.135
62 },
63 {
64 "Direction": "greater than",
65 "Label": "in2",
66 "Name": "upper critical",
67 "Severity": 1,
68 "Value": 3.4
69 },
70 {
71 "Direction": "less than",
72 "Label": "in3",
73 "Name": "lower critical",
74 "Severity": 1,
75 "Value": 1.76
76 },
77 {
78 "Direction": "greater than",
79 "Label": "in3",
80 "Name": "upper critical",
81 "Severity": 1,
82 "Value": 1.84
83 },
84 {
85 "Direction": "less than",
86 "Label": "in4",
87 "Name": "lower critical",
88 "Severity": 1,
89 "Value": 10.8
90 },
91 {
92 "Direction": "greater than",
93 "Label": "in4",
94 "Name": "upper critical",
95 "Severity": 1,
96 "Value": 13.2
97 },
98 {
99 "Direction": "less than",
100 "Label": "in5",
101 "Name": "lower critical",
102 "Severity": 1,
103 "Value": 10.8
104 },
105 {
106 "Direction": "greater than",
107 "Label": "in5",
108 "Name": "upper critical",
109 "Severity": 1,
110 "Value": 13.2
111 }
112 ],
113 "Type": "ADC128D818",
114 "in1_Name": "MB_PVDD11_S3_VOLT_V",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]115 "in1_PowerState": "On",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]116 "in2_Name": "MB_P3V3_STBY_VOLT_V",
117 "in2_Scale": 500,
118 "in3_Name": "MB_PVDD18_S5_VOLT_V",
119 "in4_Name": "MB_P12V_AUX_VOLT_V",
120 "in4_Scale": 151.515151515,
121 "in5_Name": "MB_P12V_STBY_VOLT_V",
122 "in5_Scale": 151.515151515
123 },
124 {
125 "Address": "0x1f",
126 "Bus": 29,
127 "Labels": [
128 "in0",
129 "in1",
130 "in2",
131 "in3",
132 "in4",
133 "in5"
134 ],
135 "Name": "MB_ADC1",
136 "Thresholds": [
137 {
138 "Direction": "less than",
139 "Label": "in0",
140 "Name": "lower critical",
141 "Severity": 1,
142 "Value": 10.8
143 },
144 {
145 "Direction": "greater than",
146 "Label": "in0",
147 "Name": "upper critical",
148 "Severity": 1,
149 "Value": 13.2
150 },
151 {
152 "Direction": "less than",
153 "Label": "in1",
154 "Name": "lower critical",
155 "Severity": 1,
156 "Value": 4.75
157 },
158 {
159 "Direction": "greater than",
160 "Label": "in1",
161 "Name": "upper critical",
162 "Severity": 1,
163 "Value": 5.25
164 },
165 {
166 "Direction": "less than",
167 "Label": "in2",
168 "Name": "lower critical",
169 "Severity": 1,
170 "Value": 3.13
171 },
172 {
173 "Direction": "greater than",
174 "Label": "in2",
175 "Name": "upper critical",
176 "Severity": 1,
177 "Value": 3.46
178 },
179 {
180 "Direction": "less than",
181 "Label": "in3",
182 "Name": "lower critical",
183 "Severity": 1,
184 "Value": 1.71
185 },
186 {
187 "Direction": "greater than",
188 "Label": "in3",
189 "Name": "upper critical",
190 "Severity": 1,
191 "Value": 1.89
192 },
193 {
194 "Direction": "less than",
195 "Label": "in4",
196 "Name": "lower critical",
197 "Severity": 1,
198 "Value": 10.8
199 },
200 {
201 "Direction": "greater than",
202 "Label": "in4",
203 "Name": "upper critical",
204 "Severity": 1,
205 "Value": 13.2
206 },
207 {
208 "Direction": "less than",
209 "Label": "in5",
210 "Name": "lower critical",
211 "Severity": 1,
212 "Value": 1.71
213 },
214 {
215 "Direction": "greater than",
216 "Label": "in5",
217 "Name": "upper critical",
218 "Severity": 1,
219 "Value": 1.89
220 }
221 ],
222 "Type": "ADC128D818",
223 "in0_Name": "MB_P12V_MEM0_VOLT_V",
224 "in0_Scale": 151.515151515,
225 "in1_Name": "MB_P5V_STBY_VOLT_V",
226 "in1_Scale": 281.29395218,
227 "in2_Name": "MB_PVDD33_S5_VOLT_V",
228 "in2_Scale": 500,
229 "in3_Name": "MB_P1V8_STBY_VOLT_V",
230 "in4_Name": "MB_P12V_MEM1_VOLT_V",
231 "in4_Scale": 151.515151515,
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]232 "in5_Name": "MB_P1V8_CPU_RT_VOLT_V",
233 "in5_PowerState": "On"
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]234 },
235 {
236 "Address": "$address",
237 "Bus": "$bus",
238 "Name": "MB FRU",
239 "Type": "EEPROM"
240 },
241 {
242 "Address": "0x45",
243 "Bus": 23,
244 "Labels": [
245 "in1",
246 "curr1",
247 "power1"
248 ],
249 "Name": "MB_E1S0",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]250 "PowerState": "On",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]251 "Thresholds": [
252 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]253 "Direction": "less than",
254 "Label": "in1",
255 "Name": "lower critical",
256 "Severity": 1,
257 "Value": 10.8
258 },
259 {
260 "Direction": "greater than",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]261 "Label": "in1",
262 "Name": "upper critical",
263 "Severity": 1,
264 "Value": 13.2
265 },
266 {
267 "Direction": "greater than",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]268 "Label": "curr1",
269 "Name": "upper critical",
270 "Severity": 1,
271 "Value": 2.1
272 },
273 {
274 "Direction": "greater than",
275 "Label": "power1",
276 "Name": "upper critical",
277 "Severity": 1,
278 "Value": 25.0
279 }
280 ],
281 "Type": "INA230",
282 "curr1_Name": "MB_E1S0_P12V_CURR_A",
283 "in1_Name": "MB_E1S0_P12V_VOLT_V",
284 "power1_Name": "MB_E1S0_P12V_PWR_W"
285 },
286 {
287 "Address": "0x45",
288 "Bus": 22,
289 "Labels": [
290 "in1",
291 "curr1",
292 "power1"
293 ],
294 "Name": "MB_E1S1",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]295 "PowerState": "On",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]296 "Thresholds": [
297 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]298 "Direction": "less than",
299 "Label": "in1",
300 "Name": "lower critical",
301 "Severity": 1,
302 "Value": 10.8
303 },
304 {
305 "Direction": "greater than",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]306 "Label": "in1",
307 "Name": "upper critical",
308 "Severity": 1,
309 "Value": 13.2
310 },
311 {
312 "Direction": "greater than",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]313 "Label": "curr1",
314 "Name": "upper critical",
315 "Severity": 1,
316 "Value": 2.1
317 },
318 {
319 "Direction": "greater than",
320 "Label": "power1",
321 "Name": "upper critical",
322 "Severity": 1,
323 "Value": 25.0
324 }
325 ],
326 "Type": "INA230",
327 "curr1_Name": "MB_E1S1_P12V_CURR_A",
328 "in1_Name": "MB_E1S1_P12V_VOLT_V",
329 "power1_Name": "MB_E1S1_P12V_PWR_W"
330 },
331 {
332 "Address": "0x45",
333 "Bus": 29,
334 "Labels": [
335 "in1",
336 "curr1",
337 "power1"
338 ],
339 "Name": "NIC_MEZZ",
340 "Thresholds": [
341 {
342 "Direction": "less than",
343 "Label": "in1",
344 "Name": "lower critical",
345 "Severity": 1,
346 "Value": 10.8
347 },
348 {
349 "Direction": "greater than",
350 "Label": "in1",
351 "Name": "upper critical",
352 "Severity": 1,
353 "Value": 13.2
354 },
355 {
356 "Direction": "greater than",
357 "Label": "curr1",
358 "Name": "upper critical",
359 "Severity": 1,
360 "Value": 5.7
361 },
362 {
363 "Direction": "greater than",
364 "Label": "power1",
365 "Name": "upper critical",
366 "Severity": 1,
367 "Value": 75.0
368 }
369 ],
370 "Type": "INA230",
371 "curr1_Name": "NIC_MEZZ_P12V_CURR_A",
372 "in1_Name": "NIC_MEZZ_P12V_VOLT_V",
373 "power1_Name": "NIC_MEZZ_P12V_PWR_W"
374 },
375 {
376 "Address": "0x20",
377 "Bus": 28,
378 "Labels": [
379 "iout1",
380 "vin",
381 "vout1",
Peter Yin670706a2024-05-30 22:02:20 +0800[diff] [blame]382 "pin",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]383 "temp1"
384 ],
385 "Name": "MB_HSC",
386 "Thresholds": [
387 {
388 "Direction": "greater than",
389 "Label": "iout1",
390 "Name": "upper critical",
391 "Severity": 1,
392 "Value": 72.0
393 },
394 {
395 "Direction": "less than",
396 "Label": "vin",
397 "Name": "lower critical",
398 "Severity": 1,
399 "Value": 10.8
400 },
401 {
402 "Direction": "greater than",
403 "Label": "vin",
404 "Name": "upper critical",
405 "Severity": 1,
406 "Value": 13.2
407 },
408 {
409 "Direction": "less than",
410 "Label": "vout1",
411 "Name": "lower critical",
412 "Severity": 1,
413 "Value": 10.8
414 },
415 {
416 "Direction": "greater than",
417 "Label": "vout1",
418 "Name": "upper critical",
419 "Severity": 1,
420 "Value": 13.2
421 },
422 {
423 "Direction": "greater than",
Peter Yin670706a2024-05-30 22:02:20 +0800[diff] [blame]424 "Label": "pin",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]425 "Name": "upper critical",
426 "Severity": 1,
427 "Value": 950.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]428 },
429 {
430 "Direction": "greater than",
431 "Label": "temp1",
432 "Name": "upper critical",
433 "Severity": 1,
434 "Value": 80.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]435 }
436 ],
437 "Type": "MP5990",
438 "iout1_Name": "MB_HSC_CURR_A",
Peter Yin670706a2024-05-30 22:02:20 +0800[diff] [blame]439 "pin_Name": "MB_HSC_PWR_W",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]440 "temp1_Name": "MB_HSC_TEMP_C",
441 "vin_Name": "MB_HSC_VIN_VOLT_V",
442 "vout1_Name": "MB_HSC_VOUT_VOLT_V"
443 },
444 {
445 "Address": "0x6a",
446 "Bus": 23,
447 "Name": "MB_E1S0_TEMP_C",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]448 "PowerState": "On",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]449 "Thresholds": [
450 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]451 "Direction": "less than",
452 "Name": "lower critical",
453 "Severity": 1,
454 "Value": 5.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]455 },
456 {
457 "Direction": "greater than",
458 "Name": "upper critical",
459 "Severity": 1,
460 "Value": 70.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]461 }
462 ],
463 "Type": "NVME1000"
464 },
465 {
466 "Address": "0x6a",
467 "Bus": 22,
468 "Name": "MB_E1S1_TEMP_C",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]469 "PowerState": "On",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]470 "Thresholds": [
471 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]472 "Direction": "less than",
473 "Name": "lower critical",
474 "Severity": 1,
475 "Value": 5.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]476 },
477 {
478 "Direction": "greater than",
479 "Name": "upper critical",
480 "Severity": 1,
481 "Value": 70.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]482 }
483 ],
484 "Type": "NVME1000"
485 },
486 {
487 "Address": "0x24",
488 "Bus": 12,
489 "Name": "MB_RETIMER0_TEMP_C",
490 "PowerState": "On",
491 "Thresholds": [
492 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]493 "Direction": "less than",
494 "Name": "lower critical",
495 "Severity": 1,
496 "Value": -1.0
497 },
498 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]499 "Direction": "greater than",
500 "Name": "upper critical",
501 "Severity": 1,
502 "Value": 100.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]503 }
504 ],
505 "Type": "PT5161L"
506 },
507 {
508 "Address": "0x24",
509 "Bus": 21,
510 "Name": "MB_RETIMER1_TEMP_C",
511 "PowerState": "On",
512 "Thresholds": [
513 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]514 "Direction": "less than",
515 "Name": "lower critical",
516 "Severity": 1,
517 "Value": -1.0
518 },
519 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]520 "Direction": "greater than",
521 "Name": "upper critical",
522 "Severity": 1,
523 "Value": 100.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]524 }
525 ],
526 "Type": "PT5161L"
527 },
528 {
529 "Address": "0x3C",
530 "Bus": 7,
531 "Labels": [
532 "power1",
533 "power2",
534 "power3",
535 "power4",
536 "power5",
537 "power6",
538 "power7",
539 "power8",
540 "power9",
541 "temp1",
542 "temp2",
543 "temp3",
544 "temp4",
545 "temp5",
546 "temp6",
547 "temp7",
548 "temp8"
549 ],
550 "Name": "SBRMI",
551 "PowerState": "BiosPost",
552 "Thresholds": [
553 {
554 "Direction": "greater than",
555 "Label": "power1",
556 "Name": "upper critical",
557 "Severity": 1,
558 "Value": 640.0
559 },
560 {
561 "Direction": "greater than",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]562 "Label": "power2",
563 "Name": "upper critical",
564 "Severity": 1,
565 "Value": 14.0
566 },
567 {
568 "Direction": "greater than",
569 "Label": "power3",
570 "Name": "upper critical",
571 "Severity": 1,
572 "Value": 14.0
573 },
574 {
575 "Direction": "greater than",
576 "Label": "power4",
577 "Name": "upper critical",
578 "Severity": 1,
579 "Value": 14.0
580 },
581 {
582 "Direction": "greater than",
583 "Label": "power5",
584 "Name": "upper critical",
585 "Severity": 1,
586 "Value": 14.0
587 },
588 {
589 "Direction": "greater than",
590 "Label": "power6",
591 "Name": "upper critical",
592 "Severity": 1,
593 "Value": 14.0
594 },
595 {
596 "Direction": "greater than",
597 "Label": "power7",
598 "Name": "upper critical",
599 "Severity": 1,
600 "Value": 14.0
601 },
602 {
603 "Direction": "greater than",
604 "Label": "power8",
605 "Name": "upper critical",
606 "Severity": 1,
607 "Value": 14.0
608 },
609 {
610 "Direction": "greater than",
611 "Label": "power9",
612 "Name": "upper critical",
613 "Severity": 1,
614 "Value": 14.0
615 },
616 {
617 "Direction": "less than",
618 "Label": "temp1",
619 "Name": "lower critical",
620 "Severity": 1,
621 "Value": -1.0
622 },
623 {
624 "Direction": "greater than",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]625 "Label": "temp1",
626 "Name": "upper critical",
627 "Severity": 1,
628 "Value": 80.0
629 },
630 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]631 "Direction": "less than",
632 "Label": "temp2",
633 "Name": "lower critical",
634 "Severity": 1,
635 "Value": -1.0
636 },
637 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]638 "Direction": "greater than",
639 "Label": "temp2",
640 "Name": "upper critical",
641 "Severity": 1,
642 "Value": 80.0
643 },
644 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]645 "Direction": "less than",
646 "Label": "temp3",
647 "Name": "lower critical",
648 "Severity": 1,
649 "Value": -1.0
650 },
651 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]652 "Direction": "greater than",
653 "Label": "temp3",
654 "Name": "upper critical",
655 "Severity": 1,
656 "Value": 80.0
657 },
658 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]659 "Direction": "less than",
660 "Label": "temp4",
661 "Name": "lower critical",
662 "Severity": 1,
663 "Value": -1.0
664 },
665 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]666 "Direction": "greater than",
667 "Label": "temp4",
668 "Name": "upper critical",
669 "Severity": 1,
670 "Value": 80.0
671 },
672 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]673 "Direction": "less than",
674 "Label": "temp5",
675 "Name": "lower critical",
676 "Severity": 1,
677 "Value": -1.0
678 },
679 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]680 "Direction": "greater than",
681 "Label": "temp5",
682 "Name": "upper critical",
683 "Severity": 1,
684 "Value": 80.0
685 },
686 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]687 "Direction": "less than",
688 "Label": "temp6",
689 "Name": "lower critical",
690 "Severity": 1,
691 "Value": -1.0
692 },
693 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]694 "Direction": "greater than",
695 "Label": "temp6",
696 "Name": "upper critical",
697 "Severity": 1,
698 "Value": 80.0
699 },
700 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]701 "Direction": "less than",
702 "Label": "temp7",
703 "Name": "lower critical",
704 "Severity": 1,
705 "Value": -1.0
706 },
707 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]708 "Direction": "greater than",
709 "Label": "temp7",
710 "Name": "upper critical",
711 "Severity": 1,
712 "Value": 80.0
713 },
714 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]715 "Direction": "less than",
716 "Label": "temp8",
717 "Name": "lower critical",
718 "Severity": 1,
719 "Value": -1.0
720 },
721 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]722 "Direction": "greater than",
723 "Label": "temp8",
724 "Name": "upper critical",
725 "Severity": 1,
726 "Value": 80.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]727 }
728 ],
729 "Type": "SBRMI",
730 "power1_Name": "MB_CPU_PKG_PWR_W",
731 "power2_Name": "MB_DIMM_A0_PWR_W",
732 "power3_Name": "MB_DIMM_A1_PWR_W",
733 "power4_Name": "MB_DIMM_A2_PWR_W",
734 "power5_Name": "MB_DIMM_A4_PWR_W",
735 "power6_Name": "MB_DIMM_A6_PWR_W",
736 "power7_Name": "MB_DIMM_A7_PWR_W",
737 "power8_Name": "MB_DIMM_A8_PWR_W",
738 "power9_Name": "MB_DIMM_A10_PWR_W",
739 "temp1_Name": "MB_DIMM_A0_TEMP_C",
740 "temp2_Name": "MB_DIMM_A1_TEMP_C",
741 "temp3_Name": "MB_DIMM_A2_TEMP_C",
742 "temp4_Name": "MB_DIMM_A4_TEMP_C",
743 "temp5_Name": "MB_DIMM_A6_TEMP_C",
744 "temp6_Name": "MB_DIMM_A7_TEMP_C",
745 "temp7_Name": "MB_DIMM_A8_TEMP_C",
746 "temp8_Name": "MB_DIMM_A10_TEMP_C"
747 },
748 {
749 "Address": "0x4C",
750 "Bus": 7,
751 "Name": "MB_CPU_TEMP_C",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]752 "PowerState": "BiosPost",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]753 "Thresholds": [
754 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]755 "Direction": "less than",
756 "Name": "lower critical",
757 "Severity": 1,
758 "Value": -1.0
759 },
760 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]761 "Direction": "greater than",
762 "Name": "upper critical",
763 "Severity": 1,
764 "Value": 95.0
765 }
766 ],
767 "Type": "SBTSI"
768 },
769 {
770 "Address": "0x49",
771 "Bus": 29,
772 "Name": "MB_OUTLET_TEMP_C",
773 "Thresholds": [
774 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]775 "Direction": "less than",
776 "Name": "lower critical",
777 "Severity": 1,
778 "Value": 5.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]779 },
780 {
781 "Direction": "greater than",
782 "Name": "upper critical",
783 "Severity": 1,
784 "Value": 80.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]785 }
786 ],
787 "Type": "TMP75"
788 },
789 {
790 "Address": "0x4A",
791 "Bus": 29,
792 "Name": "MB_INLET_TEMP_C",
793 "Thresholds": [
794 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]795 "Direction": "less than",
796 "Name": "lower critical",
797 "Severity": 1,
798 "Value": 5.0
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]799 },
800 {
801 "Direction": "greater than",
802 "Name": "upper critical",
803 "Severity": 1,
804 "Value": 60.0
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]805 }
806 ],
807 "Type": "TMP75"
808 },
809 {
810 "Address": "0x68",
811 "Bus": 28,
812 "Labels": [
813 "iout1",
814 "vout1",
815 "pout1",
816 "temp1"
817 ],
818 "Name": "MB_VR_CPU_PVDD11",
819 "PowerState": "On",
820 "Thresholds": [
821 {
822 "Direction": "greater than",
823 "Label": "iout1",
824 "Name": "upper critical",
825 "Severity": 1,
826 "Value": 59.0
827 },
828 {
829 "Direction": "less than",
830 "Label": "vout1",
831 "Name": "lower critical",
832 "Severity": 1,
833 "Value": 1.045
834 },
835 {
836 "Direction": "greater than",
837 "Label": "vout1",
838 "Name": "upper critical",
839 "Severity": 1,
840 "Value": 1.155
841 },
842 {
843 "Direction": "greater than",
844 "Label": "pout1",
845 "Name": "upper critical",
846 "Severity": 1,
847 "Value": 65.0
848 },
849 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]850 "Direction": "less than",
851 "Label": "temp1",
852 "Name": "lower critical",
853 "Severity": 1,
854 "Value": -1.0
855 },
856 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]857 "Direction": "greater than",
858 "Label": "temp1",
859 "Name": "upper critical",
860 "Severity": 1,
861 "Value": 105.0
862 }
863 ],
864 "Type": "XDPE152C4",
865 "iout1_Name": "MB_VR_CPU_PVDD11_CURR_A",
866 "pout1_Name": "MB_VR_CPU_PVDD11_PWR_W",
867 "temp1_Name": "MB_VR_CPU_PVDD11_TEMP_C",
868 "vout1_Name": "MB_VR_CPU_PVDD11_VOLT_V"
869 },
870 {
871 "Address": "0x64",
872 "Bus": 28,
873 "Labels": [
874 "iout1",
875 "iout2",
876 "vout1",
877 "vout2",
878 "pout1",
879 "pout2",
880 "temp1",
881 "temp2"
882 ],
883 "Name": "MB_VR_CPU_VCORE0_SOC",
884 "PowerState": "On",
885 "Thresholds": [
886 {
887 "Direction": "greater than",
888 "Label": "iout1",
889 "Name": "upper critical",
890 "Severity": 1,
891 "Value": 318.0
892 },
893 {
894 "Direction": "greater than",
895 "Label": "iout2",
896 "Name": "upper critical",
897 "Severity": 1,
898 "Value": 210.0
899 },
900 {
901 "Direction": "less than",
902 "Label": "vout1",
903 "Name": "lower critical",
904 "Severity": 1,
905 "Value": 0.53
906 },
907 {
908 "Direction": "greater than",
909 "Label": "vout1",
910 "Name": "upper critical",
911 "Severity": 1,
912 "Value": 1.52
913 },
914 {
915 "Direction": "less than",
916 "Label": "vout2",
917 "Name": "lower critical",
918 "Severity": 1,
919 "Value": 0.73
920 },
921 {
922 "Direction": "greater than",
923 "Label": "vout2",
924 "Name": "upper critical",
925 "Severity": 1,
926 "Value": 1.22
927 },
928 {
929 "Direction": "greater than",
930 "Label": "pout1",
931 "Name": "upper critical",
932 "Severity": 1,
933 "Value": 175.0
934 },
935 {
936 "Direction": "greater than",
937 "Label": "pout2",
938 "Name": "upper critical",
939 "Severity": 1,
940 "Value": 105.0
941 },
942 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]943 "Direction": "less than",
944 "Label": "temp1",
945 "Name": "lower critical",
946 "Severity": 1,
947 "Value": -1.0
948 },
949 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]950 "Direction": "greater than",
951 "Label": "temp1",
952 "Name": "upper critical",
953 "Severity": 1,
954 "Value": 105.0
955 },
956 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]957 "Direction": "less than",
958 "Label": "temp2",
959 "Name": "lower critical",
960 "Severity": 1,
961 "Value": -1.0
962 },
963 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]964 "Direction": "greater than",
965 "Label": "temp2",
966 "Name": "upper critical",
967 "Severity": 1,
968 "Value": 105.0
969 }
970 ],
971 "Type": "XDPE152C4",
972 "iout1_Name": "MB_VR_CPU_VCORE0_CURR_A",
973 "iout2_Name": "MB_VR_CPU_SOC_CURR_A",
974 "pout1_Name": "MB_VR_CPU_VCORE0_PWR_W",
975 "pout2_Name": "MB_VR_CPU_SOC_PWR_W",
976 "temp1_Name": "MB_VR_CPU_VCORE0_TEMP_C",
977 "temp2_Name": "MB_VR_CPU_SOC_TEMP_C",
978 "vout1_Name": "MB_VR_CPU_VCORE0_VOLT_V",
979 "vout2_Name": "MB_VR_CPU_SOC_VOLT_V"
980 },
981 {
982 "Address": "0x66",
983 "Bus": 28,
984 "Labels": [
985 "iout1",
986 "iout2",
987 "vout1",
988 "vout2",
989 "pout1",
990 "pout2",
991 "temp1",
992 "temp2"
993 ],
994 "Name": "MB_VR_CPU_VCORE1_PDDIO",
995 "PowerState": "On",
996 "Thresholds": [
997 {
998 "Direction": "greater than",
999 "Label": "iout1",
1000 "Name": "upper critical",
1001 "Severity": 1,
1002 "Value": 318.0
1003 },
1004 {
1005 "Direction": "greater than",
1006 "Label": "iout2",
1007 "Name": "upper critical",
1008 "Severity": 1,
1009 "Value": 133.0
1010 },
1011 {
1012 "Direction": "less than",
1013 "Label": "vout1",
1014 "Name": "lower critical",
1015 "Severity": 1,
1016 "Value": 0.53
1017 },
1018 {
1019 "Direction": "greater than",
1020 "Label": "vout1",
1021 "Name": "upper critical",
1022 "Severity": 1,
1023 "Value": 1.52
1024 },
1025 {
1026 "Direction": "less than",
1027 "Label": "vout2",
1028 "Name": "lower critical",
1029 "Severity": 1,
1030 "Value": 0.88
1031 },
1032 {
1033 "Direction": "greater than",
1034 "Label": "vout2",
1035 "Name": "upper critical",
1036 "Severity": 1,
1037 "Value": 1.22
1038 },
1039 {
1040 "Direction": "greater than",
1041 "Label": "pout1",
1042 "Name": "upper critical",
1043 "Severity": 1,
1044 "Value": 175.0
1045 },
1046 {
1047 "Direction": "greater than",
1048 "Label": "pout2",
1049 "Name": "upper critical",
1050 "Severity": 1,
1051 "Value": 120.0
1052 },
1053 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]1054 "Direction": "less than",
1055 "Label": "temp1",
1056 "Name": "lower critical",
1057 "Severity": 1,
1058 "Value": -1.0
1059 },
1060 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1061 "Direction": "greater than",
1062 "Label": "temp1",
1063 "Name": "upper critical",
1064 "Severity": 1,
1065 "Value": 105.0
1066 },
1067 {
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]1068 "Direction": "less than",
1069 "Label": "temp2",
1070 "Name": "lower critical",
1071 "Severity": 1,
1072 "Value": -1.0
1073 },
1074 {
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1075 "Direction": "greater than",
1076 "Label": "temp2",
1077 "Name": "upper critical",
1078 "Severity": 1,
1079 "Value": 105.0
1080 }
1081 ],
1082 "Type": "XDPE152C4",
1083 "iout1_Name": "MB_VR_CPU_VCORE1_CURR_A",
1084 "iout2_Name": "MB_VR_CPU_PDDIO_CURR_A",
1085 "pout1_Name": "MB_VR_CPU_VCORE1_PWR_W",
1086 "pout2_Name": "MB_VR_CPU_PDDIO_PWR_W",
1087 "temp1_Name": "MB_VR_CPU_VCORE1_TEMP_C",
1088 "temp2_Name": "MB_VR_CPU_PDDIO_TEMP_C",
1089 "vout1_Name": "MB_VR_CPU_VCORE1_VOLT_V",
1090 "vout2_Name": "MB_VR_CPU_PDDIO_VOLT_V"
1091 }
1092 ],
1093 "Name": "Harma MB",
Peter Yincbeb17b2024-06-05 00:25:14 +0800[diff] [blame]1094 "Probe": [
1095 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB EVT', 'BOARD_PART_NUMBER': '3BF0MMA0050'})",
1096 "OR",
1097 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB ', 'BOARD_INFO_AM4': 'vr-xdpe'})"
1098 ],
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1099 "Type": "Board",
1100 "xyz.openbmc_project.Inventory.Decorator.Asset": {
Peter Yin5501ee32024-05-15 16:17:12 +0800[diff] [blame]1101 "BuildDate": "$BOARD_MANUFACTURE_DATE",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1102 "Manufacturer": "$BOARD_MANUFACTURER",
Daniel Hsu3bfc30c2024-08-28 16:05:15 +0800[diff] [blame^]1103 "Model": "$BOARD_PRODUCT_NAME",
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1104 "PartNumber": "$BOARD_PART_NUMBER",
Peter Yin05cdf042024-06-05 00:54:29 +0800[diff] [blame]1105 "SerialNumber": "$BOARD_SERIAL_NUMBER",
1106 "SparePartNumber": "$BOARD_INFO_AM1"
Peter Yin141718c2024-07-15 23:27:01 +0800[diff] [blame]1107 },
1108 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
1109 "AssetTag": "$PRODUCT_ASSET_TAG"
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1110 }
1111}