Gitiles
Code Review Sign In
gerrit.openbmc.org / openbmc / entity-manager / 621fdf92b5c600ae0f8e78b0717ec1842cd1c577 / . / configurations / meta / harma_mb_vr_infineon.json
blob: 7ca9e5d344420daba70b8389e4518250baf0f32e [file] [log] [blame]
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1[
2 {
3 "Exposes": [
4 {
5 "BridgeGpio": [
6 {
7 "Name": "rtc-battery-voltage-read-enable",
8 "Polarity": "High",
9 "SetupTime": 1
10 }
11 ],
12 "Index": 7,
13 "Name": "MB_P3V_BAT_VOLT_V",
14 "ScaleFactor": 0.333333333,
15 "Thresholds": [
16 {
17 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]18 "Hysteresis": 0.04,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]19 "Name": "lower critical",
20 "Severity": 1,
21 "Value": 2.0
22 },
23 {
24 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]25 "Hysteresis": 0.068,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]26 "Name": "upper critical",
27 "Severity": 1,
28 "Value": 3.4
29 }
30 ],
31 "Type": "ADC"
32 },
33 {
34 "Address": "0x1d",
35 "Bus": 29,
36 "Labels": [
37 "in1",
38 "in2",
39 "in3",
40 "in4",
41 "in5"
42 ],
43 "Name": "MB_ADC0",
44 "Thresholds": [
45 {
46 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]47 "Hysteresis": 0.0209,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]48 "Label": "in1",
49 "Name": "lower critical",
50 "Severity": 1,
51 "Value": 1.045
52 },
53 {
54 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]55 "Hysteresis": 0.0231,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]56 "Label": "in1",
57 "Name": "upper critical",
58 "Severity": 1,
59 "Value": 1.155
60 },
61 {
62 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]63 "Hysteresis": 0.0627,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]64 "Label": "in2",
65 "Name": "lower critical",
66 "Severity": 1,
67 "Value": 3.135
68 },
69 {
70 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]71 "Hysteresis": 0.068,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]72 "Label": "in2",
73 "Name": "upper critical",
74 "Severity": 1,
75 "Value": 3.4
76 },
77 {
78 "Direction": "less than",
Daniel Hsu71e50072025-02-24 10:33:48 +0800[diff] [blame]79 "Hysteresis": 0,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]80 "Label": "in3",
81 "Name": "lower critical",
82 "Severity": 1,
83 "Value": 1.76
84 },
85 {
86 "Direction": "greater than",
Daniel Hsu71e50072025-02-24 10:33:48 +0800[diff] [blame]87 "Hysteresis": 0,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]88 "Label": "in3",
89 "Name": "upper critical",
90 "Severity": 1,
91 "Value": 1.84
92 },
93 {
94 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]95 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]96 "Label": "in4",
97 "Name": "lower critical",
98 "Severity": 1,
99 "Value": 10.8
100 },
101 {
102 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]103 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]104 "Label": "in4",
105 "Name": "upper critical",
106 "Severity": 1,
107 "Value": 13.2
108 },
109 {
110 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]111 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]112 "Label": "in5",
113 "Name": "lower critical",
114 "Severity": 1,
115 "Value": 10.8
116 },
117 {
118 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]119 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]120 "Label": "in5",
121 "Name": "upper critical",
122 "Severity": 1,
123 "Value": 13.2
124 }
125 ],
126 "Type": "ADC128D818",
127 "in1_Name": "MB_PVDD11_S3_VOLT_V",
128 "in1_PowerState": "On",
129 "in2_Name": "MB_P3V3_STBY_VOLT_V",
130 "in2_Scale": 500,
131 "in3_Name": "MB_PVDD18_S5_VOLT_V",
132 "in4_Name": "MB_P12V_AUX_VOLT_V",
133 "in4_Scale": 151.515151515,
134 "in5_Name": "MB_P12V_STBY_VOLT_V",
135 "in5_Scale": 151.515151515
136 },
137 {
138 "Address": "0x1f",
139 "Bus": 29,
140 "Labels": [
141 "in0",
142 "in1",
143 "in2",
144 "in3",
145 "in4",
146 "in5"
147 ],
148 "Name": "MB_ADC1",
149 "Thresholds": [
150 {
151 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]152 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]153 "Label": "in0",
154 "Name": "lower critical",
155 "Severity": 1,
156 "Value": 10.8
157 },
158 {
159 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]160 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]161 "Label": "in0",
162 "Name": "upper critical",
163 "Severity": 1,
164 "Value": 13.2
165 },
166 {
167 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]168 "Hysteresis": 0.095,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]169 "Label": "in1",
170 "Name": "lower critical",
171 "Severity": 1,
172 "Value": 4.75
173 },
174 {
175 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]176 "Hysteresis": 0.105,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]177 "Label": "in1",
178 "Name": "upper critical",
179 "Severity": 1,
180 "Value": 5.25
181 },
182 {
183 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]184 "Hysteresis": 0.0626,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]185 "Label": "in2",
186 "Name": "lower critical",
187 "Severity": 1,
188 "Value": 3.13
189 },
190 {
191 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]192 "Hysteresis": 0.0692,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]193 "Label": "in2",
194 "Name": "upper critical",
195 "Severity": 1,
196 "Value": 3.46
197 },
198 {
199 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]200 "Hysteresis": 0.0342,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]201 "Label": "in3",
202 "Name": "lower critical",
203 "Severity": 1,
204 "Value": 1.71
205 },
206 {
207 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]208 "Hysteresis": 0.0378,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]209 "Label": "in3",
210 "Name": "upper critical",
211 "Severity": 1,
212 "Value": 1.89
213 },
214 {
215 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]216 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]217 "Label": "in4",
218 "Name": "lower critical",
219 "Severity": 1,
220 "Value": 10.8
221 },
222 {
223 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]224 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]225 "Label": "in4",
226 "Name": "upper critical",
227 "Severity": 1,
228 "Value": 13.2
229 },
230 {
231 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]232 "Hysteresis": 0.0342,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]233 "Label": "in5",
234 "Name": "lower critical",
235 "Severity": 1,
236 "Value": 1.71
237 },
238 {
239 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]240 "Hysteresis": 0.0378,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]241 "Label": "in5",
242 "Name": "upper critical",
243 "Severity": 1,
244 "Value": 1.89
245 }
246 ],
247 "Type": "ADC128D818",
248 "in0_Name": "MB_P12V_MEM0_VOLT_V",
249 "in0_Scale": 151.515151515,
250 "in1_Name": "MB_P5V_STBY_VOLT_V",
251 "in1_Scale": 281.29395218,
252 "in2_Name": "MB_PVDD33_S5_VOLT_V",
253 "in2_Scale": 500,
254 "in3_Name": "MB_P1V8_STBY_VOLT_V",
255 "in4_Name": "MB_P12V_MEM1_VOLT_V",
256 "in4_Scale": 151.515151515,
257 "in5_Name": "MB_P1V8_CPU_RT_VOLT_V",
258 "in5_PowerState": "On"
259 },
260 {
261 "Address": "$address",
262 "Bus": "$bus",
263 "Name": "MB FRU",
264 "Type": "EEPROM"
265 },
266 {
267 "Address": "0x45",
268 "Bus": 23,
269 "Labels": [
270 "in1",
271 "curr1",
272 "power1"
273 ],
274 "Name": "MB_E1S0",
275 "PowerState": "On",
276 "Thresholds": [
277 {
278 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]279 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]280 "Label": "in1",
281 "Name": "lower critical",
282 "Severity": 1,
283 "Value": 10.8
284 },
285 {
286 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]287 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]288 "Label": "in1",
289 "Name": "upper critical",
290 "Severity": 1,
291 "Value": 13.2
292 },
293 {
294 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]295 "Hysteresis": 0.042,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]296 "Label": "curr1",
297 "Name": "upper critical",
298 "Severity": 1,
299 "Value": 2.1
300 },
301 {
302 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]303 "Hysteresis": 0.5,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]304 "Label": "power1",
305 "Name": "upper critical",
306 "Severity": 1,
307 "Value": 25.0
308 }
309 ],
310 "Type": "INA230",
311 "curr1_Name": "MB_E1S0_P12V_CURR_A",
312 "in1_Name": "MB_E1S0_P12V_VOLT_V",
313 "power1_Name": "MB_E1S0_P12V_PWR_W"
314 },
315 {
316 "Address": "0x45",
317 "Bus": 22,
318 "Labels": [
319 "in1",
320 "curr1",
321 "power1"
322 ],
323 "Name": "MB_E1S1",
324 "PowerState": "On",
325 "Thresholds": [
326 {
327 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]328 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]329 "Label": "in1",
330 "Name": "lower critical",
331 "Severity": 1,
332 "Value": 10.8
333 },
334 {
335 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]336 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]337 "Label": "in1",
338 "Name": "upper critical",
339 "Severity": 1,
340 "Value": 13.2
341 },
342 {
343 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]344 "Hysteresis": 0.042,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]345 "Label": "curr1",
346 "Name": "upper critical",
347 "Severity": 1,
348 "Value": 2.1
349 },
350 {
351 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]352 "Hysteresis": 0.5,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]353 "Label": "power1",
354 "Name": "upper critical",
355 "Severity": 1,
356 "Value": 25.0
357 }
358 ],
359 "Type": "INA230",
360 "curr1_Name": "MB_E1S1_P12V_CURR_A",
361 "in1_Name": "MB_E1S1_P12V_VOLT_V",
362 "power1_Name": "MB_E1S1_P12V_PWR_W"
363 },
364 {
365 "Address": "0x45",
366 "Bus": 29,
367 "Labels": [
368 "in1",
369 "curr1",
370 "power1"
371 ],
372 "Name": "NIC_MEZZ",
373 "Thresholds": [
374 {
375 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]376 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]377 "Label": "in1",
378 "Name": "lower critical",
379 "Severity": 1,
380 "Value": 10.8
381 },
382 {
383 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]384 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]385 "Label": "in1",
386 "Name": "upper critical",
387 "Severity": 1,
388 "Value": 13.2
389 },
390 {
391 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]392 "Hysteresis": 0.114,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]393 "Label": "curr1",
394 "Name": "upper critical",
395 "Severity": 1,
396 "Value": 5.7
397 },
398 {
399 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]400 "Hysteresis": 1.5,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]401 "Label": "power1",
402 "Name": "upper critical",
403 "Severity": 1,
404 "Value": 75.0
405 }
406 ],
407 "Type": "INA230",
408 "curr1_Name": "NIC_MEZZ_P12V_CURR_A",
409 "in1_Name": "NIC_MEZZ_P12V_VOLT_V",
410 "power1_Name": "NIC_MEZZ_P12V_PWR_W"
411 },
412 {
413 "Address": "0x20",
414 "Bus": 28,
415 "Labels": [
416 "iout1",
417 "vin",
418 "vout1",
419 "pin",
420 "temp1"
421 ],
422 "Name": "MB_HSC",
423 "Thresholds": [
424 {
425 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]426 "Hysteresis": 1.44,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]427 "Label": "iout1",
428 "Name": "upper critical",
429 "Severity": 1,
430 "Value": 72.0
431 },
432 {
433 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]434 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]435 "Label": "vin",
436 "Name": "lower critical",
437 "Severity": 1,
438 "Value": 10.8
439 },
440 {
441 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]442 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]443 "Label": "vin",
444 "Name": "upper critical",
445 "Severity": 1,
446 "Value": 13.2
447 },
448 {
449 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]450 "Hysteresis": 0.216,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]451 "Label": "vout1",
452 "Name": "lower critical",
453 "Severity": 1,
454 "Value": 10.8
455 },
456 {
457 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]458 "Hysteresis": 0.264,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]459 "Label": "vout1",
460 "Name": "upper critical",
461 "Severity": 1,
462 "Value": 13.2
463 },
464 {
465 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]466 "Hysteresis": 19.0,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]467 "Label": "pin",
468 "Name": "upper critical",
469 "Severity": 1,
470 "Value": 950.0
471 },
472 {
473 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]474 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]475 "Label": "temp1",
476 "Name": "upper critical",
477 "Severity": 1,
478 "Value": 80.0
479 }
480 ],
481 "Type": "MP5990",
482 "iout1_Name": "MB_HSC_CURR_A",
483 "pin_Name": "MB_HSC_PWR_W",
484 "temp1_Name": "MB_HSC_TEMP_C",
485 "vin_Name": "MB_HSC_VIN_VOLT_V",
486 "vout1_Name": "MB_HSC_VOUT_VOLT_V"
487 },
488 {
489 "Address": "0x6a",
490 "Bus": 23,
491 "Name": "MB_E1S0_TEMP_C",
492 "PowerState": "On",
493 "Thresholds": [
494 {
495 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]496 "Hysteresis": 0.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]497 "Name": "lower critical",
498 "Severity": 1,
499 "Value": 5.0
500 },
501 {
502 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]503 "Hysteresis": 1.4,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]504 "Name": "upper critical",
505 "Severity": 1,
506 "Value": 70.0
507 }
508 ],
509 "Type": "NVME1000"
510 },
511 {
512 "Address": "0x6a",
513 "Bus": 22,
514 "Name": "MB_E1S1_TEMP_C",
515 "PowerState": "On",
516 "Thresholds": [
517 {
518 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]519 "Hysteresis": 0.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]520 "Name": "lower critical",
521 "Severity": 1,
522 "Value": 5.0
523 },
524 {
525 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]526 "Hysteresis": 1.4,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]527 "Name": "upper critical",
528 "Severity": 1,
529 "Value": 70.0
530 }
531 ],
532 "Type": "NVME1000"
533 },
534 {
535 "Address": "0x24",
536 "Bus": 12,
537 "Name": "MB_RETIMER0_TEMP_C",
538 "PowerState": "On",
539 "Thresholds": [
540 {
541 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]542 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]543 "Name": "lower critical",
544 "Severity": 1,
545 "Value": -1.0
546 },
547 {
548 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]549 "Hysteresis": 2.0,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]550 "Name": "upper critical",
551 "Severity": 1,
552 "Value": 100.0
553 }
554 ],
555 "Type": "PT5161L"
556 },
557 {
558 "Address": "0x24",
559 "Bus": 21,
560 "Name": "MB_RETIMER1_TEMP_C",
561 "PowerState": "On",
562 "Thresholds": [
563 {
564 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]565 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]566 "Name": "lower critical",
567 "Severity": 1,
568 "Value": -1.0
569 },
570 {
571 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]572 "Hysteresis": 2.0,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]573 "Name": "upper critical",
574 "Severity": 1,
575 "Value": 100.0
576 }
577 ],
578 "Type": "PT5161L"
579 },
580 {
581 "Address": "0x3C",
582 "Bus": 7,
583 "Labels": [
584 "power1",
585 "power2",
586 "power3",
587 "power4",
588 "power5",
589 "power6",
590 "power7",
591 "power8",
592 "power9",
593 "temp1",
594 "temp2",
595 "temp3",
596 "temp4",
597 "temp5",
598 "temp6",
599 "temp7",
600 "temp8"
601 ],
602 "Name": "SBRMI",
603 "PowerState": "BiosPost",
604 "Thresholds": [
605 {
606 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]607 "Hysteresis": 12.8,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]608 "Label": "power1",
609 "Name": "upper critical",
610 "Severity": 1,
611 "Value": 640.0
612 },
613 {
614 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]615 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]616 "Label": "power2",
617 "Name": "upper critical",
618 "Severity": 1,
619 "Value": 14.0
620 },
621 {
622 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]623 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]624 "Label": "power3",
625 "Name": "upper critical",
626 "Severity": 1,
627 "Value": 14.0
628 },
629 {
630 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]631 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]632 "Label": "power4",
633 "Name": "upper critical",
634 "Severity": 1,
635 "Value": 14.0
636 },
637 {
638 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]639 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]640 "Label": "power5",
641 "Name": "upper critical",
642 "Severity": 1,
643 "Value": 14.0
644 },
645 {
646 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]647 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]648 "Label": "power6",
649 "Name": "upper critical",
650 "Severity": 1,
651 "Value": 14.0
652 },
653 {
654 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]655 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]656 "Label": "power7",
657 "Name": "upper critical",
658 "Severity": 1,
659 "Value": 14.0
660 },
661 {
662 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]663 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]664 "Label": "power8",
665 "Name": "upper critical",
666 "Severity": 1,
667 "Value": 14.0
668 },
669 {
670 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]671 "Hysteresis": 0.28,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]672 "Label": "power9",
673 "Name": "upper critical",
674 "Severity": 1,
675 "Value": 14.0
676 },
677 {
678 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]679 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]680 "Label": "temp1",
681 "Name": "lower critical",
682 "Severity": 1,
683 "Value": -1.0
684 },
685 {
686 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]687 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]688 "Label": "temp1",
689 "Name": "upper critical",
690 "Severity": 1,
691 "Value": 80.0
692 },
693 {
694 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]695 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]696 "Label": "temp2",
697 "Name": "lower critical",
698 "Severity": 1,
699 "Value": -1.0
700 },
701 {
702 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]703 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]704 "Label": "temp2",
705 "Name": "upper critical",
706 "Severity": 1,
707 "Value": 80.0
708 },
709 {
710 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]711 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]712 "Label": "temp3",
713 "Name": "lower critical",
714 "Severity": 1,
715 "Value": -1.0
716 },
717 {
718 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]719 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]720 "Label": "temp3",
721 "Name": "upper critical",
722 "Severity": 1,
723 "Value": 80.0
724 },
725 {
726 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]727 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]728 "Label": "temp4",
729 "Name": "lower critical",
730 "Severity": 1,
731 "Value": -1.0
732 },
733 {
734 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]735 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]736 "Label": "temp4",
737 "Name": "upper critical",
738 "Severity": 1,
739 "Value": 80.0
740 },
741 {
742 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]743 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]744 "Label": "temp5",
745 "Name": "lower critical",
746 "Severity": 1,
747 "Value": -1.0
748 },
749 {
750 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]751 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]752 "Label": "temp5",
753 "Name": "upper critical",
754 "Severity": 1,
755 "Value": 80.0
756 },
757 {
758 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]759 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]760 "Label": "temp6",
761 "Name": "lower critical",
762 "Severity": 1,
763 "Value": -1.0
764 },
765 {
766 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]767 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]768 "Label": "temp6",
769 "Name": "upper critical",
770 "Severity": 1,
771 "Value": 80.0
772 },
773 {
774 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]775 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]776 "Label": "temp7",
777 "Name": "lower critical",
778 "Severity": 1,
779 "Value": -1.0
780 },
781 {
782 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]783 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]784 "Label": "temp7",
785 "Name": "upper critical",
786 "Severity": 1,
787 "Value": 80.0
788 },
789 {
790 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]791 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]792 "Label": "temp8",
793 "Name": "lower critical",
794 "Severity": 1,
795 "Value": -1.0
796 },
797 {
798 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]799 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]800 "Label": "temp8",
801 "Name": "upper critical",
802 "Severity": 1,
803 "Value": 80.0
804 }
805 ],
806 "Type": "SBRMI",
807 "power1_Name": "MB_CPU_PKG_PWR_W",
808 "power2_Name": "MB_DIMM_A0_PWR_W",
809 "power3_Name": "MB_DIMM_A1_PWR_W",
810 "power4_Name": "MB_DIMM_A2_PWR_W",
811 "power5_Name": "MB_DIMM_A4_PWR_W",
812 "power6_Name": "MB_DIMM_A6_PWR_W",
813 "power7_Name": "MB_DIMM_A7_PWR_W",
814 "power8_Name": "MB_DIMM_A8_PWR_W",
815 "power9_Name": "MB_DIMM_A10_PWR_W",
816 "temp1_Name": "MB_DIMM_A0_TEMP_C",
817 "temp2_Name": "MB_DIMM_A1_TEMP_C",
818 "temp3_Name": "MB_DIMM_A2_TEMP_C",
819 "temp4_Name": "MB_DIMM_A4_TEMP_C",
820 "temp5_Name": "MB_DIMM_A6_TEMP_C",
821 "temp6_Name": "MB_DIMM_A7_TEMP_C",
822 "temp7_Name": "MB_DIMM_A8_TEMP_C",
823 "temp8_Name": "MB_DIMM_A10_TEMP_C"
824 },
825 {
826 "Address": "0x4C",
827 "Bus": 7,
828 "Name": "MB_CPU_TEMP_C",
829 "PowerState": "BiosPost",
830 "Thresholds": [
831 {
832 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]833 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]834 "Name": "lower critical",
835 "Severity": 1,
836 "Value": -1.0
837 },
838 {
839 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]840 "Hysteresis": 1.9,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]841 "Name": "upper critical",
842 "Severity": 1,
843 "Value": 95.0
844 }
845 ],
846 "Type": "SBTSI"
847 },
848 {
849 "Address": "0x49",
850 "Bus": 29,
851 "Name": "MB_OUTLET_TEMP_C",
852 "Thresholds": [
853 {
854 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]855 "Hysteresis": 0.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]856 "Name": "lower critical",
857 "Severity": 1,
858 "Value": 5.0
859 },
860 {
861 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]862 "Hysteresis": 1.6,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]863 "Name": "upper critical",
864 "Severity": 1,
865 "Value": 80.0
866 }
867 ],
868 "Type": "TMP75"
869 },
870 {
871 "Address": "0x4A",
872 "Bus": 29,
873 "Name": "MB_INLET_TEMP_C",
874 "Thresholds": [
875 {
876 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]877 "Hysteresis": 0.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]878 "Name": "lower critical",
879 "Severity": 1,
880 "Value": 5.0
881 },
882 {
883 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]884 "Hysteresis": 1.2,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]885 "Name": "upper critical",
886 "Severity": 1,
887 "Value": 60.0
888 }
889 ],
890 "Type": "TMP75"
891 },
892 {
893 "Address": "0x68",
894 "Bus": 28,
895 "Labels": [
896 "iout1",
897 "vout1",
898 "pout1",
899 "temp1"
900 ],
901 "Name": "MB_VR_CPU_PVDD11",
902 "PowerState": "On",
903 "Thresholds": [
904 {
905 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]906 "Hysteresis": 1.18,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]907 "Label": "iout1",
908 "Name": "upper critical",
909 "Severity": 1,
910 "Value": 59.0
911 },
912 {
913 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]914 "Hysteresis": 0.0209,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]915 "Label": "vout1",
916 "Name": "lower critical",
917 "Severity": 1,
918 "Value": 1.045
919 },
920 {
921 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]922 "Hysteresis": 0.0231,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]923 "Label": "vout1",
924 "Name": "upper critical",
925 "Severity": 1,
926 "Value": 1.155
927 },
928 {
929 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]930 "Hysteresis": 1.3,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]931 "Label": "pout1",
932 "Name": "upper critical",
933 "Severity": 1,
934 "Value": 65.0
935 },
936 {
937 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]938 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]939 "Label": "temp1",
940 "Name": "lower critical",
941 "Severity": 1,
942 "Value": -1.0
943 },
944 {
945 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]946 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]947 "Label": "temp1",
948 "Name": "upper critical",
949 "Severity": 1,
950 "Value": 105.0
951 }
952 ],
953 "Type": "XDPE152C4",
954 "iout1_Name": "MB_VR_CPU_PVDD11_CURR_A",
955 "pout1_Name": "MB_VR_CPU_PVDD11_PWR_W",
956 "temp1_Name": "MB_VR_CPU_PVDD11_TEMP_C",
957 "vout1_Name": "MB_VR_CPU_PVDD11_VOLT_V"
958 },
959 {
960 "Address": "0x64",
961 "Bus": 28,
962 "Labels": [
963 "iout1",
964 "iout2",
965 "vout1",
966 "vout2",
967 "pout1",
968 "pout2",
969 "temp1",
970 "temp2"
971 ],
972 "Name": "MB_VR_CPU_VCORE0_SOC",
973 "PowerState": "On",
974 "Thresholds": [
975 {
976 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]977 "Hysteresis": 6.36,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]978 "Label": "iout1",
979 "Name": "upper critical",
980 "Severity": 1,
981 "Value": 318.0
982 },
983 {
984 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]985 "Hysteresis": 4.2,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]986 "Label": "iout2",
987 "Name": "upper critical",
988 "Severity": 1,
989 "Value": 210.0
990 },
991 {
992 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]993 "Hysteresis": 0.0106,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]994 "Label": "vout1",
995 "Name": "lower critical",
996 "Severity": 1,
997 "Value": 0.53
998 },
999 {
1000 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1001 "Hysteresis": 0.0304,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1002 "Label": "vout1",
1003 "Name": "upper critical",
1004 "Severity": 1,
1005 "Value": 1.52
1006 },
1007 {
1008 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1009 "Hysteresis": 0.0146,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1010 "Label": "vout2",
1011 "Name": "lower critical",
1012 "Severity": 1,
1013 "Value": 0.73
1014 },
1015 {
1016 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1017 "Hysteresis": 0.0244,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1018 "Label": "vout2",
1019 "Name": "upper critical",
1020 "Severity": 1,
1021 "Value": 1.22
1022 },
1023 {
1024 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1025 "Hysteresis": 3.5,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1026 "Label": "pout1",
1027 "Name": "upper critical",
1028 "Severity": 1,
1029 "Value": 175.0
1030 },
1031 {
1032 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1033 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1034 "Label": "pout2",
1035 "Name": "upper critical",
1036 "Severity": 1,
1037 "Value": 105.0
1038 },
1039 {
1040 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1041 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1042 "Label": "temp1",
1043 "Name": "lower critical",
1044 "Severity": 1,
1045 "Value": -1.0
1046 },
1047 {
1048 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1049 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1050 "Label": "temp1",
1051 "Name": "upper critical",
1052 "Severity": 1,
1053 "Value": 105.0
1054 },
1055 {
1056 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1057 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1058 "Label": "temp2",
1059 "Name": "lower critical",
1060 "Severity": 1,
1061 "Value": -1.0
1062 },
1063 {
1064 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1065 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1066 "Label": "temp2",
1067 "Name": "upper critical",
1068 "Severity": 1,
1069 "Value": 105.0
1070 }
1071 ],
1072 "Type": "XDPE152C4",
1073 "iout1_Name": "MB_VR_CPU_VCORE0_CURR_A",
1074 "iout2_Name": "MB_VR_CPU_SOC_CURR_A",
1075 "pout1_Name": "MB_VR_CPU_VCORE0_PWR_W",
1076 "pout2_Name": "MB_VR_CPU_SOC_PWR_W",
1077 "temp1_Name": "MB_VR_CPU_VCORE0_TEMP_C",
1078 "temp2_Name": "MB_VR_CPU_SOC_TEMP_C",
1079 "vout1_Name": "MB_VR_CPU_VCORE0_VOLT_V",
1080 "vout2_Name": "MB_VR_CPU_SOC_VOLT_V"
1081 },
1082 {
1083 "Address": "0x66",
1084 "Bus": 28,
1085 "Labels": [
1086 "iout1",
1087 "iout2",
1088 "vout1",
1089 "vout2",
1090 "pout1",
1091 "pout2",
1092 "temp1",
1093 "temp2"
1094 ],
1095 "Name": "MB_VR_CPU_VCORE1_PDDIO",
1096 "PowerState": "On",
1097 "Thresholds": [
1098 {
1099 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1100 "Hysteresis": 6.36,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1101 "Label": "iout1",
1102 "Name": "upper critical",
1103 "Severity": 1,
1104 "Value": 318.0
1105 },
1106 {
1107 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1108 "Hysteresis": 2.66,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1109 "Label": "iout2",
1110 "Name": "upper critical",
1111 "Severity": 1,
1112 "Value": 133.0
1113 },
1114 {
1115 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1116 "Hysteresis": 0.0106,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1117 "Label": "vout1",
1118 "Name": "lower critical",
1119 "Severity": 1,
1120 "Value": 0.53
1121 },
1122 {
1123 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1124 "Hysteresis": 0.0304,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1125 "Label": "vout1",
1126 "Name": "upper critical",
1127 "Severity": 1,
1128 "Value": 1.52
1129 },
1130 {
1131 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1132 "Hysteresis": 0.0176,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1133 "Label": "vout2",
1134 "Name": "lower critical",
1135 "Severity": 1,
1136 "Value": 0.88
1137 },
1138 {
1139 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1140 "Hysteresis": 0.0244,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1141 "Label": "vout2",
1142 "Name": "upper critical",
1143 "Severity": 1,
1144 "Value": 1.22
1145 },
1146 {
1147 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1148 "Hysteresis": 3.5,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1149 "Label": "pout1",
1150 "Name": "upper critical",
1151 "Severity": 1,
1152 "Value": 175.0
1153 },
1154 {
1155 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1156 "Hysteresis": 2.4,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1157 "Label": "pout2",
1158 "Name": "upper critical",
1159 "Severity": 1,
1160 "Value": 120.0
1161 },
1162 {
1163 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1164 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1165 "Label": "temp1",
1166 "Name": "lower critical",
1167 "Severity": 1,
1168 "Value": -1.0
1169 },
1170 {
1171 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1172 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1173 "Label": "temp1",
1174 "Name": "upper critical",
1175 "Severity": 1,
1176 "Value": 105.0
1177 },
1178 {
1179 "Direction": "less than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1180 "Hysteresis": 0.02,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1181 "Label": "temp2",
1182 "Name": "lower critical",
1183 "Severity": 1,
1184 "Value": -1.0
1185 },
1186 {
1187 "Direction": "greater than",
Daniel Hsub9735362024-12-12 14:50:24 +0800[diff] [blame]1188 "Hysteresis": 2.1,
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1189 "Label": "temp2",
1190 "Name": "upper critical",
1191 "Severity": 1,
1192 "Value": 105.0
1193 }
1194 ],
1195 "Type": "XDPE152C4",
1196 "iout1_Name": "MB_VR_CPU_VCORE1_CURR_A",
1197 "iout2_Name": "MB_VR_CPU_PDDIO_CURR_A",
1198 "pout1_Name": "MB_VR_CPU_VCORE1_PWR_W",
1199 "pout2_Name": "MB_VR_CPU_PDDIO_PWR_W",
1200 "temp1_Name": "MB_VR_CPU_VCORE1_TEMP_C",
1201 "temp2_Name": "MB_VR_CPU_PDDIO_TEMP_C",
1202 "vout1_Name": "MB_VR_CPU_VCORE1_VOLT_V",
1203 "vout2_Name": "MB_VR_CPU_PDDIO_VOLT_V"
1204 }
1205 ],
1206 "Name": "Harma MB",
1207 "Probe": [
1208 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB EVT', 'BOARD_PART_NUMBER': '3BF0MMA0050'})",
1209 "OR",
1210 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB ', 'BOARD_INFO_AM4': 'vr-xdpe'})"
1211 ],
1212 "Type": "Board",
1213 "xyz.openbmc_project.Inventory.Decorator.Asset": {
1214 "BuildDate": "$BOARD_MANUFACTURE_DATE",
1215 "Manufacturer": "$BOARD_MANUFACTURER",
1216 "Model": "$BOARD_PRODUCT_NAME",
1217 "PartNumber": "$BOARD_PART_NUMBER",
1218 "SerialNumber": "$BOARD_SERIAL_NUMBER",
1219 "SparePartNumber": "$BOARD_INFO_AM1"
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1220 },
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1221 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
1222 "AssetTag": "$PRODUCT_ASSET_TAG"
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1223 },
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1224 "xyz.openbmc_project.Inventory.Item.Board.Motherboard": {
1225 "ProductId": 1
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1226 }
Peter Yin141718c2024-07-15 23:27:01 +0800[diff] [blame]1227 },
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1228 {
Daniel Hsu621fdf92025-01-22 11:07:55 +0800[diff] [blame^]1229 "Exposes": [
1230 {
1231 "Class": "fan",
1232 "FFGainCoefficient": 1.0,
1233 "FFOffCoefficient": 0.0,
1234 "ICoefficient": 0.0,
1235 "ILimitMax": 0.0,
1236 "ILimitMin": 0.0,
1237 "Inputs": [
1238 "FAN_BP1_FAN1_TACH_IL_SPEED_RPM",
1239 "FAN_BP1_FAN1_TACH_OL_SPEED_RPM",
1240 "FAN_BP1_FAN2_TACH_IL_SPEED_RPM",
1241 "FAN_BP1_FAN2_TACH_OL_SPEED_RPM",
1242 "FAN_BP1_FAN3_TACH_IL_SPEED_RPM",
1243 "FAN_BP1_FAN3_TACH_OL_SPEED_RPM",
1244 "FAN_BP1_FAN4_TACH_IL_SPEED_RPM",
1245 "FAN_BP1_FAN4_TACH_OL_SPEED_RPM",
1246 "FAN_BP2_FAN1_TACH_IL_SPEED_RPM",
1247 "FAN_BP2_FAN1_TACH_OL_SPEED_RPM",
1248 "FAN_BP2_FAN2_TACH_IL_SPEED_RPM",
1249 "FAN_BP2_FAN2_TACH_OL_SPEED_RPM",
1250 "FAN_BP2_FAN3_TACH_IL_SPEED_RPM",
1251 "FAN_BP2_FAN3_TACH_OL_SPEED_RPM",
1252 "FAN_BP2_FAN4_TACH_IL_SPEED_RPM",
1253 "FAN_BP2_FAN4_TACH_OL_SPEED_RPM"
1254 ],
1255 "Name": "All Fan",
1256 "OutLimitMax": 100.0,
1257 "OutLimitMin": 0.0,
1258 "Outputs": [
1259 "FAN_BP1_FAN_PWM",
1260 "FAN_BP1_FAN_PWM",
1261 "FAN_BP1_FAN_PWM",
1262 "FAN_BP1_FAN_PWM",
1263 "FAN_BP1_FAN_PWM",
1264 "FAN_BP1_FAN_PWM",
1265 "FAN_BP1_FAN_PWM",
1266 "FAN_BP1_FAN_PWM",
1267 "FAN_BP2_FAN_PWM",
1268 "FAN_BP2_FAN_PWM",
1269 "FAN_BP2_FAN_PWM",
1270 "FAN_BP2_FAN_PWM",
1271 "FAN_BP2_FAN_PWM",
1272 "FAN_BP2_FAN_PWM",
1273 "FAN_BP2_FAN_PWM",
1274 "FAN_BP2_FAN_PWM"
1275 ],
1276 "PCoefficient": 0.0,
1277 "SlewNeg": 0.0,
1278 "SlewPos": 0.0,
1279 "Type": "Pid",
1280 "Zones": [
1281 "Zone 0"
1282 ]
1283 },
1284 {
1285 "CheckHysteresisWithSetpoint": true,
1286 "Class": "temp",
1287 "DCoefficient": 0.0,
1288 "FFGainCoefficient": 0.0,
1289 "FFOffCoefficient": 0.0,
1290 "ICoefficient": -0.0035,
1291 "ILimitMax": 100,
1292 "ILimitMin": -50,
1293 "InputUnavailableAsFailed": false,
1294 "Inputs": [
1295 "MB_CPU_TEMP_C"
1296 ],
1297 "Name": "PID_MB_CPU",
1298 "NegativeHysteresis": 2.0,
1299 "OutLimitMax": 100,
1300 "OutLimitMin": 0,
1301 "PCoefficient": -1.0,
1302 "PositiveHysteresis": 0.0,
1303 "SetPoint": 79.0,
1304 "SlewNeg": 0.0,
1305 "SlewPos": 0.0,
1306 "Type": "Pid",
1307 "Zones": [
1308 "Zone 0"
1309 ]
1310 },
1311 {
1312 "CheckHysteresisWithSetpoint": true,
1313 "Class": "temp",
1314 "DCoefficient": 0.0,
1315 "FFGainCoefficient": 0.0,
1316 "FFOffCoefficient": 0.0,
1317 "ICoefficient": -0.0035,
1318 "ILimitMax": 100,
1319 "ILimitMin": -50,
1320 "InputUnavailableAsFailed": false,
1321 "Inputs": [
1322 "MB_DIMM_A0_TEMP_C",
1323 "MB_DIMM_A1_TEMP_C",
1324 "MB_DIMM_A2_TEMP_C",
1325 "MB_DIMM_A4_TEMP_C",
1326 "MB_DIMM_A6_TEMP_C",
1327 "MB_DIMM_A7_TEMP_C",
1328 "MB_DIMM_A8_TEMP_C",
1329 "MB_DIMM_A10_TEMP_C"
1330 ],
1331 "Name": "PID_MB_DIMM",
1332 "NegativeHysteresis": 2.0,
1333 "OutLimitMax": 100,
1334 "OutLimitMin": 0,
1335 "PCoefficient": -3.0,
1336 "PositiveHysteresis": 0.0,
1337 "SetPoint": 79.0,
1338 "SlewNeg": 0.0,
1339 "SlewPos": 0.0,
1340 "Type": "Pid",
1341 "Zones": [
1342 "Zone 0"
1343 ]
1344 },
1345 {
1346 "AccumulateSetPoint": true,
1347 "CycleIntervalTimeMS": 1000,
1348 "FailSafePercent": 85.0,
1349 "MinThermalOutput": 0.0,
1350 "Name": "Zone 0",
1351 "Type": "Pid.Zone",
1352 "UpdateThermalsTimeMS": 1000
1353 },
1354 {
1355 "Class": "temp",
1356 "InputUnavailableAsFailed": false,
1357 "Inputs": [
1358 "SCM_INLET_TEMP_C"
1359 ],
1360 "Name": "Stepwise_SCM_INLET",
1361 "NegativeHysteresis": 2.0,
1362 "Output": [
1363 20.0,
1364 22.0,
1365 25.0,
1366 90.0
1367 ],
1368 "PositiveHysteresis": 0.0,
1369 "Reading": [
1370 25.0,
1371 30.0,
1372 35.0,
1373 40.0
1374 ],
1375 "Type": "Stepwise",
1376 "Zones": [
1377 "Zone 0"
1378 ]
1379 },
1380 {
1381 "Class": "temp",
1382 "InputUnavailableAsFailed": false,
1383 "Inputs": [
1384 "MB_CPU_TEMP_C"
1385 ],
1386 "Name": "Stepwise_MB_CPU",
1387 "NegativeHysteresis": 2.0,
1388 "Output": [
1389 20.0,
1390 23.0,
1391 25.0,
1392 27.0,
1393 30.0
1394 ],
1395 "PositiveHysteresis": 0.0,
1396 "Reading": [
1397 55.0,
1398 60.0,
1399 65.0,
1400 70.0,
1401 75.0
1402 ],
1403 "Type": "Stepwise",
1404 "Zones": [
1405 "Zone 0"
1406 ]
1407 },
1408 {
1409 "Class": "temp",
1410 "InputUnavailableAsFailed": false,
1411 "Inputs": [
1412 "MB_DIMM_A0_TEMP_C",
1413 "MB_DIMM_A1_TEMP_C",
1414 "MB_DIMM_A2_TEMP_C",
1415 "MB_DIMM_A4_TEMP_C",
1416 "MB_DIMM_A6_TEMP_C",
1417 "MB_DIMM_A7_TEMP_C",
1418 "MB_DIMM_A8_TEMP_C",
1419 "MB_DIMM_A10_TEMP_C"
1420 ],
1421 "Name": "Stepwise_MB_DIMM",
1422 "NegativeHysteresis": 2.0,
1423 "Output": [
1424 20.0,
1425 25.0,
1426 30.0
1427 ],
1428 "PositiveHysteresis": 0.0,
1429 "Reading": [
1430 60.0,
1431 70.0,
1432 75.0
1433 ],
1434 "Type": "Stepwise",
1435 "Zones": [
1436 "Zone 0"
1437 ]
1438 },
1439 {
1440 "Class": "temp",
1441 "InputUnavailableAsFailed": false,
1442 "Inputs": [
1443 "MB_VR_CPU_VCORE0_TEMP_C",
1444 "MB_VR_CPU_VCORE1_TEMP_C",
1445 "MB_VR_CPU_PVDD11_TEMP_C",
1446 "MB_VR_CPU_PDDIO_TEMP_C",
1447 "MB_VR_CPU_SOC_TEMP_C"
1448 ],
1449 "Name": "Stepwise_MB_VR",
1450 "NegativeHysteresis": 2.0,
1451 "Output": [
1452 20.0,
1453 25.0,
1454 90.0
1455 ],
1456 "PositiveHysteresis": 0.0,
1457 "Reading": [
1458 80.0,
1459 90.0,
1460 100.0
1461 ],
1462 "Type": "Stepwise",
1463 "Zones": [
1464 "Zone 0"
1465 ]
1466 },
1467 {
1468 "Class": "temp",
1469 "InputUnavailableAsFailed": false,
1470 "Inputs": [
1471 "MB_RETIMER0_TEMP_C",
1472 "MB_RETIMER1_TEMP_C"
1473 ],
1474 "Name": "Stepwise_MB_RETIMER",
1475 "NegativeHysteresis": 2.0,
1476 "Output": [
1477 20.0,
1478 25.0,
1479 90.0
1480 ],
1481 "PositiveHysteresis": 0.0,
1482 "Reading": [
1483 80.0,
1484 90.0,
1485 100.0
1486 ],
1487 "Type": "Stepwise",
1488 "Zones": [
1489 "Zone 0"
1490 ]
1491 },
1492 {
1493 "Class": "temp",
1494 "InputUnavailableAsFailed": false,
1495 "Inputs": [
1496 "NIC_Temp_1"
1497 ],
1498 "Name": "Stepwise_NIC",
1499 "NegativeHysteresis": 2.0,
1500 "Output": [
1501 20.0,
1502 25.0,
1503 90.0
1504 ],
1505 "PositiveHysteresis": 0.0,
1506 "Reading": [
1507 80.0,
1508 90.0,
1509 100.0
1510 ],
1511 "Type": "Stepwise",
1512 "Zones": [
1513 "Zone 0"
1514 ]
1515 },
1516 {
1517 "Class": "temp",
1518 "InputUnavailableAsFailed": false,
1519 "Inputs": [
1520 "MB_E1S0_TEMP_C",
1521 "MB_E1S1_TEMP_C"
1522 ],
1523 "Name": "Stepwise_E1S",
1524 "NegativeHysteresis": 2.0,
1525 "Output": [
1526 20.0,
1527 25.0,
1528 90.0
1529 ],
1530 "PositiveHysteresis": 0.0,
1531 "Reading": [
1532 60.0,
1533 65.0,
1534 70.0
1535 ],
1536 "Type": "Stepwise",
1537 "Zones": [
1538 "Zone 0"
1539 ]
1540 },
1541 {
1542 "Class": "temp",
1543 "InputUnavailableAsFailed": false,
1544 "Inputs": [
1545 "PDB_BRICK_TEMP_C"
1546 ],
1547 "Name": "Stepwise_Brick",
1548 "NegativeHysteresis": 2.0,
1549 "Output": [
1550 20.0,
1551 25.0,
1552 90.0
1553 ],
1554 "PositiveHysteresis": 0.0,
1555 "Reading": [
1556 80.0,
1557 90.0,
1558 100.0
1559 ],
1560 "Type": "Stepwise",
1561 "Zones": [
1562 "Zone 0"
1563 ]
1564 }
1565 ],
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1566 "Name": "Harma Chassis",
1567 "Probe": [
1568 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB EVT', 'BOARD_PART_NUMBER': '3BF0MMA0050'})",
1569 "OR",
1570 "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Harma MB ', 'BOARD_INFO_AM4': 'vr-xdpe'})"
1571 ],
1572 "Type": "Chassis",
1573 "xyz.openbmc_project.Inventory.Decorator.Asset": {
1574 "Manufacturer": "$PRODUCT_MANUFACTURER",
1575 "Model": "$PRODUCT_PRODUCT_NAME",
1576 "PartNumber": "$PRODUCT_PART_NUMBER",
1577 "SerialNumber": "$PRODUCT_INFO_AM2",
1578 "SparePartNumber": "$PRODUCT_FRU_VERSION_ID"
1579 },
1580 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
1581 "AssetTag": "$PRODUCT_INFO_AM3"
1582 }
Peter Yin96552402024-05-17 11:17:34 +0800[diff] [blame]1583 }
Peter Yin0740b172024-10-21 14:37:42 +0800[diff] [blame]1584]