Gitiles
Code Review Sign In
gerrit.openbmc.org / openbmc / entity-manager / 7233a87b6a9880471c6d32f554f89aae05951b70 / . / configurations / yosemite4_sentineldome_t1.json
blob: 21b93ebebdeffbe50b0ed43a0a1427adfb140751 [file] [log] [blame]
Delphine CC Chiue41b5cb2023-11-30 16:13:52 +0800[diff] [blame]1{
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]2 "Exposes": [
3 {
4 "CheckHysteresisWithSetpoint": true,
5 "Class": "temp",
6 "DCoefficient": 0.0,
7 "FFGainCoefficient": 0.0,
8 "FFOffCoefficient": 0.0,
9 "ICoefficient": -0.035,
10 "ILimitMax": 100,
11 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]12 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]13 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]14 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
15 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
16 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
17 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
18 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
19 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
20 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
21 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
22 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
23 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]24 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]25 "Name": "PID_MB_DIMM_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]26 "NegativeHysteresis": 2.0,
27 "OutLimitMax": 100,
28 "OutLimitMin": 0,
29 "PCoefficient": -3.0,
30 "PositiveHysteresis": 0.0,
31 "SetPoint": 75.0,
32 "SlewNeg": 0.0,
33 "SlewPos": 0.0,
34 "Type": "Pid",
35 "Zones": [
36 "Zone 1"
37 ]
38 },
39 {
40 "CheckHysteresisWithSetpoint": true,
41 "Class": "temp",
42 "DCoefficient": 0.0,
43 "FFGainCoefficient": 0.0,
44 "FFOffCoefficient": 0.0,
45 "ICoefficient": -0.035,
46 "ILimitMax": 100,
47 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]48 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]49 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]50 "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]51 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]52 "Name": "PID_MB_CPU_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]53 "NegativeHysteresis": 3.0,
54 "OutLimitMax": 100,
55 "OutLimitMin": 0,
56 "PCoefficient": -5.5,
57 "PositiveHysteresis": 0.0,
58 "SetPoint": 74.0,
59 "SlewNeg": 0.0,
60 "SlewPos": 0.0,
61 "Type": "Pid",
62 "Zones": [
63 "Zone 1"
64 ]
65 },
66 {
67 "CheckHysteresisWithSetpoint": true,
68 "Class": "temp",
69 "DCoefficient": 0.0,
70 "FFGainCoefficient": 0.0,
71 "FFOffCoefficient": 0.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]72 "ICoefficient": -0.035,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]73 "ILimitMax": 100,
74 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]75 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]76 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]77 "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]78 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]79 "Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]80 "NegativeHysteresis": 2.0,
81 "OutLimitMax": 100,
82 "OutLimitMin": 0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]83 "PCoefficient": -5.5,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]84 "PositiveHysteresis": 0.0,
85 "SetPoint": 68.0,
86 "SlewNeg": 0.0,
87 "SlewPos": 0.0,
88 "Type": "Pid",
89 "Zones": [
90 "Zone 1"
91 ]
92 },
93 {
94 "CheckHysteresisWithSetpoint": true,
95 "Class": "temp",
96 "DCoefficient": 0.0,
97 "FFGainCoefficient": 0.0,
98 "FFOffCoefficient": 0.0,
99 "ICoefficient": -0.02,
100 "ILimitMax": 100,
101 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]102 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]103 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]104 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
105 "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
106 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
107 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
108 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]109 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]110 "Name": "PID_MB_VR_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]111 "NegativeHysteresis": 3.0,
112 "OutLimitMax": 100,
113 "OutLimitMin": 0,
114 "PCoefficient": -3.0,
115 "PositiveHysteresis": 0.0,
116 "SetPoint": 90.0,
117 "SlewNeg": 0.0,
118 "SlewPos": 0.0,
119 "Type": "Pid",
120 "Zones": [
121 "Zone 1"
122 ]
123 },
124 {
125 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]126 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]127 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]128 "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
129 "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]130 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]131 "Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]132 "NegativeHysteresis": 0,
133 "Output": [
134 20.0
135 ],
136 "PositiveHysteresis": 0,
137 "Reading": [
138 20.0
139 ],
140 "Type": "Stepwise",
141 "Zones": [
142 "Zone 1"
143 ]
144 },
145 {
146 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]147 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]148 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]149 "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]150 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]151 "Name": "Stepwise_MB_FIO_Slot $bus % 15",
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]152 "NegativeHysteresis": 1,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]153 "Output": [
154 20.0,
155 21.0,
156 22.0,
157 23.0,
158 24.0,
159 25.0,
160 26.0,
161 27.0,
162 28.0,
163 29.0,
164 30.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]165 32.0,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]166 33.0,
167 35.0,
168 37.0,
169 38.0,
170 39.0,
171 40.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]172 41.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]173 42.0
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]174 ],
175 "PositiveHysteresis": 0,
176 "Reading": [
177 20.0,
178 21.0,
179 22.0,
180 23.0,
181 24.0,
182 25.0,
183 26.0,
184 27.0,
185 28.0,
186 29.0,
187 30.0,
188 31.0,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]189 33.0,
190 34.0,
191 35.0,
192 36.0,
193 37.0,
194 38.0,
Ricky CX Wu1ee32352024-10-04 17:07:19 +0800[diff] [blame]195 39.0,
Ricky CX Wu2826f402024-10-24 13:25:59 +0800[diff] [blame]196 40.0
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]197 ],
198 "Type": "Stepwise",
199 "Zones": [
200 "Zone 1"
201 ]
202 },
203 {
204 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]205 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]206 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]207 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
208 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
209 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
210 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
211 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
212 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
213 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
214 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
215 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
216 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]217 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]218 "Name": "Stepwise_MB_DIMM_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]219 "NegativeHysteresis": 2,
220 "Output": [
221 20.0,
222 22.0,
223 24.0,
224 26.0,
225 28.0,
226 30.0
227 ],
228 "PositiveHysteresis": 0,
229 "Reading": [
230 65.0,
231 66.0,
232 67.0,
233 68.0,
234 69.0,
235 70.0
236 ],
237 "Type": "Stepwise",
238 "Zones": [
239 "Zone 1"
240 ]
241 },
242 {
243 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]244 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]245 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]246 "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]247 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]248 "Name": "Stepwise_MB_CPU_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]249 "NegativeHysteresis": 3,
250 "Output": [
251 20.0,
252 25.0,
253 30.0,
254 35.0,
255 40.0,
256 45.0,
257 50.0,
258 55.0,
259 60.0
260 ],
261 "PositiveHysteresis": 0,
262 "Reading": [
263 66.0,
264 67.0,
265 68.0,
266 69.0,
267 70.0,
268 71.0,
269 72.0,
270 73.0,
271 74.0
272 ],
273 "Type": "Stepwise",
274 "Zones": [
275 "Zone 1"
276 ]
277 },
278 {
279 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]280 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]281 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]282 "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]283 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]284 "Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]285 "NegativeHysteresis": 2,
286 "Output": [
287 20.0,
288 22.0,
289 24.0,
290 26.0,
291 28.0,
292 30.0
293 ],
294 "PositiveHysteresis": 0,
295 "Reading": [
296 58.0,
297 59.0,
298 60.0,
299 61.0,
300 62.0,
301 63.0
302 ],
303 "Type": "Stepwise",
304 "Zones": [
305 "Zone 1"
306 ]
307 },
308 {
309 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]310 "InputUnavailableAsFailed": false,
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]311 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]312 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
313 "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
314 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
315 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
316 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]317 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]318 "Name": "Stepwise_MB_VR_Slot $bus % 15",
Delphine CC Chiucaa0a5f2024-05-22 14:45:04 +0800[diff] [blame]319 "NegativeHysteresis": 3,
320 "Output": [
321 20.0,
322 22.0,
323 24.0,
324 26.0,
325 28.0,
326 30.0
327 ],
328 "PositiveHysteresis": 0,
329 "Reading": [
330 80.0,
331 81.0,
332 82.0,
333 83.0,
334 84.0,
335 85.0
336 ],
337 "Type": "Stepwise",
338 "Zones": [
339 "Zone 1"
340 ]
341 }
342 ],
Delphine CC Chiu4a1eed82024-06-28 16:51:30 +0800[diff] [blame]343 "Name": "Yosemite 4 Sentinel Dome T1 Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]344 "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Sentinel Dome without Retimer', 'PRODUCT_PRODUCT_NAME': 'Yosemite V4', 'PRODUCT_INFO_AM2': 'Yosemite V4 T1'})",
Delphine CC Chiue41b5cb2023-11-30 16:13:52 +0800[diff] [blame]345 "Type": "Board",
346 "xyz.openbmc_project.Inventory.Decorator.Asset": {
Ingrid Chenf6d0e782024-07-10 13:41:34 +0800[diff] [blame]347 "BuildDate": "$BOARD_MANUFACTURE_DATE",
348 "Manufacturer": "$BOARD_MANUFACTURER",
349 "Model": "$BOARD_PRODUCT_NAME",
350 "PartNumber": "$BOARD_PART_NUMBER",
351 "SerialNumber": "$BOARD_SERIAL_NUMBER",
Delphine CC Chiu3c0af082024-05-15 16:33:03 +0800[diff] [blame]352 "SparePartNumber": "$BOARD_INFO_AM1"
Delphine CC Chiuec458a82024-02-16 10:17:49 +0800[diff] [blame]353 },
Delphine CC Chiud827cca2024-03-27 17:02:24 +0800[diff] [blame]354 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
355 "AssetTag": "$PRODUCT_ASSET_TAG"
356 },
Delphine CC Chiubaedb722024-04-01 16:21:03 +0800[diff] [blame]357 "xyz.openbmc_project.Inventory.Decorator.Revision": {
358 "Version": "$PRODUCT_VERSION"
359 },
Delphine CC Chiuec458a82024-02-16 10:17:49 +0800[diff] [blame]360 "xyz.openbmc_project.Inventory.Decorator.Slot": {
361 "SlotNumber": "$bus % 15"
Ingrid Chenf3b02722024-08-30 17:14:37 +0800[diff] [blame]362 },
363 "xyz.openbmc_project.Inventory.Item.Board.Motherboard": {
364 "ProductId": 1
Delphine CC Chiue41b5cb2023-11-30 16:13:52 +0800[diff] [blame]365 }
366}