Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 1 | { |
| 2 | "Exposes": [ |
| 3 | { |
| 4 | "CheckHysteresisWithSetpoint": true, |
| 5 | "Class": "temp", |
| 6 | "DCoefficient": 0.0, |
| 7 | "FFGainCoefficient": 0.0, |
| 8 | "FFOffCoefficient": 0.0, |
Eric Yang | d7be68d | 2024-09-12 14:22:43 +0800 | [diff] [blame] | 9 | "ICoefficient": -0.02, |
| 10 | "ILimitMax": 100, |
| 11 | "ILimitMin": -50, |
| 12 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 13 | "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C" |
Eric Yang | d7be68d | 2024-09-12 14:22:43 +0800 | [diff] [blame] | 14 | ], |
| 15 | "Name": "PID_MB_RETIMER_TEMP_Slot $bus % 15", |
| 16 | "NegativeHysteresis": 3.0, |
| 17 | "OutLimitMax": 100, |
| 18 | "OutLimitMin": 0, |
| 19 | "PCoefficient": -5.0, |
| 20 | "PositiveHysteresis": 0.0, |
| 21 | "SetPoint": 90.0, |
| 22 | "SlewNeg": 0.0, |
| 23 | "SlewPos": 0.0, |
| 24 | "Type": "Pid", |
| 25 | "Zones": [ |
| 26 | "Zone 1" |
| 27 | ] |
| 28 | }, |
| 29 | { |
| 30 | "CheckHysteresisWithSetpoint": true, |
| 31 | "Class": "temp", |
| 32 | "DCoefficient": 0.0, |
| 33 | "FFGainCoefficient": 0.0, |
| 34 | "FFOffCoefficient": 0.0, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 35 | "ICoefficient": -0.035, |
| 36 | "ILimitMax": 100, |
| 37 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 38 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 39 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 40 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C", |
| 41 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C", |
| 42 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C", |
| 43 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C", |
| 44 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C", |
| 45 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C", |
| 46 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C", |
| 47 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C", |
| 48 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C", |
| 49 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C", |
| 50 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C", |
| 51 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 52 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 53 | "Name": "PID_MB_DIMM_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 54 | "NegativeHysteresis": 2.0, |
| 55 | "OutLimitMax": 100, |
| 56 | "OutLimitMin": 0, |
| 57 | "PCoefficient": -3.0, |
| 58 | "PositiveHysteresis": 0.0, |
| 59 | "SetPoint": 75.0, |
| 60 | "SlewNeg": 0.0, |
| 61 | "SlewPos": 0.0, |
| 62 | "Type": "Pid", |
| 63 | "Zones": [ |
| 64 | "Zone 1" |
| 65 | ] |
| 66 | }, |
| 67 | { |
| 68 | "CheckHysteresisWithSetpoint": true, |
| 69 | "Class": "temp", |
| 70 | "DCoefficient": 0.0, |
| 71 | "FFGainCoefficient": 0.0, |
| 72 | "FFOffCoefficient": 0.0, |
| 73 | "ICoefficient": -0.035, |
| 74 | "ILimitMax": 100, |
| 75 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 76 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 77 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 78 | "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 79 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 80 | "Name": "PID_MB_CPU_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 81 | "NegativeHysteresis": 3.0, |
| 82 | "OutLimitMax": 100, |
| 83 | "OutLimitMin": 0, |
| 84 | "PCoefficient": -5.5, |
| 85 | "PositiveHysteresis": 0.0, |
| 86 | "SetPoint": 74.0, |
| 87 | "SlewNeg": 0.0, |
| 88 | "SlewPos": 0.0, |
| 89 | "Type": "Pid", |
| 90 | "Zones": [ |
| 91 | "Zone 1" |
| 92 | ] |
| 93 | }, |
| 94 | { |
| 95 | "CheckHysteresisWithSetpoint": true, |
| 96 | "Class": "temp", |
| 97 | "DCoefficient": 0.0, |
| 98 | "FFGainCoefficient": 0.0, |
| 99 | "FFOffCoefficient": 0.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 100 | "ICoefficient": -0.035, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 101 | "ILimitMax": 100, |
| 102 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 103 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 104 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 105 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 106 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 107 | "Name": "PID_MB_SSD_BOOT_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 108 | "NegativeHysteresis": 2.0, |
| 109 | "OutLimitMax": 100, |
| 110 | "OutLimitMin": 0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 111 | "PCoefficient": -5.5, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 112 | "PositiveHysteresis": 0.0, |
| 113 | "SetPoint": 68.0, |
| 114 | "SlewNeg": 0.0, |
| 115 | "SlewPos": 0.0, |
| 116 | "Type": "Pid", |
| 117 | "Zones": [ |
| 118 | "Zone 1" |
| 119 | ] |
| 120 | }, |
| 121 | { |
| 122 | "CheckHysteresisWithSetpoint": true, |
| 123 | "Class": "temp", |
| 124 | "DCoefficient": 0.0, |
| 125 | "FFGainCoefficient": 0.0, |
| 126 | "FFOffCoefficient": 0.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 127 | "ICoefficient": -0.035, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 128 | "ILimitMax": 100, |
| 129 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 130 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 131 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 132 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 133 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 134 | "Name": "PID_MB_SSD_DATA_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 135 | "NegativeHysteresis": 2.0, |
| 136 | "OutLimitMax": 100, |
| 137 | "OutLimitMin": 0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 138 | "PCoefficient": -5.5, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 139 | "PositiveHysteresis": 0.0, |
| 140 | "SetPoint": 68.0, |
| 141 | "SlewNeg": 0.0, |
| 142 | "SlewPos": 0.0, |
| 143 | "Type": "Pid", |
| 144 | "Zones": [ |
| 145 | "Zone 1" |
| 146 | ] |
| 147 | }, |
| 148 | { |
| 149 | "CheckHysteresisWithSetpoint": true, |
| 150 | "Class": "temp", |
| 151 | "DCoefficient": 0.0, |
| 152 | "FFGainCoefficient": 0.0, |
| 153 | "FFOffCoefficient": 0.0, |
| 154 | "ICoefficient": -0.02, |
| 155 | "ILimitMax": 100, |
| 156 | "ILimitMin": -50, |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 157 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 158 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 159 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C", |
| 160 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C", |
| 161 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C", |
| 162 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C", |
| 163 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 164 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 165 | "Name": "PID_MB_VR_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 166 | "NegativeHysteresis": 3.0, |
| 167 | "OutLimitMax": 100, |
| 168 | "OutLimitMin": 0, |
| 169 | "PCoefficient": -3.0, |
| 170 | "PositiveHysteresis": 0.0, |
| 171 | "SetPoint": 90.0, |
| 172 | "SlewNeg": 0.0, |
| 173 | "SlewPos": 0.0, |
| 174 | "Type": "Pid", |
| 175 | "Zones": [ |
| 176 | "Zone 1" |
| 177 | ] |
| 178 | }, |
| 179 | { |
| 180 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 181 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 182 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 183 | "SENTINEL_DOME_SLOT $bus % 15 MB_INLET_TEMP_C", |
| 184 | "SENTINEL_DOME_SLOT $bus % 15 MB_OUTLET_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 185 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 186 | "Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 187 | "NegativeHysteresis": 0, |
| 188 | "Output": [ |
| 189 | 20.0 |
| 190 | ], |
| 191 | "PositiveHysteresis": 0, |
| 192 | "Reading": [ |
| 193 | 20.0 |
| 194 | ], |
| 195 | "Type": "Stepwise", |
| 196 | "Zones": [ |
| 197 | "Zone 1" |
| 198 | ] |
| 199 | }, |
| 200 | { |
| 201 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 202 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 203 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 204 | "SENTINEL_DOME_SLOT $bus % 15 MB_X8_RETIMER_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 205 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 206 | "Name": "Stepwise_MB_RETIMER_TEMP_Slot $bus % 15", |
Eric Yang | d7be68d | 2024-09-12 14:22:43 +0800 | [diff] [blame] | 207 | "NegativeHysteresis": 2, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 208 | "Output": [ |
Eric Yang | d7be68d | 2024-09-12 14:22:43 +0800 | [diff] [blame] | 209 | 10.0, |
| 210 | 20.0, |
| 211 | 25.0, |
| 212 | 30.0, |
| 213 | 35.0, |
| 214 | 40.0, |
| 215 | 45.0, |
| 216 | 50.0 |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 217 | ], |
| 218 | "PositiveHysteresis": 0, |
| 219 | "Reading": [ |
Eric Yang | d7be68d | 2024-09-12 14:22:43 +0800 | [diff] [blame] | 220 | 89.0, |
| 221 | 90.0, |
| 222 | 91.0, |
| 223 | 92.0, |
| 224 | 93.0, |
| 225 | 94.0, |
| 226 | 95.0, |
| 227 | 96.0 |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 228 | ], |
| 229 | "Type": "Stepwise", |
| 230 | "Zones": [ |
| 231 | "Zone 1" |
| 232 | ] |
| 233 | }, |
| 234 | { |
| 235 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 236 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 237 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 238 | "CALIBRATED_SENTINEL_DOME_SLOT $bus % 15 MB_FIO_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 239 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 240 | "Name": "Stepwise_MB_FIO_Slot $bus % 15", |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 241 | "NegativeHysteresis": 1, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 242 | "Output": [ |
| 243 | 20.0, |
| 244 | 21.0, |
| 245 | 22.0, |
| 246 | 23.0, |
| 247 | 24.0, |
| 248 | 25.0, |
| 249 | 26.0, |
| 250 | 27.0, |
| 251 | 28.0, |
| 252 | 29.0, |
| 253 | 30.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 254 | 32.0, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 255 | 33.0, |
| 256 | 35.0, |
| 257 | 37.0, |
| 258 | 38.0, |
| 259 | 39.0, |
| 260 | 40.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 261 | 41.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 262 | 42.0 |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 263 | ], |
| 264 | "PositiveHysteresis": 0, |
| 265 | "Reading": [ |
| 266 | 20.0, |
| 267 | 21.0, |
| 268 | 22.0, |
| 269 | 23.0, |
| 270 | 24.0, |
| 271 | 25.0, |
| 272 | 26.0, |
| 273 | 27.0, |
| 274 | 28.0, |
| 275 | 29.0, |
| 276 | 30.0, |
| 277 | 31.0, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 278 | 33.0, |
| 279 | 34.0, |
| 280 | 35.0, |
| 281 | 36.0, |
| 282 | 37.0, |
| 283 | 38.0, |
Ricky CX Wu | 1ee3235 | 2024-10-04 17:07:19 +0800 | [diff] [blame] | 284 | 39.0, |
Ricky CX Wu | 2826f40 | 2024-10-24 13:25:59 +0800 | [diff] [blame] | 285 | 40.0 |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 286 | ], |
| 287 | "Type": "Stepwise", |
| 288 | "Zones": [ |
| 289 | "Zone 1" |
| 290 | ] |
| 291 | }, |
| 292 | { |
| 293 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 294 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 295 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 296 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_A_TEMP_C", |
| 297 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_B_TEMP_C", |
| 298 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_C_TEMP_C", |
| 299 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_D_TEMP_C", |
| 300 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_E_TEMP_C", |
| 301 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_F_TEMP_C", |
| 302 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_G_TEMP_C", |
| 303 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_H_TEMP_C", |
| 304 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_I_TEMP_C", |
| 305 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_J_TEMP_C", |
| 306 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_K_TEMP_C", |
| 307 | "SENTINEL_DOME_SLOT $bus % 15 MB_DIMM_L_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 308 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 309 | "Name": "Stepwise_MB_DIMM_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 310 | "NegativeHysteresis": 2, |
| 311 | "Output": [ |
| 312 | 20.0, |
| 313 | 22.0, |
| 314 | 24.0, |
| 315 | 26.0, |
| 316 | 28.0, |
| 317 | 30.0 |
| 318 | ], |
| 319 | "PositiveHysteresis": 0, |
| 320 | "Reading": [ |
| 321 | 65.0, |
| 322 | 66.0, |
| 323 | 67.0, |
| 324 | 68.0, |
| 325 | 69.0, |
| 326 | 70.0 |
| 327 | ], |
| 328 | "Type": "Stepwise", |
| 329 | "Zones": [ |
| 330 | "Zone 1" |
| 331 | ] |
| 332 | }, |
| 333 | { |
| 334 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 335 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 336 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 337 | "SENTINEL_DOME_SLOT $bus % 15 MB_CPU_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 338 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 339 | "Name": "Stepwise_MB_CPU_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 340 | "NegativeHysteresis": 3, |
| 341 | "Output": [ |
| 342 | 20.0, |
| 343 | 25.0, |
| 344 | 30.0, |
| 345 | 35.0, |
| 346 | 40.0, |
| 347 | 45.0, |
| 348 | 50.0, |
| 349 | 55.0, |
| 350 | 60.0 |
| 351 | ], |
| 352 | "PositiveHysteresis": 0, |
| 353 | "Reading": [ |
| 354 | 66.0, |
| 355 | 67.0, |
| 356 | 68.0, |
| 357 | 69.0, |
| 358 | 70.0, |
| 359 | 71.0, |
| 360 | 72.0, |
| 361 | 73.0, |
| 362 | 74.0 |
| 363 | ], |
| 364 | "Type": "Stepwise", |
| 365 | "Zones": [ |
| 366 | "Zone 1" |
| 367 | ] |
| 368 | }, |
| 369 | { |
| 370 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 371 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 372 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 373 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_BOOT_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 374 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 375 | "Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 376 | "NegativeHysteresis": 2, |
| 377 | "Output": [ |
| 378 | 20.0, |
| 379 | 22.0, |
| 380 | 24.0, |
| 381 | 26.0, |
| 382 | 28.0, |
| 383 | 30.0 |
| 384 | ], |
| 385 | "PositiveHysteresis": 0, |
| 386 | "Reading": [ |
| 387 | 58.0, |
| 388 | 59.0, |
| 389 | 60.0, |
| 390 | 61.0, |
| 391 | 62.0, |
| 392 | 63.0 |
| 393 | ], |
| 394 | "Type": "Stepwise", |
| 395 | "Zones": [ |
| 396 | "Zone 1" |
| 397 | ] |
| 398 | }, |
| 399 | { |
| 400 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 401 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 402 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 403 | "SENTINEL_DOME_SLOT $bus % 15 MB_SSD_DATA_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 404 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 405 | "Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 406 | "NegativeHysteresis": 2, |
| 407 | "Output": [ |
| 408 | 20.0, |
| 409 | 22.0, |
| 410 | 24.0, |
| 411 | 26.0, |
| 412 | 28.0, |
| 413 | 30.0 |
| 414 | ], |
| 415 | "PositiveHysteresis": 0, |
| 416 | "Reading": [ |
| 417 | 58.0, |
| 418 | 59.0, |
| 419 | 60.0, |
| 420 | 61.0, |
| 421 | 62.0, |
| 422 | 63.0 |
| 423 | ], |
| 424 | "Type": "Stepwise", |
| 425 | "Zones": [ |
| 426 | "Zone 1" |
| 427 | ] |
| 428 | }, |
| 429 | { |
| 430 | "Class": "temp", |
Ricky CX Wu | d3f5840 | 2024-09-13 17:13:42 +0800 | [diff] [blame] | 431 | "InputUnavailableAsFailed": false, |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 432 | "Inputs": [ |
Lora Lin | 9790e9e | 2024-10-21 09:05:48 +0800 | [diff] [blame^] | 433 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU0_TEMP_C", |
| 434 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_SOC_TEMP_C", |
| 435 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_CPU1_TEMP_C", |
| 436 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDDIO_TEMP_C", |
| 437 | "SENTINEL_DOME_SLOT $bus % 15 MB_VR_PVDD11_TEMP_C" |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 438 | ], |
Ricky CX Wu | 979eedc | 2024-09-03 16:28:06 +0800 | [diff] [blame] | 439 | "Name": "Stepwise_MB_VR_Slot $bus % 15", |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 440 | "NegativeHysteresis": 3, |
| 441 | "Output": [ |
| 442 | 20.0, |
| 443 | 22.0, |
| 444 | 24.0, |
| 445 | 26.0, |
| 446 | 28.0, |
| 447 | 30.0 |
| 448 | ], |
| 449 | "PositiveHysteresis": 0, |
| 450 | "Reading": [ |
| 451 | 80.0, |
| 452 | 81.0, |
| 453 | 82.0, |
| 454 | 83.0, |
| 455 | 84.0, |
| 456 | 85.0 |
| 457 | ], |
| 458 | "Type": "Stepwise", |
| 459 | "Zones": [ |
| 460 | "Zone 1" |
| 461 | ] |
| 462 | } |
| 463 | ], |
| 464 | "Name": "Yosemite 4 Sentinel Dome T2 with Retimer Slot $bus % 15", |
| 465 | "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Sentinel Dome Retimer.*', 'PRODUCT_PRODUCT_NAME': 'Yosemite V4', 'PRODUCT_INFO_AM2': 'Yosemite V4 T2'})", |
| 466 | "Type": "Board", |
| 467 | "xyz.openbmc_project.Inventory.Decorator.Asset": { |
| 468 | "BuildDate": "$BOARD_MANUFACTURE_DATE", |
| 469 | "Manufacturer": "$BOARD_MANUFACTURER", |
| 470 | "Model": "$BOARD_PRODUCT_NAME", |
| 471 | "PartNumber": "$BOARD_PART_NUMBER", |
| 472 | "SerialNumber": "$BOARD_SERIAL_NUMBER", |
| 473 | "SparePartNumber": "$BOARD_INFO_AM1" |
| 474 | }, |
| 475 | "xyz.openbmc_project.Inventory.Decorator.AssetTag": { |
| 476 | "AssetTag": "$PRODUCT_ASSET_TAG" |
| 477 | }, |
| 478 | "xyz.openbmc_project.Inventory.Decorator.Revision": { |
| 479 | "Version": "$PRODUCT_VERSION" |
| 480 | }, |
| 481 | "xyz.openbmc_project.Inventory.Decorator.Slot": { |
| 482 | "SlotNumber": "$bus % 15" |
Ingrid Chen | f3b0272 | 2024-08-30 17:14:37 +0800 | [diff] [blame] | 483 | }, |
| 484 | "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { |
| 485 | "ProductId": 1 |
Ricky CX Wu | 0f9545f | 2024-08-05 10:01:07 +0800 | [diff] [blame] | 486 | } |
| 487 | } |