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gerrit.openbmc.org / openbmc / entity-manager / ae36f5efd97e12a601cb090ab3e90a79a11ee09a / . / configurations / yosemite4_sentineldome_t2_retimer.json
blob: c51db9e9f8d65f3635cdc28681e052f6b08e52bd [file] [log] [blame]
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]1{
2 "Exposes": [
3 {
4 "CheckHysteresisWithSetpoint": true,
5 "Class": "temp",
6 "DCoefficient": 0.0,
7 "FFGainCoefficient": 0.0,
8 "FFOffCoefficient": 0.0,
9 "ICoefficient": -0.035,
10 "ILimitMax": 100,
11 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]12 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]13 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]14 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
15 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
16 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
17 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
18 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
19 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
20 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
21 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
22 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
23 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
24 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
25 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]26 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]27 "Name": "PID_MB_DIMM_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]28 "NegativeHysteresis": 2.0,
29 "OutLimitMax": 100,
30 "OutLimitMin": 0,
31 "PCoefficient": -3.0,
32 "PositiveHysteresis": 0.0,
33 "SetPoint": 75.0,
34 "SlewNeg": 0.0,
35 "SlewPos": 0.0,
36 "Type": "Pid",
37 "Zones": [
38 "Zone 1"
39 ]
40 },
41 {
42 "CheckHysteresisWithSetpoint": true,
43 "Class": "temp",
44 "DCoefficient": 0.0,
45 "FFGainCoefficient": 0.0,
46 "FFOffCoefficient": 0.0,
47 "ICoefficient": -0.035,
48 "ILimitMax": 100,
49 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]50 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]51 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]52 "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]53 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]54 "Name": "PID_MB_CPU_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]55 "NegativeHysteresis": 3.0,
56 "OutLimitMax": 100,
57 "OutLimitMin": 0,
58 "PCoefficient": -5.5,
59 "PositiveHysteresis": 0.0,
60 "SetPoint": 74.0,
61 "SlewNeg": 0.0,
62 "SlewPos": 0.0,
63 "Type": "Pid",
64 "Zones": [
65 "Zone 1"
66 ]
67 },
68 {
69 "CheckHysteresisWithSetpoint": true,
70 "Class": "temp",
71 "DCoefficient": 0.0,
72 "FFGainCoefficient": 0.0,
73 "FFOffCoefficient": 0.0,
74 "ICoefficient": -0.02,
75 "ILimitMax": 100,
76 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]77 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]78 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]79 "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]80 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]81 "Name": "PID_MB_SSD_BOOT_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]82 "NegativeHysteresis": 2.0,
83 "OutLimitMax": 100,
84 "OutLimitMin": 0,
85 "PCoefficient": -1.5,
86 "PositiveHysteresis": 0.0,
87 "SetPoint": 68.0,
88 "SlewNeg": 0.0,
89 "SlewPos": 0.0,
90 "Type": "Pid",
91 "Zones": [
92 "Zone 1"
93 ]
94 },
95 {
96 "CheckHysteresisWithSetpoint": true,
97 "Class": "temp",
98 "DCoefficient": 0.0,
99 "FFGainCoefficient": 0.0,
100 "FFOffCoefficient": 0.0,
101 "ICoefficient": -0.02,
102 "ILimitMax": 100,
103 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]104 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]105 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]106 "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]107 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]108 "Name": "PID_MB_SSD_DATA_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]109 "NegativeHysteresis": 2.0,
110 "OutLimitMax": 100,
111 "OutLimitMin": 0,
112 "PCoefficient": -1.5,
113 "PositiveHysteresis": 0.0,
114 "SetPoint": 68.0,
115 "SlewNeg": 0.0,
116 "SlewPos": 0.0,
117 "Type": "Pid",
118 "Zones": [
119 "Zone 1"
120 ]
121 },
122 {
123 "CheckHysteresisWithSetpoint": true,
124 "Class": "temp",
125 "DCoefficient": 0.0,
126 "FFGainCoefficient": 0.0,
127 "FFOffCoefficient": 0.0,
128 "ICoefficient": -0.02,
129 "ILimitMax": 100,
130 "ILimitMin": -50,
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]131 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]132 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]133 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
134 "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
135 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
136 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
137 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]138 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]139 "Name": "PID_MB_VR_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]140 "NegativeHysteresis": 3.0,
141 "OutLimitMax": 100,
142 "OutLimitMin": 0,
143 "PCoefficient": -3.0,
144 "PositiveHysteresis": 0.0,
145 "SetPoint": 90.0,
146 "SlewNeg": 0.0,
147 "SlewPos": 0.0,
148 "Type": "Pid",
149 "Zones": [
150 "Zone 1"
151 ]
152 },
153 {
154 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]155 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]156 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]157 "Sentinel_Dome_Slot $bus % 15 MB_INLET_TEMP_C",
158 "Sentinel_Dome_Slot $bus % 15 MB_OUTLET_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]159 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]160 "Name": "Stepwise_MB_INLET_OUTLET_TEMP_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]161 "NegativeHysteresis": 0,
162 "Output": [
163 20.0
164 ],
165 "PositiveHysteresis": 0,
166 "Reading": [
167 20.0
168 ],
169 "Type": "Stepwise",
170 "Zones": [
171 "Zone 1"
172 ]
173 },
174 {
175 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]176 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]177 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]178 "Sentinel_Dome_Slot $bus % 15 MB_X8_RETIMER_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]179 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]180 "Name": "Stepwise_MB_RETIMER_TEMP_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]181 "NegativeHysteresis": 0,
182 "Output": [
183 20.0
184 ],
185 "PositiveHysteresis": 0,
186 "Reading": [
187 20.0
188 ],
189 "Type": "Stepwise",
190 "Zones": [
191 "Zone 1"
192 ]
193 },
194 {
195 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]196 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]197 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]198 "Calibrated_Sentinel_Dome_Slot $bus % 15 MB_FIO_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]199 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]200 "Name": "Stepwise_MB_FIO_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]201 "NegativeHysteresis": 2,
202 "Output": [
203 20.0,
204 21.0,
205 22.0,
206 23.0,
207 24.0,
208 25.0,
209 26.0,
210 27.0,
211 28.0,
212 29.0,
213 30.0,
214 31.0,
215 31.0,
216 33.0,
217 35.0,
218 37.0,
219 38.0,
220 39.0,
221 40.0,
222 41.0
223 ],
224 "PositiveHysteresis": 0,
225 "Reading": [
226 20.0,
227 21.0,
228 22.0,
229 23.0,
230 24.0,
231 25.0,
232 26.0,
233 27.0,
234 28.0,
235 29.0,
236 30.0,
237 31.0,
238 32.0,
239 33.0,
240 34.0,
241 35.0,
242 36.0,
243 37.0,
244 38.0,
245 39.0
246 ],
247 "Type": "Stepwise",
248 "Zones": [
249 "Zone 1"
250 ]
251 },
252 {
253 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]254 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]255 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]256 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_A_TEMP_C",
257 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_B_TEMP_C",
258 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_C_TEMP_C",
259 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_D_TEMP_C",
260 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_E_TEMP_C",
261 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_F_TEMP_C",
262 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_G_TEMP_C",
263 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_H_TEMP_C",
264 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_I_TEMP_C",
265 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_J_TEMP_C",
266 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_K_TEMP_C",
267 "Sentinel_Dome_Slot $bus % 15 MB_DIMM_L_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]268 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]269 "Name": "Stepwise_MB_DIMM_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]270 "NegativeHysteresis": 2,
271 "Output": [
272 20.0,
273 22.0,
274 24.0,
275 26.0,
276 28.0,
277 30.0
278 ],
279 "PositiveHysteresis": 0,
280 "Reading": [
281 65.0,
282 66.0,
283 67.0,
284 68.0,
285 69.0,
286 70.0
287 ],
288 "Type": "Stepwise",
289 "Zones": [
290 "Zone 1"
291 ]
292 },
293 {
294 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]295 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]296 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]297 "Sentinel_Dome_Slot $bus % 15 MB_CPU_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]298 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]299 "Name": "Stepwise_MB_CPU_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]300 "NegativeHysteresis": 3,
301 "Output": [
302 20.0,
303 25.0,
304 30.0,
305 35.0,
306 40.0,
307 45.0,
308 50.0,
309 55.0,
310 60.0
311 ],
312 "PositiveHysteresis": 0,
313 "Reading": [
314 66.0,
315 67.0,
316 68.0,
317 69.0,
318 70.0,
319 71.0,
320 72.0,
321 73.0,
322 74.0
323 ],
324 "Type": "Stepwise",
325 "Zones": [
326 "Zone 1"
327 ]
328 },
329 {
330 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]331 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]332 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]333 "Sentinel_Dome_Slot $bus % 15 MB_SSD_BOOT_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]334 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]335 "Name": "Stepwise_MB_SSD_BOOT_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]336 "NegativeHysteresis": 2,
337 "Output": [
338 20.0,
339 22.0,
340 24.0,
341 26.0,
342 28.0,
343 30.0
344 ],
345 "PositiveHysteresis": 0,
346 "Reading": [
347 58.0,
348 59.0,
349 60.0,
350 61.0,
351 62.0,
352 63.0
353 ],
354 "Type": "Stepwise",
355 "Zones": [
356 "Zone 1"
357 ]
358 },
359 {
360 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]361 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]362 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]363 "Sentinel_Dome_Slot $bus % 15 MB_SSD_DATA_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]364 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]365 "Name": "Stepwise_MB_SSD_DATA_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]366 "NegativeHysteresis": 2,
367 "Output": [
368 20.0,
369 22.0,
370 24.0,
371 26.0,
372 28.0,
373 30.0
374 ],
375 "PositiveHysteresis": 0,
376 "Reading": [
377 58.0,
378 59.0,
379 60.0,
380 61.0,
381 62.0,
382 63.0
383 ],
384 "Type": "Stepwise",
385 "Zones": [
386 "Zone 1"
387 ]
388 },
389 {
390 "Class": "temp",
Ricky CX Wud3f58402024-09-13 17:13:42 +0800[diff] [blame]391 "InputUnavailableAsFailed": false,
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]392 "Inputs": [
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]393 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU0_TEMP_C",
394 "Sentinel_Dome_Slot $bus % 15 MB_VR_SOC_TEMP_C",
395 "Sentinel_Dome_Slot $bus % 15 MB_VR_CPU1_TEMP_C",
396 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDDIO_TEMP_C",
397 "Sentinel_Dome_Slot $bus % 15 MB_VR_PVDD11_TEMP_C"
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]398 ],
Ricky CX Wu979eedc2024-09-03 16:28:06 +0800[diff] [blame]399 "Name": "Stepwise_MB_VR_Slot $bus % 15",
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]400 "NegativeHysteresis": 3,
401 "Output": [
402 20.0,
403 22.0,
404 24.0,
405 26.0,
406 28.0,
407 30.0
408 ],
409 "PositiveHysteresis": 0,
410 "Reading": [
411 80.0,
412 81.0,
413 82.0,
414 83.0,
415 84.0,
416 85.0
417 ],
418 "Type": "Stepwise",
419 "Zones": [
420 "Zone 1"
421 ]
422 }
423 ],
424 "Name": "Yosemite 4 Sentinel Dome T2 with Retimer Slot $bus % 15",
425 "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'Sentinel Dome Retimer.*', 'PRODUCT_PRODUCT_NAME': 'Yosemite V4', 'PRODUCT_INFO_AM2': 'Yosemite V4 T2'})",
426 "Type": "Board",
427 "xyz.openbmc_project.Inventory.Decorator.Asset": {
428 "BuildDate": "$BOARD_MANUFACTURE_DATE",
429 "Manufacturer": "$BOARD_MANUFACTURER",
430 "Model": "$BOARD_PRODUCT_NAME",
431 "PartNumber": "$BOARD_PART_NUMBER",
432 "SerialNumber": "$BOARD_SERIAL_NUMBER",
433 "SparePartNumber": "$BOARD_INFO_AM1"
434 },
435 "xyz.openbmc_project.Inventory.Decorator.AssetTag": {
436 "AssetTag": "$PRODUCT_ASSET_TAG"
437 },
438 "xyz.openbmc_project.Inventory.Decorator.Revision": {
439 "Version": "$PRODUCT_VERSION"
440 },
441 "xyz.openbmc_project.Inventory.Decorator.Slot": {
442 "SlotNumber": "$bus % 15"
Ingrid Chenf3b02722024-08-30 17:14:37 +0800[diff] [blame]443 },
444 "xyz.openbmc_project.Inventory.Item.Board.Motherboard": {
445 "ProductId": 1
Ricky CX Wu0f9545f2024-08-05 10:01:07 +0800[diff] [blame]446 }
447}