Suraj Jitindar Singh | e39c916 | 2017-03-28 10:47:43 +1100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2016 IBM |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #ifndef MBOX_DBUS_H |
| 19 | #define MBOX_DBUS_H |
| 20 | |
| 21 | #define DBUS_NAME "org.openbmc.mboxd" |
| 22 | #define DOBJ_NAME "/org/openbmc/mboxd" |
| 23 | |
| 24 | /* Commands */ |
| 25 | #define DBUS_C_PING 0x00 |
| 26 | #define DBUS_C_DAEMON_STATE 0x01 |
| 27 | #define DBUS_C_RESET 0x02 |
| 28 | #define DBUS_C_SUSPEND 0x03 |
| 29 | #define DBUS_C_RESUME 0x04 |
| 30 | #define DBUS_C_MODIFIED 0x05 |
| 31 | #define DBUS_C_KILL 0x06 |
| 32 | #define DBUS_C_LPC_STATE 0x07 |
| 33 | #define NUM_DBUS_CMDS (DBUS_C_LPC_STATE + 1) |
| 34 | |
| 35 | /* Command Args */ |
| 36 | /* Resume */ |
| 37 | #define RESUME_NUM_ARGS 1 |
| 38 | #define RESUME_NOT_MODIFIED 0x00 |
| 39 | #define RESUME_FLASH_MODIFIED 0x01 |
| 40 | |
| 41 | /* Return Values */ |
| 42 | #define DBUS_SUCCESS 0x00 /* Command Succeded */ |
| 43 | #define E_DBUS_INTERNAL 0x01 /* Internal DBUS Error */ |
| 44 | #define E_DBUS_INVAL 0x02 /* Invalid Command */ |
| 45 | #define E_DBUS_REJECTED 0x03 /* Daemon Rejected Request */ |
| 46 | #define E_DBUS_HARDWARE 0x04 /* BMC Hardware Error */ |
Suraj Jitindar Singh | ddf0edb | 2017-03-28 10:50:40 +1100 | [diff] [blame] | 47 | #define E_DBUS_NO_MEM 0x05 /* Failed Memory Allocation */ |
Suraj Jitindar Singh | e39c916 | 2017-03-28 10:47:43 +1100 | [diff] [blame] | 48 | |
| 49 | /* Response Args */ |
| 50 | /* Status */ |
| 51 | #define DAEMON_STATE_NUM_ARGS 1 |
| 52 | #define DAEMON_STATE_ACTIVE 0x00 /* Daemon Active */ |
| 53 | #define DAEMON_STATE_SUSPENDED 0x01 /* Daemon Suspended */ |
| 54 | /* LPC State */ |
| 55 | #define LPC_STATE_NUM_ARGS 1 |
| 56 | #define LPC_STATE_INVALID 0x00 /* Invalid State */ |
| 57 | #define LPC_STATE_FLASH 0x01 /* LPC Maps Flash Directly */ |
| 58 | #define LPC_STATE_MEM 0x02 /* LPC Maps Memory */ |
| 59 | |
| 60 | struct mbox_dbus_msg { |
| 61 | uint8_t cmd; |
| 62 | size_t num_args; |
| 63 | uint8_t *args; |
| 64 | }; |
| 65 | |
| 66 | #endif /* MBOX_DBUS_H */ |