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Lawrence Tang4dbe3d72022-07-06 13:51:01 +01001#ifndef CPER_SECTION_PCIE_H
2#define CPER_SECTION_PCIE_H
3
Karthik Rajagopalan255bd812024-09-06 14:36:34 -07004#ifdef __cplusplus
5extern "C" {
6#endif
7
Lawrence Tang5202bbb2022-08-12 14:54:36 +01008#include <json.h>
Lawrence Tang4dbe3d72022-07-06 13:51:01 +01009#include "../edk/Cper.h"
10
John Chungf8fc7052024-05-03 20:05:29 +080011#define PCIE_ERROR_VALID_BITFIELD_NAMES \
12 (const char *[]) \
13 { \
14 "portTypeValid", "versionValid", "commandStatusValid", \
15 "deviceIDValid", "deviceSerialNumberValid", \
16 "bridgeControlStatusValid", \
17 "capabilityStructureStatusValid", "aerInfoValid" \
18 }
19#define PCIE_ERROR_PORT_TYPES_KEYS \
20 (int[]) \
21 { \
22 0, 1, 4, 5, 6, 7, 8, 9, 10 \
23 }
24#define PCIE_ERROR_PORT_TYPES_VALUES \
25 (const char *[]) \
26 { \
27 "PCI Express End Point", "Legacy PCI End Point Device", \
28 "Root Port", "Upstream Switch Port", \
29 "Downstream Switch Port", \
30 "PCI Express to PCI/PCI-X Bridge", \
31 "PCI/PCI-X Bridge to PCI Express Bridge", \
32 "Root Complex Integrated Endpoint Device", \
33 "Root Complex Event Collector" \
34 }
Lawrence Tang4dbe3d72022-07-06 13:51:01 +010035
John Chungf8fc7052024-05-03 20:05:29 +080036json_object *cper_section_pcie_to_ir(void *section);
37void ir_section_pcie_to_cper(json_object *section, FILE *out);
Lawrence Tang4dbe3d72022-07-06 13:51:01 +010038
Karthik Rajagopalan255bd812024-09-06 14:36:34 -070039#ifdef __cplusplus
40}
41#endif
42
John Chungf8fc7052024-05-03 20:05:29 +080043#endif