Lawrence Tang | 4dbe3d7 | 2022-07-06 13:51:01 +0100 | [diff] [blame] | 1 | #ifndef CPER_SECTION_PCIE_H |
| 2 | #define CPER_SECTION_PCIE_H |
| 3 | |
Lawrence Tang | 5202bbb | 2022-08-12 14:54:36 +0100 | [diff] [blame] | 4 | #include <json.h> |
Lawrence Tang | 4dbe3d7 | 2022-07-06 13:51:01 +0100 | [diff] [blame] | 5 | #include "../edk/Cper.h" |
| 6 | |
John Chung | f8fc705 | 2024-05-03 20:05:29 +0800 | [diff] [blame] | 7 | #define PCIE_ERROR_VALID_BITFIELD_NAMES \ |
| 8 | (const char *[]) \ |
| 9 | { \ |
| 10 | "portTypeValid", "versionValid", "commandStatusValid", \ |
| 11 | "deviceIDValid", "deviceSerialNumberValid", \ |
| 12 | "bridgeControlStatusValid", \ |
| 13 | "capabilityStructureStatusValid", "aerInfoValid" \ |
| 14 | } |
| 15 | #define PCIE_ERROR_PORT_TYPES_KEYS \ |
| 16 | (int[]) \ |
| 17 | { \ |
| 18 | 0, 1, 4, 5, 6, 7, 8, 9, 10 \ |
| 19 | } |
| 20 | #define PCIE_ERROR_PORT_TYPES_VALUES \ |
| 21 | (const char *[]) \ |
| 22 | { \ |
| 23 | "PCI Express End Point", "Legacy PCI End Point Device", \ |
| 24 | "Root Port", "Upstream Switch Port", \ |
| 25 | "Downstream Switch Port", \ |
| 26 | "PCI Express to PCI/PCI-X Bridge", \ |
| 27 | "PCI/PCI-X Bridge to PCI Express Bridge", \ |
| 28 | "Root Complex Integrated Endpoint Device", \ |
| 29 | "Root Complex Event Collector" \ |
| 30 | } |
Lawrence Tang | 4dbe3d7 | 2022-07-06 13:51:01 +0100 | [diff] [blame] | 31 | |
John Chung | f8fc705 | 2024-05-03 20:05:29 +0800 | [diff] [blame] | 32 | json_object *cper_section_pcie_to_ir(void *section); |
| 33 | void ir_section_pcie_to_cper(json_object *section, FILE *out); |
Lawrence Tang | 4dbe3d7 | 2022-07-06 13:51:01 +0100 | [diff] [blame] | 34 | |
John Chung | f8fc705 | 2024-05-03 20:05:29 +0800 | [diff] [blame] | 35 | #endif |