Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 1 | /** |
| 2 | * Describes functions for converting ARM CPER sections from binary and JSON format |
| 3 | * into an intermediate format. |
| 4 | * |
| 5 | * Author: Lawrence.Tang@arm.com |
| 6 | **/ |
| 7 | |
| 8 | #include <stdio.h> |
| 9 | #include "json.h" |
| 10 | #include "../edk/Cper.h" |
| 11 | #include "../cper-utils.h" |
| 12 | #include "cper-section-arm.h" |
| 13 | |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 14 | //Private pre-definitions. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 15 | json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info); |
| 16 | json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos); |
| 17 | json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info); |
| 18 | json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error); |
| 19 | json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 20 | |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 21 | //Converts the given processor-generic CPER section into JSON IR. |
| 22 | json_object* cper_section_arm_to_ir(void* section, EFI_ERROR_SECTION_DESCRIPTOR* descriptor) |
| 23 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 24 | EFI_ARM_ERROR_RECORD* record = (EFI_ARM_ERROR_RECORD*)section; |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 25 | json_object* section_ir = json_object_new_object(); |
| 26 | |
| 27 | //Validation bits. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 28 | json_object* validation = bitfield_to_ir(record->ValidFields, 4, ARM_ERROR_VALID_BITFIELD_NAMES); |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 29 | json_object_object_add(section_ir, "validationBits", validation); |
| 30 | |
| 31 | //Number of error info and context info structures, and length. |
| 32 | json_object_object_add(section_ir, "errorInfoNum", json_object_new_int(record->ErrInfoNum)); |
| 33 | json_object_object_add(section_ir, "contextInfoNum", json_object_new_int(record->ContextInfoNum)); |
| 34 | json_object_object_add(section_ir, "sectionLength", json_object_new_int(record->SectionLength)); |
| 35 | |
| 36 | //Error affinity. |
| 37 | json_object* error_affinity = json_object_new_object(); |
| 38 | json_object_object_add(error_affinity, "value", json_object_new_int(record->ErrorAffinityLevel)); |
| 39 | json_object_object_add(error_affinity, "type", |
| 40 | json_object_new_string(record->ErrorAffinityLevel < 4 ? "Vendor Defined" : "Reserved")); |
| 41 | json_object_object_add(section_ir, "errorAffinity", error_affinity); |
| 42 | |
| 43 | //Processor ID (MPIDR_EL1) and chip ID (MIDR_EL1). |
| 44 | json_object_object_add(section_ir, "mpidrEl1", json_object_new_uint64(record->MPIDR_EL1)); |
| 45 | json_object_object_add(section_ir, "midrEl1", json_object_new_uint64(record->MIDR_EL1)); |
| 46 | |
| 47 | //Whether the processor is running, and the state of it if so. |
| 48 | json_object_object_add(section_ir, "running", json_object_new_boolean(record->RunningState)); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 49 | if (record->RunningState >> 31) |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 50 | { |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 51 | //Bit 32 of running state is on, so PSCI state information is included. |
| 52 | //todo: Look at how to make this human readable from the ARM PSCI document. |
| 53 | json_object_object_add(section_ir, "psciState", json_object_new_int(record->PsciState)); |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 54 | } |
| 55 | |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 56 | //Processor error structures. |
| 57 | json_object* error_info_array = json_object_new_array(); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 58 | EFI_ARM_ERROR_INFORMATION_ENTRY* cur_error = (EFI_ARM_ERROR_INFORMATION_ENTRY*)(record + 1); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 59 | for (int i=0; i<record->ErrInfoNum; i++) |
| 60 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 61 | json_object_array_add(error_info_array, cper_arm_error_info_to_ir(cur_error)); |
| 62 | cur_error++; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 63 | } |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 64 | json_object_object_add(section_ir, "errorInfo", error_info_array); |
| 65 | |
| 66 | //Processor context structures. |
| 67 | //The current position is moved within the processing, as it is a dynamic size structure. |
| 68 | void* cur_pos = (void*)cur_error; |
| 69 | EFI_ARM_CONTEXT_INFORMATION_HEADER* header = (EFI_ARM_CONTEXT_INFORMATION_HEADER*)cur_error; |
| 70 | json_object* processor_context = cper_arm_processor_context_to_ir(header, &cur_pos); |
| 71 | |
| 72 | //Is there any vendor-specific information following? |
| 73 | if (cur_pos < section + record->SectionLength) |
| 74 | { |
| 75 | //todo: b64 and tag on vendor-specific binary info. |
| 76 | } |
| 77 | |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 78 | return section_ir; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | //Converts a single ARM Process Error Information structure into JSON IR. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 82 | json_object* cper_arm_error_info_to_ir(EFI_ARM_ERROR_INFORMATION_ENTRY* error_info) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 83 | { |
| 84 | json_object* error_info_ir = json_object_new_object(); |
| 85 | |
| 86 | //Version, length. |
| 87 | json_object_object_add(error_info_ir, "version", json_object_new_int(error_info->Version)); |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 88 | json_object_object_add(error_info_ir, "length", json_object_new_int(error_info->Length)); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 89 | |
| 90 | //Validation bitfield. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 91 | json_object* validation = bitfield_to_ir(error_info->ValidationBits, 5, ARM_ERROR_INFO_ENTRY_VALID_BITFIELD_NAMES); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 92 | json_object_object_add(error_info_ir, "validationBits", validation); |
| 93 | |
| 94 | //The type of error information in this log. |
| 95 | //todo: The UEFI spec is ambiguous, what are the values for these?? |
| 96 | json_object* error_type = integer_to_readable_pair(error_info->Type, 4, |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 97 | ARM_ERROR_INFO_ENTRY_INFO_TYPES_KEYS, |
| 98 | ARM_ERROR_INFO_ENTRY_INFO_TYPES_VALUES, |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 99 | "Unknown (Reserved)"); |
| 100 | json_object_object_add(error_info_ir, "errorType", error_type); |
| 101 | |
| 102 | //Multiple error count. |
Lawrence Tang | 22a467c | 2022-07-05 17:21:06 +0100 | [diff] [blame] | 103 | json_object* multiple_error = json_object_new_object(); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 104 | json_object_object_add(multiple_error, "value", json_object_new_int(error_info->MultipleError)); |
| 105 | json_object_object_add(multiple_error, "type", |
| 106 | json_object_new_string(error_info->MultipleError < 1 ? "Single Error" : "Multiple Errors")); |
| 107 | json_object_object_add(error_info_ir, "multipleError", multiple_error); |
| 108 | |
| 109 | //Flags. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 110 | json_object* flags = bitfield_to_ir(error_info->Flags, 4, ARM_ERROR_INFO_ENTRY_FLAGS_NAMES); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 111 | json_object_object_add(error_info_ir, "flags", flags); |
| 112 | |
| 113 | //Error information, split by type. |
| 114 | json_object* error_subinfo = NULL; |
| 115 | switch (error_info->Type) |
| 116 | { |
| 117 | case 0: //Cache |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 118 | case 1: //TLB |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 119 | error_subinfo = cper_arm_cache_tlb_error_to_ir((EFI_ARM_CACHE_ERROR_STRUCTURE*)&error_info->ErrorInformation, error_info); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 120 | break; |
| 121 | case 2: //Bus |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 122 | error_subinfo = cper_arm_bus_error_to_ir((EFI_ARM_BUS_ERROR_STRUCTURE*)&error_info->ErrorInformation); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 123 | break; |
| 124 | } |
| 125 | json_object_object_add(error_info_ir, "errorInformation", error_subinfo); |
| 126 | |
| 127 | return error_info_ir; |
| 128 | } |
| 129 | |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 130 | //Converts a single ARM cache/TLB error information structure into JSON IR format. |
| 131 | json_object* cper_arm_cache_tlb_error_to_ir(EFI_ARM_CACHE_ERROR_STRUCTURE* cache_tlb_error, EFI_ARM_ERROR_INFORMATION_ENTRY* error_info) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 132 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 133 | json_object* cache_tlb_error_ir = json_object_new_object(); |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 134 | |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 135 | //Validation bitfield. |
| 136 | json_object* validation = bitfield_to_ir(cache_tlb_error->ValidationBits, 7, ARM_CACHE_TLB_ERROR_VALID_BITFIELD_NAMES); |
| 137 | json_object_object_add(cache_tlb_error_ir, "validationBits", validation); |
| 138 | |
| 139 | //Transaction type. |
| 140 | json_object* transaction_type = integer_to_readable_pair(cache_tlb_error->TransactionType, 3, |
| 141 | ARM_ERROR_TRANSACTION_TYPES_KEYS, |
| 142 | ARM_ERROR_TRANSACTION_TYPES_VALUES, |
| 143 | "Unknown (Reserved)"); |
| 144 | json_object_object_add(cache_tlb_error_ir, "transactionType", transaction_type); |
| 145 | |
| 146 | //Operation. |
| 147 | //todo: What are the types' numeric values? UEFI spec is ambiguous |
| 148 | json_object* operation; |
| 149 | if (error_info->Type == 0) |
| 150 | { |
| 151 | //Cache operation. |
| 152 | operation = integer_to_readable_pair(cache_tlb_error->Operation, 11, |
| 153 | ARM_CACHE_BUS_OPERATION_TYPES_KEYS, |
| 154 | ARM_CACHE_BUS_OPERATION_TYPES_VALUES, |
| 155 | "Unknown (Reserved)"); |
| 156 | } |
| 157 | else |
| 158 | { |
| 159 | //TLB operation. |
| 160 | operation = integer_to_readable_pair(cache_tlb_error->Operation, 9, |
| 161 | ARM_TLB_OPERATION_TYPES_KEYS, |
| 162 | ARM_TLB_OPERATION_TYPES_VALUES, |
| 163 | "Unknown (Reserved)"); |
| 164 | } |
| 165 | json_object_object_add(cache_tlb_error_ir, "operation", operation); |
| 166 | |
| 167 | //Miscellaneous remaining fields. |
| 168 | json_object_object_add(cache_tlb_error_ir, "level", json_object_new_int(cache_tlb_error->Level)); |
| 169 | json_object_object_add(cache_tlb_error_ir, "processorContextCorrupt", json_object_new_boolean(cache_tlb_error->ProcessorContextCorrupt)); |
| 170 | json_object_object_add(cache_tlb_error_ir, "corrected", json_object_new_boolean(cache_tlb_error->Corrected)); |
| 171 | json_object_object_add(cache_tlb_error_ir, "precisePC", json_object_new_boolean(cache_tlb_error->PrecisePC)); |
| 172 | json_object_object_add(cache_tlb_error_ir, "restartablePC", json_object_new_boolean(cache_tlb_error->RestartablePC)); |
| 173 | return cache_tlb_error_ir; |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 174 | } |
| 175 | |
| 176 | //Converts a single ARM bus error information structure into JSON IR format. |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 177 | json_object* cper_arm_bus_error_to_ir(EFI_ARM_BUS_ERROR_STRUCTURE* bus_error) |
Lawrence Tang | 3d0e4f2 | 2022-07-05 17:17:41 +0100 | [diff] [blame] | 178 | { |
Lawrence Tang | 7f21db6 | 2022-07-06 11:09:39 +0100 | [diff] [blame^] | 179 | json_object* bus_error_ir = json_object_new_object(); |
| 180 | |
| 181 | //Validation bits. |
| 182 | json_object* validation = bitfield_to_ir(bus_error->ValidationBits, 7, ARM_BUS_ERROR_VALID_BITFIELD_NAMES); |
| 183 | json_object_object_add(bus_error_ir, "validationBits", validation); |
| 184 | |
| 185 | //Transaction type. |
| 186 | json_object* transaction_type = integer_to_readable_pair(bus_error->TransactionType, 3, |
| 187 | ARM_ERROR_TRANSACTION_TYPES_KEYS, |
| 188 | ARM_ERROR_TRANSACTION_TYPES_VALUES, |
| 189 | "Unknown (Reserved)"); |
| 190 | json_object_object_add(bus_error_ir, "transactionType", transaction_type); |
| 191 | |
| 192 | //Operation. |
| 193 | json_object* operation = integer_to_readable_pair(bus_error->Operation, 7, |
| 194 | ARM_CACHE_BUS_OPERATION_TYPES_KEYS, |
| 195 | ARM_CACHE_BUS_OPERATION_TYPES_VALUES, |
| 196 | "Unknown (Reserved)"); |
| 197 | json_object_object_add(bus_error_ir, "operation", operation); |
| 198 | |
| 199 | //Affinity level of bus error, + miscellaneous fields. |
| 200 | json_object_object_add(bus_error_ir, "level", json_object_new_int(bus_error->Level)); |
| 201 | json_object_object_add(bus_error_ir, "processorContextCorrupt", json_object_new_boolean(bus_error->ProcessorContextCorrupt)); |
| 202 | json_object_object_add(bus_error_ir, "corrected", json_object_new_boolean(bus_error->Corrected)); |
| 203 | json_object_object_add(bus_error_ir, "precisePC", json_object_new_boolean(bus_error->PrecisePC)); |
| 204 | json_object_object_add(bus_error_ir, "restartablePC", json_object_new_boolean(bus_error->RestartablePC)); |
| 205 | json_object_object_add(bus_error_ir, "timedOut", json_object_new_boolean(bus_error->TimeOut)); |
| 206 | |
| 207 | //Participation type. |
| 208 | json_object* participation_type = integer_to_readable_pair(bus_error->ParticipationType, 4, |
| 209 | ARM_BUS_PARTICIPATION_TYPES_KEYS, |
| 210 | ARM_BUS_PARTICIPATION_TYPES_VALUES, |
| 211 | "Unknown"); |
| 212 | json_object_object_add(bus_error_ir, "participationType", participation_type); |
| 213 | |
| 214 | //Address space. |
| 215 | json_object* address_space = integer_to_readable_pair(bus_error->AddressSpace, 3, |
| 216 | ARM_BUS_ADDRESS_SPACE_TYPES_KEYS, |
| 217 | ARM_BUS_ADDRESS_SPACE_TYPES_VALUES, |
| 218 | "Unknown"); |
| 219 | json_object_object_add(bus_error_ir, "addressSpace", address_space); |
| 220 | |
| 221 | //Memory access attributes. |
| 222 | //todo: find the specification of these in the ARM ARM |
| 223 | //... |
| 224 | |
| 225 | //Access Mode |
| 226 | json_object* access_mode = json_object_new_object(); |
| 227 | json_object_object_add(access_mode, "value", json_object_new_int(bus_error->AccessMode)); |
| 228 | json_object_object_add(access_mode, "name", json_object_new_string(bus_error->AccessMode == 0 ? "Secure" : "Normal")); |
| 229 | json_object_object_add(bus_error_ir, "accessMode", access_mode); |
| 230 | |
| 231 | return bus_error_ir; |
| 232 | } |
| 233 | |
| 234 | //Converts a single ARM processor context block into JSON IR. |
| 235 | json_object* cper_arm_processor_context_to_ir(EFI_ARM_CONTEXT_INFORMATION_HEADER* header, void** cur_pos) |
| 236 | { |
| 237 | json_object* context_ir = json_object_new_object(); |
| 238 | |
| 239 | //Add the context type. |
| 240 | json_object* context_type = integer_to_readable_pair(header->RegisterContextType, 9, |
| 241 | ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_KEYS, |
| 242 | ARM_PROCESSOR_INFO_REGISTER_CONTEXT_TYPES_VALUES, |
| 243 | "Unknown (Reserved)"); |
| 244 | json_object_object_add(context_ir, "registerContextType", context_type); |
| 245 | |
| 246 | //Register array size (bytes). |
| 247 | json_object_object_add(context_ir, "registerArraySize", json_object_new_uint64(header->RegisterArraySize)); |
| 248 | |
| 249 | //The register array itself. |
| 250 | *cur_pos = (void*)(header + 1); |
| 251 | json_object* register_array = NULL; |
| 252 | switch (header->RegisterContextType) |
| 253 | { |
| 254 | case EFI_ARM_CONTEXT_TYPE_AARCH32_GPR: |
| 255 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 256 | sizeof(EFI_ARM_V8_AARCH32_GPR) / sizeof(UINT32), ARM_AARCH32_GPR_NAMES); |
| 257 | break; |
| 258 | case EFI_ARM_CONTEXT_TYPE_AARCH32_EL1: |
| 259 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 260 | sizeof(EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL1_REGISTER_NAMES); |
| 261 | break; |
| 262 | case EFI_ARM_CONTEXT_TYPE_AARCH32_EL2: |
| 263 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 264 | sizeof(EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_EL2_REGISTER_NAMES); |
| 265 | break; |
| 266 | case EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE: |
| 267 | register_array = uniform_struct_to_ir((UINT32*)cur_pos, |
| 268 | sizeof(EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS) / sizeof(UINT32), ARM_AARCH32_SECURE_REGISTER_NAMES); |
| 269 | break; |
| 270 | case EFI_ARM_CONTEXT_TYPE_AARCH64_GPR: |
| 271 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 272 | sizeof(EFI_ARM_V8_AARCH64_GPR) / sizeof(UINT64), ARM_AARCH64_GPR_NAMES); |
| 273 | break; |
| 274 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL1: |
| 275 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 276 | sizeof(EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL1_REGISTER_NAMES); |
| 277 | break; |
| 278 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL2: |
| 279 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 280 | sizeof(EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL2_REGISTER_NAMES); |
| 281 | break; |
| 282 | case EFI_ARM_CONTEXT_TYPE_AARCH64_EL3: |
| 283 | register_array = uniform_struct64_to_ir((UINT64*)cur_pos, |
| 284 | sizeof(EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS) / sizeof(UINT64), ARM_AARCH64_EL3_REGISTER_NAMES); |
| 285 | break; |
| 286 | case EFI_ARM_CONTEXT_TYPE_MISC: |
| 287 | register_array = cper_arm_misc_register_array_to_ir((EFI_ARM_MISC_CONTEXT_REGISTER*)cur_pos); |
| 288 | break; |
| 289 | default: |
| 290 | //Unknown register array type. |
| 291 | //todo: Format raw binary data and add instead of blank. |
| 292 | register_array = json_object_new_object(); |
| 293 | break; |
| 294 | } |
| 295 | |
| 296 | //Set the current position to after the processor context structure. |
| 297 | *cur_pos = (UINT8*)(*cur_pos) + header->RegisterArraySize; |
| 298 | |
| 299 | return context_ir; |
| 300 | } |
| 301 | |
| 302 | //Converts a single CPER ARM miscellaneous register array to JSON IR format. |
| 303 | json_object* cper_arm_misc_register_array_to_ir(EFI_ARM_MISC_CONTEXT_REGISTER* misc_register) |
| 304 | { |
| 305 | json_object* register_array = json_object_new_object(); |
| 306 | json_object* mrs_encoding = json_object_new_object(); |
| 307 | json_object_object_add(mrs_encoding, "op2", json_object_new_int(misc_register->MrsOp2)); |
| 308 | json_object_object_add(mrs_encoding, "crm", json_object_new_int(misc_register->MrsOp2)); |
| 309 | json_object_object_add(mrs_encoding, "crn", json_object_new_int(misc_register->MrsOp2)); |
| 310 | json_object_object_add(mrs_encoding, "op1", json_object_new_int(misc_register->MrsOp2)); |
| 311 | json_object_object_add(mrs_encoding, "o0", json_object_new_int(misc_register->MrsOp2)); |
| 312 | json_object_object_add(register_array, "mrsEncoding", mrs_encoding); |
| 313 | json_object_object_add(register_array, "value", json_object_new_uint64(misc_register->Value)); |
| 314 | |
| 315 | return register_array; |
Lawrence Tang | 2800cd8 | 2022-07-05 16:08:20 +0100 | [diff] [blame] | 316 | } |