| Thang Q. Nguyen | c577c2e | 2020-12-22 03:33:40 +0000 | [diff] [blame^] | 1 | From 03dcf584823b8b7db7d437257dbb45bd4b7f95b4 Mon Sep 17 00:00:00 2001 |
| 2 | From: Chanh Nguyen <chnguyen@amperecomputing.com> |
| 3 | Date: Mon, 21 Dec 2020 07:01:14 +0000 |
| 4 | Subject: [PATCH] aspeed/scu : Switch PWM pin to GPIO input mode |
| 5 | |
| 6 | In hardware design, the PWM pins will be at a high level if they are |
| 7 | configured in GPIO Input mode. This commit configures all PWM function |
| 8 | pins to input GPIO mode. This will allow fans to run at full speed when BMC resets or in U-boot. |
| 9 | |
| 10 | Signed-off-by: Chanh Nguyen <chnguyen@amperecomputing.com> |
| 11 | --- |
| 12 | arch/arm/include/asm/arch-aspeed/ast_scu.h | 1 + |
| 13 | arch/arm/mach-aspeed/ast-scu.c | 12 ++++++++++++ |
| 14 | board/aspeed/ast-g5/ast-g5.c | 10 ++++++++++ |
| 15 | include/configs/ast-g5-phy.h | 3 +++ |
| 16 | 4 files changed, 26 insertions(+) |
| 17 | |
| 18 | diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h |
| 19 | index dcbc6730d4..d2c010a0dc 100644 |
| 20 | --- a/arch/arm/include/asm/arch-aspeed/ast_scu.h |
| 21 | +++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h |
| 22 | @@ -45,5 +45,6 @@ extern u32 ast_scu_get_vga_memsize(void); |
| 23 | extern void ast_scu_init_eth(u8 num); |
| 24 | extern void ast_scu_multi_func_eth(u8 num); |
| 25 | extern void ast_scu_multi_func_romcs(u8 num); |
| 26 | +extern void ast_scu_switch_pwm_to_gpio_mode(void); |
| 27 | |
| 28 | #endif |
| 29 | diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c |
| 30 | index 12de9b8036..ef90ef3805 100644 |
| 31 | --- a/arch/arm/mach-aspeed/ast-scu.c |
| 32 | +++ b/arch/arm/mach-aspeed/ast-scu.c |
| 33 | @@ -443,6 +443,18 @@ void ast_scu_multi_func_eth(u8 num) |
| 34 | } |
| 35 | } |
| 36 | |
| 37 | +void ast_scu_switch_pwm_to_gpio_mode(void) |
| 38 | +{ |
| 39 | + ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL3) & |
| 40 | + ~SCU_FUN_PIN_VPIG2 & |
| 41 | + ~SCU_FUN_PIN_VPIG3 & |
| 42 | + ~SCU_FUN_PIN_VPIG4 & |
| 43 | + ~SCU_FUN_PIN_VPIG5 & |
| 44 | + ~SCU_FUN_PIN_VPIG6 & |
| 45 | + ~SCU_FUN_PIN_VPIG7, |
| 46 | + AST_SCU_FUN_PIN_CTRL3); |
| 47 | +} |
| 48 | + |
| 49 | void ast_scu_multi_func_romcs(u8 num) |
| 50 | { |
| 51 | ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL3) | |
| 52 | diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c |
| 53 | index e67a4bf8b2..fba22a728e 100644 |
| 54 | --- a/board/aspeed/ast-g5/ast-g5.c |
| 55 | +++ b/board/aspeed/ast-g5/ast-g5.c |
| 56 | @@ -24,6 +24,16 @@ int board_init(void) |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | +#ifdef CONFIG_BOARD_LATE_INIT |
| 61 | +int board_late_init(void) |
| 62 | +{ |
| 63 | + /* Switch PWM to GPIO mode to make FAN run in max speed */ |
| 64 | + ast_scu_switch_pwm_to_gpio_mode(); |
| 65 | + |
| 66 | + return 0; |
| 67 | +} |
| 68 | +#endif |
| 69 | + |
| 70 | int dram_init(void) |
| 71 | { |
| 72 | u32 vga = ast_scu_get_vga_memsize(); |
| 73 | diff --git a/include/configs/ast-g5-phy.h b/include/configs/ast-g5-phy.h |
| 74 | index 62ddb841e5..5443a26cab 100644 |
| 75 | --- a/include/configs/ast-g5-phy.h |
| 76 | +++ b/include/configs/ast-g5-phy.h |
| 77 | @@ -30,4 +30,7 @@ |
| 78 | /* platform.S */ |
| 79 | #define CONFIG_DRAM_ECC_SIZE 0x10000000 |
| 80 | |
| 81 | +/* Call board_late_init */ |
| 82 | +#define CONFIG_BOARD_LATE_INIT 1 |
| 83 | + |
| 84 | #endif /* __AST_G5_PHY_CONFIG_H */ |
| 85 | -- |
| 86 | 2.25.1 |
| 87 | |