blob: d8343a91e03ab6aa59d44aa573c6aa262410d8b3 [file] [log] [blame]
Brad Bishop8e13d792016-06-04 23:10:52 -04001From 2e7be544f38127097b44799c5ec8004a3faafe2a Mon Sep 17 00:00:00 2001
2From: Brad Bishop <bradleyb@fuzziesquirrel.com>
3Date: Thu, 16 Jun 2016 22:17:45 -0400
4Subject: [PATCH] Add flash and layout to Witherspoon devtree
5
6Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
7---
8 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 33 ++++++++++++++++++++++++
9 1 file changed, 33 insertions(+)
10
11diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
12index bb5ec59..e0bbaf8 100644
13--- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
14+++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
15@@ -19,6 +19,39 @@
16 memory {
17 reg = <0x80000000 0x40000000>;
18 };
19+
20+ ahb {
21+
22+ fmc@1e620000 {
23+ reg = < 0x1e620000 0x94
24+ 0x20000000 0x02000000 >;
25+ #address-cells = <1>;
26+ #size-cells = <0>;
27+ compatible = "aspeed,fmc";
28+
29+ flash@0 {
30+ reg = < 0 >;
31+ compatible = "jedec,spi-nor" ;
32+#include "aspeed-bmc-opp-flash-layout.dtsi"
33+ };
34+ };
35+ spi@1e630000 {
36+ reg = < 0x1e630000 0x18
37+ 0x30000000 0x02000000 >;
38+ #address-cells = <1>;
39+ #size-cells = <0>;
40+ compatible = "aspeed,smc";
41+ flash {
42+ reg = < 0 >;
43+ compatible = "jedec,spi-nor" ;
44+ label = "pnor";
45+ /* spi-max-frequency = <>; */
46+ /* m25p,fast-read; */
47+ };
48+ };
49+
50+ };
51+
52 };
53
54 &uart5 {
55--
561.8.3.1
57