Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 1 | *** Settings *** |
| 2 | Documentation This suite tests checkstop operations through HOST. |
| 3 | Resource ../lib/utils.robot |
| 4 | Resource ../lib/openbmc_ffdc.robot |
| 5 | Resource ../lib/ras/host_utils.robot |
| 6 | Resource ../lib/resource.txt |
| 7 | Resource ../lib/state_manager.robot |
| 8 | Resource ../lib/openbmc_ffdc_methods.robot |
| 9 | Resource ../lib/boot_utils.robot |
| 10 | Variables ../lib/ras/variables.py |
| 11 | |
| 12 | Library DateTime |
| 13 | Library OperatingSystem |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 14 | Library random |
| 15 | Library Collections |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 16 | |
| 17 | Suite Setup RAS Suite Setup |
| 18 | Test Setup RAS Test Setup |
| 19 | Test Teardown FFDC On Test Case Fail |
| 20 | Suite Teardown RAS Suite Cleanup |
| 21 | |
Sweta Potthuri | 18753a7 | 2017-10-30 06:01:03 -0500 | [diff] [blame^] | 22 | Force Tags Host_RAS |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 23 | *** Variables *** |
| 24 | ${stack_mode} normal |
| 25 | |
| 26 | *** Test Cases *** |
| 27 | |
| 28 | # Memory channel (MCACALIFIR) related error injection. |
| 29 | |
| 30 | Verify Recoverable Callout Handling For MCA With Threshold 1 |
| 31 | [Documentation] Verify recoverable callout handling for MCACALIFIR with |
| 32 | ... threshold 1. |
| 33 | [Tags] Verify_Recoverable_Callout_Handling_For_MCA_With_Threshold_1 |
| 34 | |
| 35 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCACALIFIR_RECV1 |
| 36 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}mcacalfir_th1 |
| 37 | Inject Recoverable Error With Threshold Limit Through Host |
| 38 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 39 | |
| 40 | Verify Recoverable Callout Handling For MCA With Threshold 32 |
| 41 | [Documentation] Verify recoverable callout handling for MCACALIFIR with |
| 42 | ... threshold 32. |
| 43 | [Tags] Verify_Recoverable_Callout_Handling_For_MCA_With_Threshold_32 |
| 44 | |
| 45 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCACALIFIR_RECV32 |
| 46 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}mcacalfir_th32 |
| 47 | Inject Recoverable Error With Threshold Limit Through Host |
| 48 | ... ${value[0]} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 49 | |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 50 | Verify Unrecoverable Callout Handling For MCA |
| 51 | [Documentation] Verify unrecoverable callout handling for MCACALIFIR. |
| 52 | [Tags] Verify_Unrecoverable_Callout_Handling_For_MCA |
| 53 | |
| 54 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCACALIFIR_UE |
| 55 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}mcacalfir |
| 56 | Inject Unrecoverable Error Through Host |
| 57 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 58 | |
| 59 | # Memory buffer (MCIFIR) related error injection. |
| 60 | |
| 61 | Verify Recoverable Callout Handling For MCI With Threshold 1 |
| 62 | [Documentation] Verify recoverable callout handling for mci with |
| 63 | ... threshold 1. |
| 64 | [Tags] Verify_Recoverable_Callout_Handling_For_MCI_With_Threshold_1 |
| 65 | |
| 66 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCS_RECV1 |
| 67 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}mcifir_th1 |
| 68 | Inject Recoverable Error With Threshold Limit Through Host |
| 69 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 70 | |
| 71 | Verify Unrecoverable Callout Handling For MCI |
| 72 | [Documentation] Verify unrecoverable callout handling for mci. |
| 73 | [Tags] Verify_Unrecoverable_Callout_Handling_For_MCI |
| 74 | |
| 75 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} MCS_UE |
| 76 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}mcifir |
| 77 | Inject Unrecoverable Error Through Host |
| 78 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 79 | |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 80 | # CAPP accelerator (CXAFIR) related error injection. |
| 81 | |
| 82 | Verify Recoverable Callout Handling For CXA With Threshold 5 |
| 83 | [Documentation] Verify recoverable callout handling for CXA with |
| 84 | ... threshold 5. |
| 85 | [Tags] Verify_Recoverable_Callout_Handling_For_CXA_With_Threshold_5 |
| 86 | |
| 87 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} CXA_RECV5 |
| 88 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}cxafir_th5 |
| 89 | Inject Recoverable Error With Threshold Limit Through Host |
| 90 | ... ${value[0]} ${value[1]} 5 ${value[2]} ${err_log_path} |
| 91 | |
| 92 | Verify Recoverable Callout Handling For CXA With Threshold 32 |
| 93 | [Documentation] Verify recoverable callout handling for CXA with |
| 94 | ... threshold 32. |
| 95 | [Tags] Verify_Recoverable_Callout_Handling_For_CXA_With_Threshold_32 |
| 96 | |
| 97 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} CXA_RECV32 |
| 98 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}cxafir_th32 |
| 99 | Inject Recoverable Error With Threshold Limit Through Host |
| 100 | ... ${value[0]} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 101 | |
| 102 | # OBUSFIR related error injection. |
| 103 | |
| 104 | Verify Recoverable Callout Handling For OBUS With Threshold 32 |
| 105 | [Documentation] Verify recoverable callout handling for OBUS with |
| 106 | ... threshold 32. |
| 107 | [Tags] Verify_Recoverable_Callout_Handling_For_OBUS_With_Threshold_32 |
| 108 | |
| 109 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} OBUS_RECV32 |
| 110 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}obusfir_th32 |
| 111 | Inject Recoverable Error With Threshold Limit Through Host |
| 112 | ... ${value[0]} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 113 | |
| 114 | # Nvidia graphics processing units (NPU0FIR) related error injection. |
| 115 | |
| 116 | Verify Recoverable Callout Handling For NPU0 With Threshold 32 |
| 117 | [Documentation] Verify recoverable callout handling for NPU0 with |
| 118 | ... threshold 32. |
| 119 | [Tags] Verify_Recoverable_Callout_Handling_For_NPU0_With_Threshold_32 |
| 120 | |
| 121 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} NPU0_RECV32 |
| 122 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}npu0fir_th32 |
| 123 | Inject Recoverable Error With Threshold Limit Through Host |
| 124 | ... ${value[0]} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 125 | |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 126 | # Nest accelerator NXDMAENGFIR related error injection. |
| 127 | |
| 128 | Verify Recoverable Callout Handling For NXDMAENG With Threshold 1 |
| 129 | [Documentation] Verify recoverable callout handling for NXDMAENG with |
| 130 | ... threshold 1. |
| 131 | [Tags] Verify_Recoverable_Callout_Handling_For_NXDMAENG_With_Threshold_1 |
| 132 | |
| 133 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} NX_RECV1 |
| 134 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}nxfir_th1 |
| 135 | Inject Recoverable Error With Threshold Limit Through Host |
| 136 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 137 | |
| 138 | |
| 139 | Verify Recoverable Callout Handling For NXDMAENG With Threshold 32 |
| 140 | [Documentation] Verify recoverable callout handling for NXDMAENG with |
| 141 | ... threshold 32. |
| 142 | [Tags] Verify_Recoverable_Callout_Handling_For_NXDMAENG_With_Threshold_32 |
| 143 | |
| 144 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} NX_RECV32 |
| 145 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}nxfir_th32 |
| 146 | Inject Recoverable Error With Threshold Limit Through Host |
| 147 | ... ${value[0]} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 148 | |
| 149 | Verify Unrecoverable Callout Handling For NXDMAENG |
| 150 | [Documentation] Verify unrecoverable callout handling for NXDMAENG. |
| 151 | [Tags] Verify_Unrecoverable_Callout_Handling_For_NXDMAENG |
| 152 | |
| 153 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} NX_UE |
| 154 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}nxfir_ue |
| 155 | Inject Unrecoverable Error Through Host |
| 156 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 157 | |
Sridevi Ramesh | 151fcf0 | 2017-10-24 02:08:27 -0500 | [diff] [blame] | 158 | |
| 159 | # L2FIR related error injection. |
| 160 | |
| 161 | Verify Recoverable Callout Handling For L2FIR With Threshold 1 |
| 162 | [Documentation] Verify recoverable callout handling for L2FIR with |
| 163 | ... threshold 1. |
| 164 | [Tags] Verify_Recoverable_Callout_Handling_For_L2FIR_With_Threshold_1 |
| 165 | |
| 166 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} L2FIR_RECV1 |
| 167 | ${translated_fir}= Fetch FIR Address Translation Value 0 ${value[0]} EX |
| 168 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}l2fir_th1 |
| 169 | Inject Recoverable Error With Threshold Limit Through Host |
| 170 | ... ${translated_fir} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 171 | |
| 172 | # L3FIR related error injection. |
| 173 | |
| 174 | Verify Recoverable Callout Handling For L3FIR With Threshold 1 |
| 175 | [Documentation] Verify recoverable callout handling for L3FIR with |
| 176 | ... threshold 1. |
| 177 | [Tags] Verify_Recoverable_Callout_Handling_For_L3FIR_With_Threshold_1 |
| 178 | |
| 179 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} L3FIR_RECV1 |
| 180 | ${translated_fir}= Fetch FIR Address Translation Value 0 ${value[0]} EX |
| 181 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}l3fir_th1 |
| 182 | Inject Recoverable Error With Threshold Limit Through Host |
| 183 | ... ${translated_fir} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 184 | |
| 185 | Verify Recoverable Callout Handling For L3FIR With Threshold 32 |
| 186 | [Documentation] Verify recoverable callout handling for L3FIR with |
| 187 | ... threshold 32. |
| 188 | [Tags] Verify_Recoverable_Callout_Handling_For_L3FIR_With_Threshold_32 |
| 189 | |
| 190 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} L3FIR_RECV32 |
| 191 | ${translated_fir}= Fetch FIR Address Translation Value 0 ${value[0]} EX |
| 192 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}l3fir_th32 |
| 193 | Inject Recoverable Error With Threshold Limit Through Host |
| 194 | ... ${translated_fir} ${value[1]} 32 ${value[2]} ${err_log_path} |
| 195 | |
| 196 | # On chip controller (OCCFIR) related error injection. |
| 197 | |
| 198 | Verify Recoverable Callout Handling For OCC With Threshold 1 |
| 199 | [Documentation] Verify recoverable callout handling for OCCFIR with |
| 200 | ... threshold 1. |
| 201 | [Tags] Verify_Recoverable_Callout_Handling_For_OCC_With_Threshold_1 |
| 202 | |
| 203 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} OCCFIR_RECV1 |
| 204 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}occfir_th1 |
| 205 | Inject Recoverable Error With Threshold Limit Through Host |
| 206 | ... ${value[0]} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 207 | |
| 208 | # Core management engine (CMEFIR) related error injection. |
| 209 | |
| 210 | Verify Recoverable Callout Handling For CMEFIR With Threshold 1 |
| 211 | [Documentation] Verify recoverable callout handling for CMEFIR with |
| 212 | ... threshold 1. |
| 213 | [Tags] Verify_Recoverable_Callout_Handling_For_CMEFIR_With_Threshold_1 |
| 214 | |
| 215 | ${value}= Get From Dictionary ${ERROR_INJECT_DICT} CMEFIR_RECV1 |
| 216 | ${translated_fir}= Fetch FIR Address Translation Value 0 ${value[0]} EX |
| 217 | ${err_log_path}= Catenate ${RAS_LOG_DIR_PATH}cmefir_th1 |
| 218 | Inject Recoverable Error With Threshold Limit Through Host |
| 219 | ... ${translated_fir} ${value[1]} 1 ${value[2]} ${err_log_path} |
| 220 | |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 221 | *** Keywords *** |
| 222 | |
| 223 | Inject Error Through HOST |
| 224 | [Documentation] Inject checkstop on processor through HOST. |
| 225 | ... Test sequence: |
| 226 | ... 1. Boot To HOST |
| 227 | ... 2. Clear any existing gard records |
| 228 | ... 3. Inject Error on processor/centaur |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 229 | [Arguments] ${fir} ${chip_address} ${threshold_limit} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 230 | # Description of argument(s): |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 231 | # fir FIR (Fault isolation register) value (e.g. 2011400). |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 232 | # chip_address chip address (e.g 2000000000000000). |
| 233 | # threshold_limit Threshold limit (e.g 1, 5, 32). |
| 234 | |
| 235 | Delete Error Logs |
| 236 | Login To OS Host |
| 237 | Gard Operations On OS clear all |
| 238 | |
| 239 | # Fetch processor chip IDs. |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 240 | ${chip_ids}= Get ProcChipId From OS Processor |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 241 | ${proc_ids}= Split String ${chip_ids} |
| 242 | ${proc_id}= Get From List ${proc_ids} 1 |
| 243 | |
| 244 | ${threshold_limit}= Convert To Integer ${threshold_limit} |
| 245 | :FOR ${i} IN RANGE ${threshold_limit} |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 246 | \ Run Keyword Putscom Operations On OS ${proc_id} ${fir} ${chip_address} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 247 | # Adding delay after each error injection. |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 248 | \ Sleep 10s |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 249 | # Adding delay to get error log after error injection. |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 250 | Sleep 120s |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 251 | |
| 252 | Verify And Clear Gard Records On HOST |
| 253 | [Documentation] Verify And Clear gard records on HOST. |
| 254 | |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 255 | ${output}= Gard Operations On OS list |
| 256 | Should Not Contain ${output} 'No GARD entries to display' |
| 257 | Gard Operations On OS clear all |
| 258 | |
| 259 | Verify Error Log Entry |
| 260 | [Documentation] Verify error log entry & signature description. |
| 261 | [Arguments] ${signature_desc} ${log_prefix} |
| 262 | # Description of argument(s): |
| 263 | # signature_desc Error log signature description. |
| 264 | # log_prefix Log path prefix. |
| 265 | |
| 266 | ${resp}= OpenBMC Get Request ${BMC_LOGGING_ENTRY}/list |
| 267 | Should Not Be Equal As Strings ${resp.status_code} ${HTTP_NOT_FOUND} |
| 268 | |
| 269 | Collect eSEL Log ${log_prefix} |
| 270 | ${error_log_file_path}= Catenate ${log_prefix}esel.txt |
| 271 | ${rc} ${output} = Run and Return RC and Output |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 272 | ... grep -i ${signature_desc} ${error_log_file_path} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 273 | Should Not Be Empty ${output} |
| 274 | |
| 275 | Inject Recoverable Error With Threshold Limit Through Host |
| 276 | [Documentation] Inject and verify recoverable error on processor through |
| 277 | ... host. |
| 278 | ... Test sequence: |
| 279 | ... 1. Enable Auto Reboot Setting |
| 280 | ... 2. Inject Error on processor/centaur |
| 281 | ... 3. Check If HOST is running. |
| 282 | ... 4. Verify error log entry & signature description. |
| 283 | ... 4. Verify & clear gard records. |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 284 | [Arguments] ${fir} ${chip_address} ${threshold_limit} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 285 | ... ${signature_desc} ${log_prefix} |
| 286 | # Description of argument(s): |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 287 | # fir FIR (Fault isolation register) value (e.g. 2011400). |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 288 | # chip_address Chip address (e.g 2000000000000000). |
| 289 | # threshold_limit Threshold limit (e.g 1, 5, 32). |
| 290 | # signature_desc Error log signature description. |
| 291 | # log_prefix Log path prefix. |
| 292 | |
| 293 | Set Auto Reboot 1 |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 294 | Inject Error Through HOST ${fir} ${chip_address} ${threshold_limit} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 295 | Is Host Running |
| 296 | ${output}= Gard Operations On OS list |
| 297 | Should Contain ${output} No GARD |
| 298 | Verify Error Log Entry ${signature_desc} ${log_prefix} |
| 299 | |
| 300 | |
| 301 | Inject Unrecoverable Error Through Host |
| 302 | [Documentation] Inject and verify recoverable error on processor through |
| 303 | ... host. |
| 304 | ... Test sequence: |
| 305 | ... 1. Enable Auto Reboot Setting |
| 306 | ... 2. Inject Error on processor/centaur |
| 307 | ... 3. Check If HOST is rebooted. |
| 308 | ... 4. Verify error log entry & signature description. |
| 309 | ... 4. Verify & clear gard records. |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 310 | [Arguments] ${fir} ${chip_address} ${threshold_limit} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 311 | ... ${signature_desc} ${log_prefix} |
| 312 | # Description of argument(s): |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 313 | # fir FIR (Fault isolation register) value (e.g. 2011400). |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 314 | # chip_address Chip address (e.g 2000000000000000). |
| 315 | # threshold_limit Threshold limit (e.g 1, 5, 32). |
| 316 | # signature_desc Error Log signature description. |
| 317 | # (e.g 'mcs(n0p0c0) (MCFIR[0]) mc internal recoverable') |
| 318 | # log_prefix Log path prefix. |
| 319 | |
| 320 | Set Auto Reboot 1 |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 321 | Inject Error Through HOST ${fir} ${chip_address} ${threshold_limit} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 322 | Wait Until Keyword Succeeds 500 sec 20 sec Is Host Rebooted |
| 323 | Wait for OS |
| 324 | Verify And Clear Gard Records On HOST |
| 325 | Verify Error Log Entry ${signature_desc} ${log_prefix} |
| 326 | |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 327 | Fetch FIR Address Translation Value |
| 328 | [Documentation] Fetch FIR address translation value through HOST. |
| 329 | [Arguments] ${proc_chip_id} ${fir} ${target_type} |
| 330 | # Description of argument(s): |
| 331 | # proc_chip_id Processor chip ID (e.g '0', '8'). |
| 332 | # fir FIR (Fault isolation register) value (e.g. 2011400). |
| 333 | # core_id Core ID (e.g. 9). |
| 334 | # target_type Target type (e.g. 'EX', 'EQ', 'C'). |
| 335 | |
| 336 | Login To OS Host |
| 337 | Copy Address Translation Utils To HOST OS |
| 338 | |
| 339 | ${core_ids}= Get Core IDs From OS 0 |
| 340 | # Ignoring master core ID. |
| 341 | ${output}= Get Slice From List ${core_ids} 1 |
| 342 | # Feth random non-master core ID. |
| 343 | ${core_ids_sub_list}= Evaluate random.sample(${core_ids}, 1) random |
| 344 | ${core_id}= Get From List ${core_ids_sub_list} 0 |
| 345 | ${translated_fir_addr}= FIR Address Translation Through HOST |
| 346 | ... ${fir} ${core_id} ${target_type} |
| 347 | |
| 348 | [Return] ${translated_fir_addr} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 349 | |
| 350 | RAS Test SetUp |
| 351 | [Documentation] Validates input parameters. |
| 352 | |
| 353 | Should Not Be Empty |
| 354 | ... ${OS_HOST} msg=You must provide DNS name/IP of the OS host. |
| 355 | Should Not Be Empty |
| 356 | ... ${OS_USERNAME} msg=You must provide OS host user name. |
| 357 | Should Not Be Empty |
| 358 | ... ${OS_PASSWORD} msg=You must provide OS host user password. |
| 359 | |
| 360 | # Boot to OS. |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 361 | REST Power On quiet=${1} |
Sridevi Ramesh | 0d88ab3 | 2017-09-21 11:07:28 -0500 | [diff] [blame] | 362 | # Adding delay to after host bring up. |
| 363 | Sleep 60s |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 364 | |
| 365 | RAS Suite Setup |
| 366 | [Documentation] Create RAS log directory to store all RAS test logs. |
| 367 | |
| 368 | ${RAS_LOG_DIR_PATH}= Catenate ${EXECDIR}/RAS_logs/ |
| 369 | Set Suite Variable ${RAS_LOG_DIR_PATH} |
| 370 | Create Directory ${RAS_LOG_DIR_PATH} |
| 371 | OperatingSystem.Directory Should Exist ${RAS_LOG_DIR_PATH} |
| 372 | Empty Directory ${RAS_LOG_DIR_PATH} |
| 373 | |
| 374 | RAS Suite Cleanup |
| 375 | [Documentation] Perform RAS suite cleanup and verify that host |
| 376 | ... boots after test suite run. |
| 377 | |
| 378 | # Boot to OS. |
Sridevi Ramesh | 6bd6b4c | 2017-10-10 04:38:30 -0500 | [diff] [blame] | 379 | REST Power On quiet=${1} |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 380 | Delete Error Logs |
Sridevi Ramesh | b180c9f | 2017-08-06 10:27:41 -0500 | [diff] [blame] | 381 | Gard Operations On OS clear all |