| From 684b8f88238f522b52eb102485762e02e6b1671a Mon Sep 17 00:00:00 2001 |
| From: Emekcan Aras <Emekcan.Aras@arm.com> |
| Date: Fri, 23 Feb 2024 13:17:59 +0000 |
| Subject: [PATCH] fix(spmd): remove EL3 interrupt registration |
| |
| This configuration should not be done for corstone1000 and similar |
| platforms. GICv2 systems only support EL3 interrupts and can have SEL1 component |
| as SPMC. |
| |
| Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> |
| Upstream-Status: Inappropriate [Discussions of fixing this in a better way is ongoing in upstream] |
| --- |
| services/std_svc/spmd/spmd_main.c | 24 ------------------------ |
| 1 file changed, 24 deletions(-) |
| |
| diff --git a/services/std_svc/spmd/spmd_main.c b/services/std_svc/spmd/spmd_main.c |
| index 066571e9b..313f05bf3 100644 |
| --- a/services/std_svc/spmd/spmd_main.c |
| +++ b/services/std_svc/spmd/spmd_main.c |
| @@ -580,30 +580,6 @@ static int spmd_spmc_init(void *pm_addr) |
| panic(); |
| } |
| |
| - /* |
| - * Permit configurations where the SPM resides at S-EL1/2 and upon a |
| - * Group0 interrupt triggering while the normal world runs, the |
| - * interrupt is routed either through the EHF or directly to the SPMD: |
| - * |
| - * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD |
| - * for handling by spmd_group0_interrupt_handler_nwd. |
| - * |
| - * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF. |
| - * |
| - */ |
| -#if (EL3_EXCEPTION_HANDLING == 0) |
| - /* |
| - * Register an interrupt handler routing Group0 interrupts to SPMD |
| - * while the NWd is running. |
| - */ |
| - rc = register_interrupt_type_handler(INTR_TYPE_EL3, |
| - spmd_group0_interrupt_handler_nwd, |
| - flags); |
| - if (rc != 0) { |
| - panic(); |
| - } |
| -#endif |
| - |
| return 0; |
| } |
| |
| -- |
| 2.25.1 |
| |
| |