u-boot-aspeed: MT25QL01GB NOR and G5 variant support

Adriana Kobylak (1):
      aspeed: flash: Add MT25QL01GB chip

David Thompson (1):
      aspeed/ast-scu.c: add ast_get_m_pll_clk() for AST_SOC_G5

(From meta-aspeed rev: e16d4b9d34e083c851b31d33c549f70fc258ca11)

Change-Id: Ibf2c19287048c2fa82c9c9cffdb86f524cdee16c
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed_2016.07.inc b/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed_2016.07.inc
index 16a2e9c..ac60400 100644
--- a/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed_2016.07.inc
+++ b/meta-aspeed/recipes-bsp/u-boot/u-boot-common-aspeed_2016.07.inc
@@ -8,7 +8,7 @@
 
 # We use the revision in order to avoid having to fetch it from the
 # repo during parse
-SRCREV = "fc8646ea8a4f24ff8267fa2eee0ee33327f1f36c"
+SRCREV = "3c33d1e84ebb8d2305725c509a7c6df1125afa62"
 
 UBRANCH = "v2016.07-aspeed-openbmc"
 SRC_URI = "git://git@github.com/openbmc/u-boot.git;branch=${UBRANCH};protocol=https"