e3c246d4i: enable x86-power-control
The config has a slight hack regarding the SioPowerGood/PowerOk signals
(as explained in a comment in the file). The O_PWROK GPIO line perhaps
"should" be the SioPowerGood signal, but we also don't have
SioOnControl, so power-control disables its SIO support anyway, and
using O_PWROK as PowerOk seems to work alright.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Change-Id: Ie3ef974e7edc172c82f63cb0129d90d098b15906
diff --git a/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf b/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf
index ad67ece..38fb811 100644
--- a/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf
+++ b/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf
@@ -10,3 +10,6 @@
PREFERRED_PROVIDER_virtual/obmc-flash-mgmt = "packagegroup-asrock-apps"
PREFERRED_PROVIDER_virtual/obmc-system-mgmt = "packagegroup-asrock-apps"
+
+VIRTUAL-RUNTIME_obmc-host-state-manager = "x86-power-control"
+VIRTUAL-RUNTIME_obmc-chassis-state-manager = "x86-power-control"
diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json
new file mode 100644
index 0000000..e46faca
--- /dev/null
+++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json
@@ -0,0 +1,93 @@
+{
+ "gpio_configs": [
+ {
+ "Name" : "IdButton",
+ "LineName" : "",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "NMIButton",
+ "LineName" : "NMI_BTN_N",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "NMIOut",
+ "LineName" : "BMC_NMI",
+ "Type" : "GPIO",
+ "Polarity": "ActiveHigh"
+ },
+ {
+ "Name" : "PostComplete",
+ "LineName" : "FM_BIOS_POST_CMPLT_N",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "PowerButton",
+ "LineName" : "BMC_PSIN",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "PowerOk",
+ /*
+ * The e3c246d4i doesn't have a PS_PWROK signal as far as
+ * I can tell. It does have an O_PWROK line that's driven
+ * by the SuperIO chip, which may "actually" be
+ * SioPowerGood, but it seems to work for this, so...?
+ */
+ "LineName" : "O_PWROK",
+ "Type" : "GPIO",
+ "Polarity": "ActiveHigh"
+ },
+ {
+ "Name" : "PowerOut",
+ "LineName" : "BMC_PSOUT",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "ResetButton",
+ "LineName" : "BMC_RESETCON",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "ResetOut",
+ "LineName" : "RESETCON",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "SioOnControl",
+ "LineName" : "",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ },
+ {
+ "Name" : "SioPowerGood",
+ "LineName" : "",
+ "Type" : "GPIO",
+ "Polarity": "ActiveHigh"
+ },
+ {
+ "Name" : "SIOS5",
+ "LineName" : "SLP_S5",
+ "Type" : "GPIO",
+ "Polarity": "ActiveLow"
+ }
+ ],
+ "timing_configs": {
+ "PowerPulseMs": 200,
+ "ForceOffPulseMs": 15000,
+ "ResetPulseMs": 500,
+ "PowerCycleMs": 5000,
+ "SioPowerGoodWatchdogMs": 1000,
+ "PsPowerOKWatchdogMs": 8000,
+ "GracefulPowerOffS": 300,
+ "WarmResetCheckMs": 500,
+ "PowerOffSaveMs": 7000
+ }
+}
diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend
new file mode 100644
index 0000000..f54fe06
--- /dev/null
+++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend
@@ -0,0 +1,10 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
+
+SRC_URI += " \
+ file://power-config-host0.json \
+ "
+
+do_install:append() {
+ install -d ${D}/${datadir}/${PN}
+ install -m 0644 ${WORKDIR}/power-config-host0.json ${D}/${datadir}/${PN}
+}