| From 17353cc4ba521f5ad928a1ede61cf03110e366ae Mon Sep 17 00:00:00 2001 |
| From: Mahesh Bodapati <mbodapat@xilinx.com> |
| Date: Sat, 26 Aug 2017 19:21:43 -0700 |
| Subject: [PATCH] 8-stage pipeline for microblaze |
| |
| This patch adds the support for the 8-stage pipeline. The new 8-stage |
| pipeline reduces the latencies of float & integer division drastically |
| |
| ChangeLog: |
| |
| 2016-01-18 Nagaraju Mekala <nagaraju.mekala@xilinx.com> |
| |
| * microblaze.md (define_automaton mbpipe_8): New |
| * microblaze.c (microblaze_option_override): Update |
| Updated the logic to generate only when MB version is 10.0 |
| * microblaze.h (pipeline_type): Update |
| Update the enum with MICROBLAZE_PIPE_8 |
| * microblaze.opt (mxl-frequency): New |
| New flag added for 8-stage pipeline |
| |
| Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> |
| Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> |
| Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> |
| Upstream-Status: Pending |
| --- |
| gcc/config/microblaze/microblaze.c | 13 ++++++ |
| gcc/config/microblaze/microblaze.h | 3 +- |
| gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++++++++++- |
| gcc/config/microblaze/microblaze.opt | 4 ++ |
| 4 files changed, 96 insertions(+), 3 deletions(-) |
| |
| diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c |
| index 663b20a022..e7697bf30d 100644 |
| --- a/gcc/config/microblaze/microblaze.c |
| +++ b/gcc/config/microblaze/microblaze.c |
| @@ -1773,6 +1773,19 @@ microblaze_option_override (void) |
| warning (0, "-mxl-reorder requires -mxl-pattern-compare for -mcpu=v8.30.a"); |
| TARGET_REORDER = 0; |
| } |
| + ver = ver_int - microblaze_version_to_int("v10.0"); |
| + if (ver < 0) |
| + { |
| + if (TARGET_AREA_OPTIMIZED_2) |
| + warning (0, "-mxl-frequency can be used only with -mcpu=v10.0 or greater"); |
| + } |
| + else |
| + { |
| + if (TARGET_AREA_OPTIMIZED_2) |
| + microblaze_pipe = MICROBLAZE_PIPE_8; |
| + if (TARGET_BARREL_SHIFT) |
| + microblaze_has_bitfield = 1; |
| + } |
| |
| if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) |
| error ("-mxl-multiply-high requires -mno-xl-soft-mul"); |
| diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h |
| index 82e7e890be..3f48e48f10 100644 |
| --- a/gcc/config/microblaze/microblaze.h |
| +++ b/gcc/config/microblaze/microblaze.h |
| @@ -27,7 +27,8 @@ |
| enum pipeline_type |
| { |
| MICROBLAZE_PIPE_3 = 0, |
| - MICROBLAZE_PIPE_5 = 1 |
| + MICROBLAZE_PIPE_5 = 1, |
| + MICROBLAZE_PIPE_8 = 2 |
| }; |
| |
| #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 |
| diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
| index b9c62b6d0f..61d6412dac 100644 |
| --- a/gcc/config/microblaze/microblaze.md |
| +++ b/gcc/config/microblaze/microblaze.md |
| @@ -35,6 +35,7 @@ |
| (R_GOT 20) ;; GOT ptr reg |
| (MB_PIPE_3 0) ;; Microblaze 3-stage pipeline |
| (MB_PIPE_5 1) ;; Microblaze 5-stage pipeline |
| + (MB_PIPE_8 2) ;; Microblaze 8-stage pipeline |
| (UNSPEC_SET_GOT 101) ;; |
| (UNSPEC_GOTOFF 102) ;; GOT offset |
| (UNSPEC_PLT 103) ;; jump table |
| @@ -80,7 +81,7 @@ |
| ;; bshift Shift operations |
| |
| (define_attr "type" |
| - "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap" |
| + "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,fint,trap" |
| (const_string "unknown")) |
| |
| ;; Main data type used by the insn |
| @@ -222,6 +223,80 @@ |
| ;;----------------------------------------------------------------- |
| |
| |
| + |
| +;;---------------------------------------------------------------- |
| +;; Microblaze 8-stage pipeline description (v10.0 and later) |
| +;;---------------------------------------------------------------- |
| + |
| +(define_automaton "mbpipe_8") |
| +(define_cpu_unit "mb8_issue,mb8_iu,mb8_wb,mb8_fpu,mb8_fpu_2,mb8_mul,mb8_mul_2,mb8_div,mb8_div_2,mb8_bs,mb8_bs_2" "mbpipe_8") |
| + |
| +(define_insn_reservation "mb8-integer" 1 |
| + (and (eq_attr "type" "branch,jump,call,arith,darith,icmp,nop,no_delay_arith") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_iu,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-special-move" 2 |
| + (and (eq_attr "type" "move") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_iu*2,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-mem-load" 3 |
| + (and (eq_attr "type" "load,no_delay_load") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_iu,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-mem-store" 1 |
| + (and (eq_attr "type" "store,no_delay_store") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_iu,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-mul" 3 |
| + (and (eq_attr "type" "imul,no_delay_imul") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_mul,mb8_mul_2*2,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-div" 30 |
| + (and (eq_attr "type" "idiv") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_div,mb8_div_2*29,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-bs" 2 |
| + (and (eq_attr "type" "bshift") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_bs,mb8_bs_2,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-add-sub-mul" 1 |
| + (and (eq_attr "type" "fadd,frsub,fmul") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-fcmp" 3 |
| + (and (eq_attr "type" "fcmp") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_fpu*2,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-div" 24 |
| + (and (eq_attr "type" "fdiv") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_fpu_2*23,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-sqrt" 23 |
| + (and (eq_attr "type" "fsqrt") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_fpu_2*22,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-fcvt" 1 |
| + (and (eq_attr "type" "fcvt") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_wb") |
| + |
| +(define_insn_reservation "mb8-fpu-fint" 2 |
| + (and (eq_attr "type" "fint") |
| + (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) |
| + "mb8_issue,mb8_fpu,mb8_wb") |
| + |
| + |
| ;;---------------------------------------------------------------- |
| ;; Microblaze 5-stage pipeline description (v5.00.a and later) |
| ;;---------------------------------------------------------------- |
| @@ -468,7 +543,7 @@ |
| (fix:SI (match_operand:SF 1 "register_operand" "d")))] |
| "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" |
| "fint\t%0,%1" |
| - [(set_attr "type" "fcvt") |
| + [(set_attr "type" "fint") |
| (set_attr "mode" "SF") |
| (set_attr "length" "4")]) |
| |
| diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt |
| index 8847c3daf8..85a9929d74 100644 |
| --- a/gcc/config/microblaze/microblaze.opt |
| +++ b/gcc/config/microblaze/microblaze.opt |
| @@ -129,3 +129,7 @@ Use hardware prefetch instruction |
| |
| mxl-mode-xilkernel |
| Target |
| + |
| +mxl-frequency |
| +Target Mask(AREA_OPTIMIZED_2) |
| +Use 8 stage pipeline (frequency optimization) |
| -- |
| 2.14.2 |
| |