| From 546f2708ffa1aa44018be65172013289cf896710 Mon Sep 17 00:00:00 2001 |
| From: Qing He <qing.he@intel.com> |
| Date: Fri, 27 Aug 2010 10:15:31 +0800 |
| Subject: [PATCH] libaio: add new recipe |
| |
| Upstream-Status: Inappropriate [embedded specific] |
| |
| from openembedded, added by Qing He <qing.he@intel.com> |
| |
| --- |
| src/syscall-m68k.h | 78 +++++++++++++++ |
| src/syscall-mips.h | 223 +++++++++++++++++++++++++++++++++++++++++++ |
| src/syscall-parisc.h | 146 ++++++++++++++++++++++++++++ |
| src/syscall.h | 6 ++ |
| 4 files changed, 453 insertions(+) |
| create mode 100644 src/syscall-m68k.h |
| create mode 100644 src/syscall-mips.h |
| create mode 100644 src/syscall-parisc.h |
| |
| diff --git a/src/syscall-m68k.h b/src/syscall-m68k.h |
| new file mode 100644 |
| index 0000000..f440412 |
| --- /dev/null |
| +++ b/src/syscall-m68k.h |
| @@ -0,0 +1,78 @@ |
| +#define __NR_io_setup 241 |
| +#define __NR_io_destroy 242 |
| +#define __NR_io_getevents 243 |
| +#define __NR_io_submit 244 |
| +#define __NR_io_cancel 245 |
| + |
| +#define io_syscall1(type,fname,sname,atype,a) \ |
| +type fname(atype a) \ |
| +{ \ |
| +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| +register long __a __asm__ ("%d1") = (long)(a); \ |
| +__asm__ __volatile__ ("trap #0" \ |
| + : "+d" (__res) \ |
| + : "d" (__a) ); \ |
| +return (type) __res; \ |
| +} |
| + |
| +#define io_syscall2(type,fname,sname,atype,a,btype,b) \ |
| +type fname(atype a,btype b) \ |
| +{ \ |
| +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| +register long __a __asm__ ("%d1") = (long)(a); \ |
| +register long __b __asm__ ("%d2") = (long)(b); \ |
| +__asm__ __volatile__ ("trap #0" \ |
| + : "+d" (__res) \ |
| + : "d" (__a), "d" (__b) \ |
| + ); \ |
| +return (type) __res; \ |
| +} |
| + |
| +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ |
| +type fname(atype a,btype b,ctype c) \ |
| +{ \ |
| +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| +register long __a __asm__ ("%d1") = (long)(a); \ |
| +register long __b __asm__ ("%d2") = (long)(b); \ |
| +register long __c __asm__ ("%d3") = (long)(c); \ |
| +__asm__ __volatile__ ("trap #0" \ |
| + : "+d" (__res) \ |
| + : "d" (__a), "d" (__b), \ |
| + "d" (__c) \ |
| + ); \ |
| +return (type) __res; \ |
| +} |
| + |
| +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ |
| +type fname (atype a, btype b, ctype c, dtype d) \ |
| +{ \ |
| +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| +register long __a __asm__ ("%d1") = (long)(a); \ |
| +register long __b __asm__ ("%d2") = (long)(b); \ |
| +register long __c __asm__ ("%d3") = (long)(c); \ |
| +register long __d __asm__ ("%d4") = (long)(d); \ |
| +__asm__ __volatile__ ("trap #0" \ |
| + : "+d" (__res) \ |
| + : "d" (__a), "d" (__b), \ |
| + "d" (__c), "d" (__d) \ |
| + ); \ |
| +return (type) __res; \ |
| +} |
| + |
| +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| +type fname (atype a,btype b,ctype c,dtype d,etype e) \ |
| +{ \ |
| +register long __res __asm__ ("%d0") = __NR_##sname; \ |
| +register long __a __asm__ ("%d1") = (long)(a); \ |
| +register long __b __asm__ ("%d2") = (long)(b); \ |
| +register long __c __asm__ ("%d3") = (long)(c); \ |
| +register long __d __asm__ ("%d4") = (long)(d); \ |
| +register long __e __asm__ ("%d5") = (long)(e); \ |
| +__asm__ __volatile__ ("trap #0" \ |
| + : "+d" (__res) \ |
| + : "d" (__a), "d" (__b), \ |
| + "d" (__c), "d" (__d), "d" (__e) \ |
| + ); \ |
| +return (type) __res; \ |
| +} |
| + |
| diff --git a/src/syscall-mips.h b/src/syscall-mips.h |
| new file mode 100644 |
| index 0000000..4142499 |
| --- /dev/null |
| +++ b/src/syscall-mips.h |
| @@ -0,0 +1,223 @@ |
| +/* |
| + * This file is subject to the terms and conditions of the GNU General Public |
| + * License. See the file "COPYING" in the main directory of this archive |
| + * for more details. |
| + * |
| + * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle |
| + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
| + * |
| + * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto |
| + * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A |
| + */ |
| + |
| +#ifndef _MIPS_SIM_ABI32 |
| +#define _MIPS_SIM_ABI32 1 |
| +#define _MIPS_SIM_NABI32 2 |
| +#define _MIPS_SIM_ABI64 3 |
| +#endif |
| + |
| +#if _MIPS_SIM == _MIPS_SIM_ABI32 |
| + |
| +/* |
| + * Linux o32 style syscalls are in the range from 4000 to 4999. |
| + */ |
| +#define __NR_Linux 4000 |
| +#define __NR_io_setup (__NR_Linux + 241) |
| +#define __NR_io_destroy (__NR_Linux + 242) |
| +#define __NR_io_getevents (__NR_Linux + 243) |
| +#define __NR_io_submit (__NR_Linux + 244) |
| +#define __NR_io_cancel (__NR_Linux + 245) |
| + |
| +#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
| + |
| +#if _MIPS_SIM == _MIPS_SIM_ABI64 |
| + |
| +/* |
| + * Linux 64-bit syscalls are in the range from 5000 to 5999. |
| + */ |
| +#define __NR_Linux 5000 |
| +#define __NR_io_setup (__NR_Linux + 200) |
| +#define __NR_io_destroy (__NR_Linux + 201) |
| +#define __NR_io_getevents (__NR_Linux + 202) |
| +#define __NR_io_submit (__NR_Linux + 203) |
| +#define __NR_io_cancel (__NR_Linux + 204) |
| +#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
| + |
| +#if _MIPS_SIM == _MIPS_SIM_NABI32 |
| + |
| +/* |
| + * Linux N32 syscalls are in the range from 6000 to 6999. |
| + */ |
| +#define __NR_Linux 6000 |
| +#define __NR_io_setup (__NR_Linux + 200) |
| +#define __NR_io_destroy (__NR_Linux + 201) |
| +#define __NR_io_getevents (__NR_Linux + 202) |
| +#define __NR_io_submit (__NR_Linux + 203) |
| +#define __NR_io_cancel (__NR_Linux + 204) |
| +#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
| + |
| +#define io_syscall1(type,fname,sname,atype,a) \ |
| +type fname(atype a) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a3 asm("$7"); \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "li\t$2, %3\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "=r" (__a3) \ |
| + : "r" (__a0), "i" (__NR_##sname) \ |
| + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#define io_syscall2(type,fname,sname,atype,a,btype,b) \ |
| +type fname(atype a, btype b) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| + register unsigned long __a3 asm("$7"); \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "li\t$2, %4\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "=r" (__a3) \ |
| + : "r" (__a0), "r" (__a1), "i" (__NR_##sname) \ |
| + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#define io_syscall3(type,fname,sname,atype,a,btype,b,ctype,c) \ |
| +type fname(atype a, btype b, ctype c) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| + register unsigned long __a3 asm("$7"); \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "=r" (__a3) \ |
| + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ |
| + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#define io_syscall4(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d) \ |
| +type fname(atype a, btype b, ctype c, dtype d) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "+r" (__a3) \ |
| + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname) \ |
| + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#if (_MIPS_SIM == _MIPS_SIM_ABI32) |
| + |
| +/* |
| + * Using those means your brain needs more than an oil change ;-) |
| + */ |
| + |
| +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| +type fname(atype a, btype b, ctype c, dtype d, etype e) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "lw\t$2, %6\n\t" \ |
| + "subu\t$29, 32\n\t" \ |
| + "sw\t$2, 16($29)\n\t" \ |
| + "li\t$2, %5\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + "addiu\t$29, 32\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "+r" (__a3) \ |
| + : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##sname), \ |
| + "m" ((unsigned long)e) \ |
| + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */ |
| + |
| +#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) |
| + |
| +#define io_syscall5(type,fname,sname,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ |
| +type fname (atype a,btype b,ctype c,dtype d,etype e) \ |
| +{ \ |
| + register unsigned long __a0 asm("$4") = (unsigned long) a; \ |
| + register unsigned long __a1 asm("$5") = (unsigned long) b; \ |
| + register unsigned long __a2 asm("$6") = (unsigned long) c; \ |
| + register unsigned long __a3 asm("$7") = (unsigned long) d; \ |
| + register unsigned long __a4 asm("$8") = (unsigned long) e; \ |
| + unsigned long __v0; \ |
| + \ |
| + __asm__ volatile ( \ |
| + ".set\tnoreorder\n\t" \ |
| + "li\t$2, %6\t\t\t# " #fname "\n\t" \ |
| + "syscall\n\t" \ |
| + "move\t%0, $2\n\t" \ |
| + ".set\treorder" \ |
| + : "=&r" (__v0), "+r" (__a3) \ |
| + : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##sname) \ |
| + : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \ |
| + "memory"); \ |
| + \ |
| + if (__a3 == 0) \ |
| + return (type) __v0; \ |
| + return (type) -1; \ |
| +} |
| + |
| +#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */ |
| + |
| diff --git a/src/syscall-parisc.h b/src/syscall-parisc.h |
| new file mode 100644 |
| index 0000000..ff61746 |
| --- /dev/null |
| +++ b/src/syscall-parisc.h |
| @@ -0,0 +1,146 @@ |
| +/* |
| + * Linux system call numbers. |
| + * |
| + * Cary Coutant says that we should just use another syscall gateway |
| + * page to avoid clashing with the HPUX space, and I think he's right: |
| + * it will would keep a branch out of our syscall entry path, at the |
| + * very least. If we decide to change it later, we can ``just'' tweak |
| + * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be |
| + * 1024 or something. Oh, and recompile libc. =) |
| + * |
| + * 64-bit HPUX binaries get the syscall gateway address passed in a register |
| + * from the kernel at startup, which seems a sane strategy. |
| + */ |
| + |
| +#define __NR_Linux 0 |
| +#define __NR_io_setup (__NR_Linux + 215) |
| +#define __NR_io_destroy (__NR_Linux + 216) |
| +#define __NR_io_getevents (__NR_Linux + 217) |
| +#define __NR_io_submit (__NR_Linux + 218) |
| +#define __NR_io_cancel (__NR_Linux + 219) |
| + |
| +#define SYS_ify(syscall_name) __NR_##syscall_name |
| + |
| +/* Assume all syscalls are done from PIC code just to be |
| + * safe. The worst case scenario is that you lose a register |
| + * and save/restore r19 across the syscall. */ |
| +#define PIC |
| + |
| +/* Definition taken from glibc 2.3.3 |
| + * sysdeps/unix/sysv/linux/hppa/sysdep.h |
| + */ |
| + |
| +#ifdef PIC |
| +/* WARNING: CANNOT BE USED IN A NOP! */ |
| +# define K_STW_ASM_PIC " copy %%r19, %%r4\n" |
| +# define K_LDW_ASM_PIC " copy %%r4, %%r19\n" |
| +# define K_USING_GR4 "%r4", |
| +#else |
| +# define K_STW_ASM_PIC " \n" |
| +# define K_LDW_ASM_PIC " \n" |
| +# define K_USING_GR4 |
| +#endif |
| + |
| +/* GCC has to be warned that a syscall may clobber all the ABI |
| + registers listed as "caller-saves", see page 8, Table 2 |
| + in section 2.2.6 of the PA-RISC RUN-TIME architecture |
| + document. However! r28 is the result and will conflict with |
| + the clobber list so it is left out. Also the input arguments |
| + registers r20 -> r26 will conflict with the list so they |
| + are treated specially. Although r19 is clobbered by the syscall |
| + we cannot say this because it would violate ABI, thus we say |
| + r4 is clobbered and use that register to save/restore r19 |
| + across the syscall. */ |
| + |
| +#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \ |
| + "%r20", "%r29", "%r31" |
| + |
| +#undef K_INLINE_SYSCALL |
| +#define K_INLINE_SYSCALL(name, nr, args...) ({ \ |
| + long __sys_res; \ |
| + { \ |
| + register unsigned long __res __asm__("r28"); \ |
| + K_LOAD_ARGS_##nr(args) \ |
| + /* FIXME: HACK stw/ldw r19 around syscall */ \ |
| + __asm__ volatile( \ |
| + K_STW_ASM_PIC \ |
| + " ble 0x100(%%sr2, %%r0)\n" \ |
| + " ldi %1, %%r20\n" \ |
| + K_LDW_ASM_PIC \ |
| + : "=r" (__res) \ |
| + : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \ |
| + : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \ |
| + ); \ |
| + __sys_res = (long)__res; \ |
| + } \ |
| + __sys_res; \ |
| +}) |
| + |
| +#define K_LOAD_ARGS_0() |
| +#define K_LOAD_ARGS_1(r26) \ |
| + register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \ |
| + K_LOAD_ARGS_0() |
| +#define K_LOAD_ARGS_2(r26,r25) \ |
| + register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \ |
| + K_LOAD_ARGS_1(r26) |
| +#define K_LOAD_ARGS_3(r26,r25,r24) \ |
| + register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \ |
| + K_LOAD_ARGS_2(r26,r25) |
| +#define K_LOAD_ARGS_4(r26,r25,r24,r23) \ |
| + register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \ |
| + K_LOAD_ARGS_3(r26,r25,r24) |
| +#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ |
| + register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \ |
| + K_LOAD_ARGS_4(r26,r25,r24,r23) |
| +#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ |
| + register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \ |
| + K_LOAD_ARGS_5(r26,r25,r24,r23,r22) |
| + |
| +/* Even with zero args we use r20 for the syscall number */ |
| +#define K_ASM_ARGS_0 |
| +#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26) |
| +#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25) |
| +#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24) |
| +#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23) |
| +#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22) |
| +#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21) |
| + |
| +/* The registers not listed as inputs but clobbered */ |
| +#define K_CLOB_ARGS_6 |
| +#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21" |
| +#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22" |
| +#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23" |
| +#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24" |
| +#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25" |
| +#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26" |
| + |
| +#define io_syscall1(type,fname,sname,type1,arg1) \ |
| +type fname(type1 arg1) \ |
| +{ \ |
| + return K_INLINE_SYSCALL(sname, 1, arg1); \ |
| +} |
| + |
| +#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \ |
| +type fname(type1 arg1, type2 arg2) \ |
| +{ \ |
| + return K_INLINE_SYSCALL(sname, 2, arg1, arg2); \ |
| +} |
| + |
| +#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \ |
| +type fname(type1 arg1, type2 arg2, type3 arg3) \ |
| +{ \ |
| + return K_INLINE_SYSCALL(sname, 3, arg1, arg2, arg3); \ |
| +} |
| + |
| +#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ |
| +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ |
| +{ \ |
| + return K_INLINE_SYSCALL(sname, 4, arg1, arg2, arg3, arg4); \ |
| +} |
| + |
| +#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ |
| +type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ |
| +{ \ |
| + return K_INLINE_SYSCALL(sname, 5, arg1, arg2, arg3, arg4, arg5); \ |
| +} |
| + |
| diff --git a/src/syscall.h b/src/syscall.h |
| index d2a117b..8cf8470 100644 |
| --- a/src/syscall.h |
| +++ b/src/syscall.h |
| @@ -29,6 +29,12 @@ |
| #include "syscall-sparc.h" |
| #elif defined(__aarch64__) || defined(__loongarch__) || defined(__riscv) |
| #include "syscall-generic.h" |
| +#elif defined(__m68k__) |
| +#include "syscall-m68k.h" |
| +#elif defined(__hppa__) |
| +#include "syscall-parisc.h" |
| +#elif defined(__mips__) |
| +#include "syscall-mips.h" |
| #else |
| #warning "using system call numbers from sys/syscall.h" |
| #endif |