commit | 8fc3b96386c6985b5e8fc2c7109b4929e9c25409 | [log] [tgz] |
---|---|---|
author | Joel Stanley <joel@jms.id.au> | Sat Jun 16 14:09:54 2018 +0930 |
committer | Brad Bishop <bradleyb@fuzziesquirrel.com> | Wed Jun 20 02:20:33 2018 +0000 |
tree | 246cc0fe02343a6cc5acfccc582d5e5474792b8f | |
parent | a687b62fe433263d5138cb9e9a41467762e141a7 [diff] |
kernel: Move to 4.17 This brings the dev-4.13 development cycle to a close. By the end of the cycle the 4.13 tree contained 236 patches. This moves all of the 4.13 based functionality on top of a 4.17 base. We currently have 97 patches in the tree. The reduction of 139 is mostly due to code landing in Linus' tree, with a handful of fixes being merged into the base patch. The configuration is updated with newly landed drivers. In addition new upstream security features are enabled, and legacy ATAG DTB support and /dev/mem are removed. Amithash Prasad (1): ARM: dts: aspeed: Add Portwell Neptune machine Andrew Jeffery (11): ARM: dts: aspeed: witherspoon: Update max31785 node dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation pmbus (max31785): Add support for devicetree configuration pmbus (core): One-shot retries for failure to set page pmbus (core): Use driver callbacks in pmbus_get_fan_rate() pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers soc: aspeed: Miscellaneous control interfaces dts: aspeed-g5: Expose VGA scratch registers dts: aspeed-g5: Expose SuperIO scratch registers fsi: gpio: Trace busy count fsi: gpio: Remove unused 'id' variable Avi Fishman (1): ipmi: NPCM7xx KCS BMC: enable interrupt to the host Benjamin Herrenschmidt (15): gpio/aspeed: Set output latch before changing direction gpio/aspeed: Use a cache of output data registers fsi/fsi-master-gpio: Sample input data on different clock phase fsi/fsi-master-gpio: Add "no-gpio-delays" option fsi/fsi-master-gpio: Reduce turnaround clocks fsi/fsi-master-gpio: Reduce dpoll clocks fsi/fsi-master-gpio: Delay sampling of FSI data input fsi/fsi-master-gpio: Implement CRC error recovery fsi/fsi-master-gpio: More error handling cleanup fsi/sbefifo: Add driver for the SBE FIFO fsi/scom: Add mutex around FSI2PIB accesses fsi/scom: Whitespace fixes fsi/scom: Fixup endian annotations fsi/scom: Add register definitions fsi/scom: Major overhaul Brad Bishop (1): ARM: dts: witherspoon: Enable checkstop and cooling gpio keys Brian Yang (1): ARM: dts: aspeed: Add Inventec Lanyang BMC Christopher Bostic (3): ARM: dts: witherspoon: Add gpio keys for power supply presence ARM: dts: fsi: Add optional master property no-scan-on-init iio: dps310: Temperature measurement errata Cyril Bur (1): misc: Add ASPEED mbox driver Cédric Le Goater (4): mtd: spi-nor: aspeed: use command mode for reads mtd: spi-nor: aspeed: add support for SPI dual IO read mode mtd: spi-nor: aspeed: link controller with the ahb clock mtd: spi-nor: aspeed: optimize read mode Dan Carpenter (2): net/ncsi: prevent a couple array underflows serial/aspeed-vuart: fix a couple mod_timer() calls Eddie James (9): ARM: dts: aspeed: witherspoon: set alternate boot fsi: scom: Remove PIB reset during probe dt-bindings: i2c: Add FSI-attached I2C master dt binding documentation i2c: Add FSI-attached I2C master algorithm i2c: fsi: Add port structures i2c: fsi: Add abort and hardware reset procedures i2c: fsi: Add transfer implementation i2c: fsi: Add I2C master locking i2c: fsi: Add bus recovery Edward A. James (3): ARM: dts: fsi: Add I2C master and ports to FSI CFAMs drivers/fsi: Add On-Chip Controller (OCC) driver hwmon: Add On-Chip Controller (OCC) hwmon driver Haiyue Wang (1): ipmi: add an NPCM7xx KCS BMC driver Jae Hyun Yoo (1): clk: aspeed: Fix reset bits for PCI/VGA and PECI James Feist (1): ARM: dts: Add S2600WF BMC Machine Jeremy Kerr (8): serial: Introduce UPSTAT_SYNC_FIFO for synchronised FIFOs serial/8250: export serial8250_read_char serial/aspeed-vuart: Implement rx throttling serial/aspeed-vuart: Implement quick throttle mechanism fsi: gpio: Use a mutex to protect transfers fsi/gpio: Include command build in locked section fsi/gpio: Use relative-addressing commands fsi/master-gpio: Replace bit_bit lock with IRQ disable/enable Joel Stanley (22): clk: aspeed: Support second reset register clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical ARM: dts: aspeed-romulus: Enable VUART ARM: dts: aspeed-ast2500: Update flash layout ARM: dts: aspeed: Add LPC mailbox node ARM: dts: aspeed: Enable mbox ARM: dts: aspeed: Add devices under FSI CFAM ARM: dts: palmetto: Enable mbox and occ-hwmon nodes iio: Add driver for Infineon DPS310 ARM: dts: aspeed-g5: Add DAC MUX userspace control ARM: dts: aspeed-g5: Clean up sio registers ARM: dts: aspeed: Describe random number device ARM: dts: aspeed: Fix hwrng register address fsi: master-hub: Fix sparse warnings fsi: core: Fix sparse warnings drm: Add ASPEED GFX driver drm: aspeed: Debugfs interface for GFX registers ARM: dts: aspeed-g5: Add resets and clocks to GFX node ARM: dts: ast2500-evb: Enable the GFX IP ARM: dts: witherspoon: Enable the GFX IP ARM: dts: romulus: Enable the GFX IP ARM: config: aspeed: Update defconfig Lei YU (5): clk: aspeed: Add 24MHz fixed clock ARM: dts: aspeed: romulus: Add w83773g temp sensor ARM: dts: aspeed: zaius: Add pcie-e2b-present gpio key ARM: dts: aspeed: romulus: Add id-button gpio key ARM: dts: aspeed: Use 24MHz fixed clock for pwm Samuel Mendoza-Jonas (2): net/ncsi: Refactor MAC, VLAN filters net/ncsi: Avoid GFP_KERNEL in response handler Tali Perry (2): dt-binding: clk: npcm750: add binding clk: npcm7xx: add clock controller Tomer Maimon (2): dt-binding: pinctrl: document NPCM7xx pin controller DT bindings pinctrl: npcm: add NPCM7xx pin control driver Wei Yongjun (1): clk: npcm7xx: fix return value check in npcm7xx_clk_init() YueHaibing (1): net: remove unnecessary genlmsg_cancel() calls Tested: Booted Romulus, Palmetto hosts. Booted ASPEED platforms in QEMU Change-Id: Ib6f7e68267cd66e98c0ace1132fd2d664a0fc623 Signed-off-by: Joel Stanley <joel@jms.id.au>
The OpenBMC project can be described as a Linux distribution for embedded devices that have a BMC; typically, but not limited to, things like servers, top of rack switches or RAID appliances. The OpenBMC stack uses technologies such as Yocto, OpenEmbedded, systemd, and D-Bus to allow easy customization for your server platform.
sudo apt-get install -y git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat
sudo dnf install -y git patch diffstat texinfo chrpath SDL-devel bitbake sudo dnf groupinstall "C Development Tools and Libraries"
git clone git@github.com:openbmc/openbmc.git cd openbmc
Any build requires an environment variable known as TEMPLATECONF
to be set to a hardware target. OpenBMC has placed all known hardware targets in a standard directory structure meta-openbmc-machines/meta-[architecture]/meta-[company]/meta-[target]
. You can see all of the known targets with find meta-openbmc-machines -type d -name conf
. Choose the hardware target and then move to the next step. Additional examples can be found in the OpenBMC Cheatsheet
Machine | TEMPLATECONF |
---|---|
Palmetto | meta-openbmc-machines/meta-openpower/meta-ibm/meta-palmetto/conf |
Zaius | meta-openbmc-machines/meta-openpower/meta-ingrasys/meta-zaius/conf |
Witherspoon | meta-openbmc-machines/meta-openpower/meta-ibm/meta-witherspoon/conf |
As an example target Palmetto
export TEMPLATECONF=meta-openbmc-machines/meta-openpower/meta-ibm/meta-palmetto/conf
. openbmc-env bitbake obmc-phosphor-image
Additional details can be found in the docs repository.
Commits submitted by members of the OpenBMC GitHub community are compiled and tested via our Jenkins server. Commits are run through two levels of testing. At the repository level the makefile make check
directive is run. At the system level, the commit is built into a firmware image and run with an arm-softmmu QEMU model against a barrage of CI tests.
Commits submitted by non-members do not automatically proceed through CI testing. After visual inspection of the commit, a CI run can be manually performed by the reviewer.
Automated testing against the QEMU model along with supported systems are performed. The OpenBMC project uses the Robot Framework for all automation. Our complete test repository can be found here.
Support of additional hardware and software packages is always welcome. Please follow the contributing guidelines when making a submission. It is expected that contributions contain test cases.
Issues are managed on GitHub. It is recommended you search through the issues before opening a new one.
Feature List
Features In Progress
Features Requested but need help
Dive deeper in to OpenBMC by opening the docs repository.