pdbg: Bump to latest version
Alistair Popple (4):
Revert incorrect version of "libpdbg/p8chip.c: release special wakeups for P8"
Revert incorrect version of "libpdbg: use MTMSRD opcode rather than MTMSR"
Revert incorrect version of "libpdbg/p8chip.c: ram state setup sequence ..."
Revert incorrect version of "libpdbg/p8chip.c: Emulate sreset using ramming..."
Amitay Isaacs (9):
adu: Convert __adu_{get, put}mem_blocksize to adu functions
adu: Add read/write methods for adu target
adu: Set default blocksize for adu
adu: Add new api for memory read/write
main: Use new api to read/write memory
path: Match targets with dn name correctly
tests: Add a test for dn name match
path: Avoid a match for nested nodes of the same class
tests: Fix the core address calculation
Artem Senichev (1):
api: Fix API interface for external usage
Nicholas Piggin (11):
libpdbg: Fix CHECK_ERR macro to evaluate once in error case
libpdbg/p8chip.c: read status from correct target
libpdbg/p8chip.c: Only write the SP_STOP bit once
libpdbg/p8chip.c: release special wakeups for P8
libpdbg: use MTMSRD opcode rather than MTMSR
libpdbg/p8chip.c: ram state setup sequence match workbook
libpdbg/p8chip.c: Emulate sreset using ramming for active threads
libpdbg/p8chip.c: release special wakeups for P8
libpdbg: use MTMSRD opcode rather than MTMSR
libpdbg/p8chip.c: ram state setup sequence match workbook
libpdbg/p8chip.c: Emulate sreset using ramming for active threads
(From meta-openpower rev: 35f5adc0a390d2d398cdcb949b613eeb3d0d25d9)
Change-Id: Ia36ba13d8ccf75994f844223bc65d7d8e5798b93
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
diff --git a/meta-openpower/recipes-bsp/pdbg/pdbg_2.0.bb b/meta-openpower/recipes-bsp/pdbg/pdbg_2.0.bb
index 8995da7..8c1232c 100644
--- a/meta-openpower/recipes-bsp/pdbg/pdbg_2.0.bb
+++ b/meta-openpower/recipes-bsp/pdbg/pdbg_2.0.bb
@@ -6,7 +6,7 @@
PV = "2.0+git${SRCPV}"
SRC_URI += "git://github.com/open-power/pdbg.git"
-SRCREV = "deb577949a3505064f471e7b7c692e37c38ec8a4"
+SRCREV = "854c4c5facff43af9e0fe5d7062b58f631987b0b"
DEPENDS += "dtc-native"