| From b672bcaf5522294a4d8de3e88e0932d55585ee3b Mon Sep 17 00:00:00 2001 |
| From: Bin Meng <bmeng.cn@gmail.com> |
| Date: Wed, 3 Mar 2021 20:26:37 +0800 |
| Subject: [PATCH 4/6] hw/sd: sdhci: Correctly set the controller status for |
| ADMA |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| When an ADMA transfer is started, the codes forget to set the |
| controller status to indicate a transfer is in progress. |
| |
| With this fix, the following 2 reproducers: |
| |
| https://paste.debian.net/plain/1185136 |
| https://paste.debian.net/plain/1185141 |
| |
| cannot be reproduced with the following QEMU command line: |
| |
| $ qemu-system-x86_64 -nographic -machine accel=qtest -m 512M \ |
| -nodefaults -device sdhci-pci,sd-spec-version=3 \ |
| -drive if=sd,index=0,file=null-co://,format=raw,id=mydrive \ |
| -device sd-card,drive=mydrive -qtest stdio |
| |
| Cc: qemu-stable@nongnu.org |
| Fixes: CVE-2020-17380 |
| Fixes: CVE-2020-25085 |
| Fixes: CVE-2021-3409 |
| Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller") |
| Reported-by: Alexander Bulekov <alxndr@bu.edu> |
| Reported-by: Cornelius Aschermann (Ruhr-Universität Bochum) |
| Reported-by: Sergej Schumilo (Ruhr-Universität Bochum) |
| Reported-by: Simon Wörner (Ruhr-Universität Bochum) |
| Buglink: https://bugs.launchpad.net/qemu/+bug/1892960 |
| Buglink: https://bugs.launchpad.net/qemu/+bug/1909418 |
| Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1928146 |
| Tested-by: Alexander Bulekov <alxndr@bu.edu> |
| Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
| Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
| Message-Id: <20210303122639.20004-4-bmeng.cn@gmail.com> |
| Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
| |
| Upstream-Status: Backport [bc6f28995ff88f5d82c38afcfd65406f0ae375aa] |
| CVE: CVE-2021-3409 |
| |
| Signed-off-by: Sakib Sajal <sakib.sajal@windriver.com> |
| --- |
| hw/sd/sdhci.c | 3 +++ |
| 1 file changed, 3 insertions(+) |
| |
| diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c |
| index d8a46f307..7de03c6dd 100644 |
| --- a/hw/sd/sdhci.c |
| +++ b/hw/sd/sdhci.c |
| @@ -768,7 +768,9 @@ static void sdhci_do_adma(SDHCIState *s) |
| |
| switch (dscr.attr & SDHC_ADMA_ATTR_ACT_MASK) { |
| case SDHC_ADMA_ATTR_ACT_TRAN: /* data transfer */ |
| + s->prnsts |= SDHC_DATA_INHIBIT | SDHC_DAT_LINE_ACTIVE; |
| if (s->trnmod & SDHC_TRNS_READ) { |
| + s->prnsts |= SDHC_DOING_READ; |
| while (length) { |
| if (s->data_count == 0) { |
| sdbus_read_data(&s->sdbus, s->fifo_buffer, block_size); |
| @@ -796,6 +798,7 @@ static void sdhci_do_adma(SDHCIState *s) |
| } |
| } |
| } else { |
| + s->prnsts |= SDHC_DOING_WRITE; |
| while (length) { |
| begin = s->data_count; |
| if ((length + begin) < block_size) { |
| -- |
| 2.29.2 |
| |