Andrew Geissler | 0903674 | 2021-06-25 14:25:14 -0500 | [diff] [blame^] | 1 | From 5a9b6a004f89fdd95b0470e1324dc4dee8c41d24 Mon Sep 17 00:00:00 2001 |
| 2 | From: Claudiu Zissulescu <claziss@synopsys.com> |
| 3 | Date: Wed, 9 Jun 2021 12:12:57 +0300 |
| 4 | Subject: [PATCH] arc: Update doloop_end patterns |
| 5 | |
| 6 | ARC processor can use LP instruction to implement zero overlay loops. |
| 7 | The current inplementation doesn't handle the unlikely situation when |
| 8 | the loop iterator is located in memory. Refurbish the loop_end insn |
| 9 | pattern into a define_insn_and_split pattern. |
| 10 | |
| 11 | gcc/ |
| 12 | 2021-07-09 Claudiu Zissulescu <claziss@synopsys.com> |
| 13 | |
| 14 | * config/arc/arc.md (loop_end): Change it to |
| 15 | define_insn_and_split. |
| 16 | |
| 17 | Upstream-Status: Backport [https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=5a9b6a004f89fdd95b0470e1324dc4dee8c41d24] |
| 18 | |
| 19 | Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com> |
| 20 | (cherry picked from commit 174e75a210753b68de0f2c398a13ace0f512e35b) |
| 21 | Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> |
| 22 | --- |
| 23 | gcc/config/arc/arc.md | 46 ++++++++++++++++++++-------------------------- |
| 24 | 1 file changed, 20 insertions(+), 26 deletions(-) |
| 25 | |
| 26 | diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md |
| 27 | index 2a7e087ff72..d704044c13f 100644 |
| 28 | --- a/gcc/config/arc/arc.md |
| 29 | +++ b/gcc/config/arc/arc.md |
| 30 | @@ -4986,7 +4986,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" |
| 31 | (define_expand "doloop_end" |
| 32 | [(parallel [(set (pc) |
| 33 | (if_then_else |
| 34 | - (ne (match_operand 0 "" "") |
| 35 | + (ne (match_operand 0 "nonimmediate_operand") |
| 36 | (const_int 1)) |
| 37 | (label_ref (match_operand 1 "" "")) |
| 38 | (pc))) |
| 39 | @@ -5012,44 +5012,38 @@ core_3, archs4x, archs4xd, archs4xd_slow" |
| 40 | |
| 41 | ;; if by any chance the lp_count is not used, then use an 'r' |
| 42 | ;; register, instead of going to memory. |
| 43 | -(define_insn "loop_end" |
| 44 | - [(set (pc) |
| 45 | - (if_then_else (ne (match_operand:SI 2 "nonimmediate_operand" "0,m") |
| 46 | - (const_int 1)) |
| 47 | - (label_ref (match_operand 1 "" "")) |
| 48 | - (pc))) |
| 49 | - (set (match_operand:SI 0 "nonimmediate_operand" "=r,m") |
| 50 | - (plus (match_dup 2) (const_int -1))) |
| 51 | - (unspec [(const_int 0)] UNSPEC_ARC_LP) |
| 52 | - (clobber (match_scratch:SI 3 "=X,&r"))] |
| 53 | - "" |
| 54 | - "; ZOL_END, begins @%l1" |
| 55 | - [(set_attr "length" "0") |
| 56 | - (set_attr "predicable" "no") |
| 57 | - (set_attr "type" "loop_end")]) |
| 58 | - |
| 59 | ;; split pattern for the very slim chance when the loop register is |
| 60 | ;; memory. |
| 61 | -(define_split |
| 62 | +(define_insn_and_split "loop_end" |
| 63 | [(set (pc) |
| 64 | - (if_then_else (ne (match_operand:SI 0 "memory_operand") |
| 65 | + (if_then_else (ne (match_operand:SI 0 "nonimmediate_operand" "+r,!m") |
| 66 | (const_int 1)) |
| 67 | - (label_ref (match_operand 1 "")) |
| 68 | + (label_ref (match_operand 1 "" "")) |
| 69 | (pc))) |
| 70 | (set (match_dup 0) (plus (match_dup 0) (const_int -1))) |
| 71 | (unspec [(const_int 0)] UNSPEC_ARC_LP) |
| 72 | - (clobber (match_scratch:SI 2))] |
| 73 | - "memory_operand (operands[0], SImode)" |
| 74 | + (clobber (match_scratch:SI 2 "=X,&r"))] |
| 75 | + "" |
| 76 | + "@ |
| 77 | + ; ZOL_END, begins @%l1 |
| 78 | + #" |
| 79 | + "reload_completed && memory_operand (operands[0], Pmode)" |
| 80 | [(set (match_dup 2) (match_dup 0)) |
| 81 | - (set (match_dup 2) (plus:SI (match_dup 2) (const_int -1))) |
| 82 | + (parallel |
| 83 | + [(set (reg:CC_ZN CC_REG) |
| 84 | + (compare:CC_ZN (plus:SI (match_dup 2) (const_int -1)) |
| 85 | + (const_int 0))) |
| 86 | + (set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))]) |
| 87 | (set (match_dup 0) (match_dup 2)) |
| 88 | - (set (reg:CC CC_REG) (compare:CC (match_dup 2) (const_int 0))) |
| 89 | (set (pc) |
| 90 | - (if_then_else (ne (reg:CC CC_REG) |
| 91 | + (if_then_else (ne (reg:CC_ZN CC_REG) |
| 92 | (const_int 0)) |
| 93 | (label_ref (match_dup 1)) |
| 94 | (pc)))] |
| 95 | - "") |
| 96 | + "" |
| 97 | + [(set_attr "length" "0,24") |
| 98 | + (set_attr "predicable" "no") |
| 99 | + (set_attr "type" "loop_end")]) |
| 100 | |
| 101 | (define_insn "loop_fail" |
| 102 | [(set (reg:SI LP_COUNT) |
| 103 | -- |
| 104 | 2.16.2 |
| 105 | |