Andrew Geissler | 0903674 | 2021-06-25 14:25:14 -0500 | [diff] [blame^] | 1 | From 16ddc17b4f403a38701e0108b02aff967900cc66 Mon Sep 17 00:00:00 2001 |
| 2 | From: Anton Kolesov <Anton.Kolesov@synopsys.com> |
| 3 | Date: Thu, 22 Dec 2016 21:52:16 +0300 |
| 4 | Subject: [PATCH 2/4] arc: Add support for signal frames for Linux targets |
| 5 | |
| 6 | Implement functions needed to unwind signal frames on ARC Linux targets. |
| 7 | |
| 8 | gdb/ChangeLog |
| 9 | |
| 10 | * arc-linux-tdep.c (arc_linux_sc_reg_offsets): New static variable. |
| 11 | (arc_linux_is_sigtramp): New function. |
| 12 | (arc_linux_sigcontext_addr): Likewise. |
| 13 | (arc_linux_init_osabi): Use them. |
| 14 | |
| 15 | Upstream-Status: Backport [https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=d4af727286e3a9f177ba11677fbd3a012d36558a] |
| 16 | |
| 17 | Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com> |
| 18 | Signed-off-by: Shahab Vahedi <shahab@synopsys.com> |
| 19 | Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> |
| 20 | --- |
| 21 | gdb/arc-linux-tdep.c | 181 +++++++++++++++++++++++++++++++++++++++++++++++++++ |
| 22 | 1 file changed, 181 insertions(+) |
| 23 | |
| 24 | diff --git a/gdb/arc-linux-tdep.c b/gdb/arc-linux-tdep.c |
| 25 | index a7bace12623..17bb3e7b276 100644 |
| 26 | --- a/gdb/arc-linux-tdep.c |
| 27 | +++ b/gdb/arc-linux-tdep.c |
| 28 | @@ -33,6 +33,60 @@ |
| 29 | |
| 30 | #define REGOFF(offset) (offset * ARC_REGISTER_SIZE) |
| 31 | |
| 32 | +/* arc_linux_sc_reg_offsets[i] is the offset of register i in the `struct |
| 33 | + sigcontext'. Array index is an internal GDB register number, as defined in |
| 34 | + arc-tdep.h:arc_regnum. |
| 35 | + |
| 36 | + From <include/uapi/asm/sigcontext.h> and <include/uapi/asm/ptrace.h>. |
| 37 | + |
| 38 | + The layout of this struct is tightly bound to "arc_regnum" enum |
| 39 | + in arc-tdep.h. Any change of order in there, must be reflected |
| 40 | + here as well. */ |
| 41 | +static const int arc_linux_sc_reg_offsets[] = { |
| 42 | + /* R0 - R12. */ |
| 43 | + REGOFF (22), REGOFF (21), REGOFF (20), REGOFF (19), |
| 44 | + REGOFF (18), REGOFF (17), REGOFF (16), REGOFF (15), |
| 45 | + REGOFF (14), REGOFF (13), REGOFF (12), REGOFF (11), |
| 46 | + REGOFF (10), |
| 47 | + |
| 48 | + /* R13 - R25. */ |
| 49 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 50 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 51 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 52 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 53 | + ARC_OFFSET_NO_REGISTER, |
| 54 | + |
| 55 | + REGOFF (9), /* R26 (GP) */ |
| 56 | + REGOFF (8), /* FP */ |
| 57 | + REGOFF (23), /* SP */ |
| 58 | + ARC_OFFSET_NO_REGISTER, /* ILINK */ |
| 59 | + ARC_OFFSET_NO_REGISTER, /* R30 */ |
| 60 | + REGOFF (7), /* BLINK */ |
| 61 | + |
| 62 | + /* R32 - R59. */ |
| 63 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 64 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 65 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 66 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 67 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 68 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 69 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 70 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 71 | + ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, ARC_OFFSET_NO_REGISTER, |
| 72 | + ARC_OFFSET_NO_REGISTER, |
| 73 | + |
| 74 | + REGOFF (4), /* LP_COUNT */ |
| 75 | + ARC_OFFSET_NO_REGISTER, /* RESERVED */ |
| 76 | + ARC_OFFSET_NO_REGISTER, /* LIMM */ |
| 77 | + ARC_OFFSET_NO_REGISTER, /* PCL */ |
| 78 | + |
| 79 | + REGOFF (6), /* PC */ |
| 80 | + REGOFF (5), /* STATUS32 */ |
| 81 | + REGOFF (2), /* LP_START */ |
| 82 | + REGOFF (3), /* LP_END */ |
| 83 | + REGOFF (1), /* BTA */ |
| 84 | +}; |
| 85 | + |
| 86 | /* arc_linux_core_reg_offsets[i] is the offset in the .reg section of GDB |
| 87 | regnum i. Array index is an internal GDB register number, as defined in |
| 88 | arc-tdep.h:arc_regnum. |
| 89 | @@ -87,6 +141,127 @@ static const int arc_linux_core_reg_offsets[] = { |
| 90 | REGOFF (6) /* ERET */ |
| 91 | }; |
| 92 | |
| 93 | +/* Is THIS_FRAME a sigtramp function - the function that returns from |
| 94 | + signal handler into normal execution flow? This is the case if the PC is |
| 95 | + either at the start of, or in the middle of the two instructions: |
| 96 | + |
| 97 | + mov r8, __NR_rt_sigreturn ; __NR_rt_sigreturn == 139 |
| 98 | + trap_s 0 ; `swi' for ARC700 |
| 99 | + |
| 100 | + On ARC uClibc Linux this function is called __default_rt_sa_restorer. |
| 101 | + |
| 102 | + Returns TRUE if this is a sigtramp frame. */ |
| 103 | + |
| 104 | +static bool |
| 105 | +arc_linux_is_sigtramp (struct frame_info *this_frame) |
| 106 | +{ |
| 107 | + struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 108 | + CORE_ADDR pc = get_frame_pc (this_frame); |
| 109 | + |
| 110 | + if (arc_debug) |
| 111 | + { |
| 112 | + debug_printf ("arc-linux: arc_linux_is_sigtramp, pc=%s\n", |
| 113 | + paddress(gdbarch, pc)); |
| 114 | + } |
| 115 | + |
| 116 | + static const gdb_byte insns_be_hs[] = { |
| 117 | + 0x20, 0x8a, 0x12, 0xc2, /* mov r8,nr_rt_sigreturn */ |
| 118 | + 0x78, 0x1e /* trap_s 0 */ |
| 119 | + }; |
| 120 | + static const gdb_byte insns_be_700[] = { |
| 121 | + 0x20, 0x8a, 0x12, 0xc2, /* mov r8,nr_rt_sigreturn */ |
| 122 | + 0x22, 0x6f, 0x00, 0x3f /* swi */ |
| 123 | + }; |
| 124 | + |
| 125 | + gdb_byte arc_sigtramp_insns[sizeof (insns_be_700)]; |
| 126 | + size_t insns_sz; |
| 127 | + if (arc_mach_is_arcv2 (gdbarch)) |
| 128 | + { |
| 129 | + insns_sz = sizeof (insns_be_hs); |
| 130 | + memcpy (arc_sigtramp_insns, insns_be_hs, insns_sz); |
| 131 | + } |
| 132 | + else |
| 133 | + { |
| 134 | + insns_sz = sizeof (insns_be_700); |
| 135 | + memcpy (arc_sigtramp_insns, insns_be_700, insns_sz); |
| 136 | + } |
| 137 | + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) |
| 138 | + { |
| 139 | + /* On little endian targets, ARC code section is in what is called |
| 140 | + "middle endian", where half-words are in the big-endian order, |
| 141 | + only bytes inside the halfwords are in the little endian order. |
| 142 | + As a result it is very easy to convert big endian instruction to |
| 143 | + little endian, since it is needed to swap bytes in the halfwords, |
| 144 | + so there is no need to have information on whether that is a |
| 145 | + 4-byte instruction or 2-byte. */ |
| 146 | + gdb_assert ((insns_sz % 2) == 0); |
| 147 | + for (int i = 0; i < insns_sz; i += 2) |
| 148 | + std::swap (arc_sigtramp_insns[i], arc_sigtramp_insns[i+1]); |
| 149 | + } |
| 150 | + |
| 151 | + gdb_byte buf[insns_sz]; |
| 152 | + |
| 153 | + /* Read the memory at the PC. Since we are stopped, any breakpoint must |
| 154 | + have been removed. */ |
| 155 | + if (!safe_frame_unwind_memory (this_frame, pc, buf, insns_sz)) |
| 156 | + { |
| 157 | + /* Failed to unwind frame. */ |
| 158 | + return FALSE; |
| 159 | + } |
| 160 | + |
| 161 | + /* Is that code the sigtramp instruction sequence? */ |
| 162 | + if (memcmp (buf, arc_sigtramp_insns, insns_sz) == 0) |
| 163 | + return TRUE; |
| 164 | + |
| 165 | + /* No - look one instruction earlier in the code... */ |
| 166 | + if (!safe_frame_unwind_memory (this_frame, pc - 4, buf, insns_sz)) |
| 167 | + { |
| 168 | + /* Failed to unwind frame. */ |
| 169 | + return FALSE; |
| 170 | + } |
| 171 | + |
| 172 | + return (memcmp (buf, arc_sigtramp_insns, insns_sz) == 0); |
| 173 | +} |
| 174 | + |
| 175 | +/* Get sigcontext structure of sigtramp frame - it contains saved |
| 176 | + registers of interrupted frame. |
| 177 | + |
| 178 | + Stack pointer points to the rt_sigframe structure, and sigcontext can |
| 179 | + be found as in: |
| 180 | + |
| 181 | + struct rt_sigframe { |
| 182 | + struct siginfo info; |
| 183 | + struct ucontext uc; |
| 184 | + ... |
| 185 | + }; |
| 186 | + |
| 187 | + struct ucontext { |
| 188 | + unsigned long uc_flags; |
| 189 | + struct ucontext *uc_link; |
| 190 | + stack_t uc_stack; |
| 191 | + struct sigcontext uc_mcontext; |
| 192 | + sigset_t uc_sigmask; |
| 193 | + }; |
| 194 | + |
| 195 | + sizeof (struct siginfo) == 0x80 |
| 196 | + offsetof (struct ucontext, uc_mcontext) == 0x14 |
| 197 | + |
| 198 | + GDB cannot include linux headers and use offsetof () because those are |
| 199 | + target headers and GDB might be built for a different run host. There |
| 200 | + doesn't seem to be an established mechanism to figure out those offsets |
| 201 | + via gdbserver, so the only way is to hardcode values in the GDB, |
| 202 | + meaning that GDB will be broken if values will change. That seems to |
| 203 | + be a very unlikely scenario and other arches (aarch64, alpha, amd64, |
| 204 | + etc) in GDB hardcode values. */ |
| 205 | + |
| 206 | +static CORE_ADDR |
| 207 | +arc_linux_sigcontext_addr (struct frame_info *this_frame) |
| 208 | +{ |
| 209 | + const int ucontext_offset = 0x80; |
| 210 | + const int sigcontext_offset = 0x14; |
| 211 | + return get_frame_sp (this_frame) + ucontext_offset + sigcontext_offset; |
| 212 | +} |
| 213 | + |
| 214 | /* Implement the "cannot_fetch_register" gdbarch method. */ |
| 215 | |
| 216 | static int |
| 217 | @@ -504,6 +679,12 @@ arc_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch) |
| 218 | if (arc_debug) |
| 219 | debug_printf ("arc-linux: GNU/Linux OS/ABI initialization.\n"); |
| 220 | |
| 221 | + /* Fill in target-dependent info in ARC-private structure. */ |
| 222 | + tdep->is_sigtramp = arc_linux_is_sigtramp; |
| 223 | + tdep->sigcontext_addr = arc_linux_sigcontext_addr; |
| 224 | + tdep->sc_reg_offset = arc_linux_sc_reg_offsets; |
| 225 | + tdep->sc_num_regs = ARRAY_SIZE (arc_linux_sc_reg_offsets); |
| 226 | + |
| 227 | /* If we are using Linux, we have in uClibc |
| 228 | (libc/sysdeps/linux/arc/bits/setjmp.h): |
| 229 | |
| 230 | -- |
| 231 | 2.16.2 |
| 232 | |