| Chanh Nguyen | d86e51f | 2021-03-10 10:18:49 +0700 | [diff] [blame] | 1 | From 0bf84de2a9db749bd61064cd47b96ef457725f54 Mon Sep 17 00:00:00 2001 |
| 2 | From: Chanh Nguyen <chanh@os.amperecomputing.com> |
| 3 | Date: Wed, 10 Mar 2021 00:02:17 +0700 |
| 4 | Subject: [PATCH] aspeed: Enable SPI master mode |
| 5 | |
| 6 | Currently, some systems design the strap pin, |
| 7 | which was shared pin with another function. |
| 8 | That makes the board strapping does not reflect the intended use of the system. |
| 9 | |
| 10 | This patch will enable SPI master mode by default. |
| 11 | |
| 12 | Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> |
| 13 | --- |
| 14 | board/aspeed/ast-g5/ast-g5.c | 3 +++ |
| 15 | 1 file changed, 3 insertions(+) |
| 16 | |
| 17 | diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c |
| 18 | index 9e27bce0f5..ed83d65136 100644 |
| 19 | --- a/board/aspeed/ast-g5/ast-g5.c |
| 20 | +++ b/board/aspeed/ast-g5/ast-g5.c |
| 21 | @@ -125,6 +125,9 @@ int board_late_init(void) |
| 22 | update_bootargs_cmd("resetreason", value); |
| 23 | } |
| 24 | |
| 25 | + /* enable SPI master */ |
| 26 | + ast_scu_spi_master(1); |
| 27 | + |
| 28 | return 0; |
| 29 | } |
| 30 | #endif |
| 31 | -- |
| 32 | 2.17.1 |
| 33 | |