Patrick Williams | 2390b1b | 2022-11-03 13:47:49 -0500 | [diff] [blame^] | 1 | From 6fd49ab55c3419429e437845864c5bb2d731da29 Mon Sep 17 00:00:00 2001 |
| 2 | From: Satish Kumar <satish.kumar01@arm.com> |
| 3 | Date: Mon, 25 Apr 2022 05:26:38 +0100 |
| 4 | Subject: [PATCH 2/6] corstone1000: make external system support optional |
| 5 | |
| 6 | The commits introduce build time variables to make |
| 7 | external system support in the platform optional. |
| 8 | |
| 9 | Change-Id: I593014e0da4ac553c105c66ae55f6fd83ffe427e |
| 10 | Signed-off-by: Satish Kumar <satish.kumar01@arm.com> |
| 11 | Upstream-Status: Accepted [TF-Mv1.7.0] |
| 12 | --- |
| 13 | .../ext/target/arm/corstone1000/CMakeLists.txt | 1 + |
| 14 | platform/ext/target/arm/corstone1000/config.cmake | 1 + |
| 15 | .../target/arm/corstone1000/tfm_hal_multi_core.c | 15 +++++++++++++++ |
| 16 | 3 files changed, 17 insertions(+) |
| 17 | |
| 18 | diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 19 | index 16bc708964..39d7b03455 100644 |
| 20 | --- a/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 21 | +++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt |
| 22 | @@ -97,6 +97,7 @@ target_compile_definitions(platform_s |
| 23 | PRIVATE |
| 24 | $<$<BOOL:${PLATFORM_IS_FVP}>:PLATFORM_IS_FVP> |
| 25 | $<$<BOOL:${TEST_S}>:TEST_S> |
| 26 | + $<$<BOOL:${EXTERNAL_SYSTEM_SUPPORT}>:EXTERNAL_SYSTEM_SUPPORT> |
| 27 | ) |
| 28 | |
| 29 | #========================= Platform BL2 =======================================# |
| 30 | diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake |
| 31 | index e5f91108ee..a3399db318 100644 |
| 32 | --- a/platform/ext/target/arm/corstone1000/config.cmake |
| 33 | +++ b/platform/ext/target/arm/corstone1000/config.cmake |
| 34 | @@ -21,6 +21,7 @@ set(CRYPTO_HW_ACCELERATOR ON CACHE BOOL "Whether to en |
| 35 | set(CRYPTO_NV_SEED OFF CACHE BOOL "Use stored NV seed to provide entropy") |
| 36 | set(TFM_CRYPTO_TEST_ALG_CFB OFF CACHE BOOL "Test CFB cryptography mode") |
| 37 | set(NS FALSE CACHE BOOL "Whether to build NS app") |
| 38 | +set(EXTERNAL_SYSTEM_SUPPORT OFF CACHE BOOL "Whether to include external system support.") |
| 39 | |
| 40 | # FVP is not integrated/tested with CC312. |
| 41 | if (${PLATFORM_IS_FVP}) |
| 42 | diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c |
| 43 | index 8e1b455086..8622844d91 100644 |
| 44 | --- a/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c |
| 45 | +++ b/platform/ext/target/arm/corstone1000/tfm_hal_multi_core.c |
| 46 | @@ -16,6 +16,16 @@ |
| 47 | #define HOST_CPU_PE0_CONFIG_OFFSET 0x010 |
| 48 | #define AA64nAA32_MASK (1 << 3) |
| 49 | |
| 50 | +#ifdef EXTERNAL_SYSTEM_SUPPORT |
| 51 | +void tfm_external_system_boot() |
| 52 | +{ |
| 53 | + volatile uint32_t *ext_sys_reset_ctl_reg = (uint32_t *)(CORSTONE1000_EXT_SYS_RESET_REG); |
| 54 | + |
| 55 | + /* de-assert CPU_WAIT signal*/ |
| 56 | + *ext_sys_reset_ctl_reg = 0x0; |
| 57 | +} |
| 58 | +#endif |
| 59 | + |
| 60 | void tfm_hal_boot_ns_cpu(uintptr_t start_addr) |
| 61 | { |
| 62 | /* Switch the shared flash to XiP mode for the host */ |
| 63 | @@ -53,6 +63,11 @@ void tfm_hal_boot_ns_cpu(uintptr_t start_addr) |
| 64 | *reset_ctl_reg = 0; |
| 65 | |
| 66 | (void) start_addr; |
| 67 | + |
| 68 | +#ifdef EXTERNAL_SYSTEM_SUPPORT |
| 69 | + /*release EXT SYS out of reset*/ |
| 70 | + tfm_external_system_boot(); |
| 71 | +#endif |
| 72 | } |
| 73 | |
| 74 | void tfm_hal_wait_for_ns_cpu_ready(void) |
| 75 | -- |
| 76 | 2.25.1 |
| 77 | |