blob: 4233799501895c8c72271c629927745feb5989cc [file] [log] [blame]
Andrew Geissler09209ee2020-12-13 08:44:15 -06001From 501a6b55853af549fae72723e74271f2a4ec7cf6 Mon Sep 17 00:00:00 2001
2From: Brett Warren <brett.warren@arm.com>
3Date: Fri, 27 Nov 2020 15:28:42 +0000
4Subject: [PATCH] arm/sysv: reverted clang VFP mitigation
5
6Since commit e3d2812ce43940aacae5bab2d0e965278cb1e7ea,
Andrew Geissler5f350902021-07-23 13:09:54 -04007seperate instructions were used when compiling under clang,
Andrew Geissler09209ee2020-12-13 08:44:15 -06008as clang didn't allow the directives at the time. This mitigation
Andrew Geissler5f350902021-07-23 13:09:54 -04009now causes compilation to fail under clang 10, as described by
Andrew Geissler09209ee2020-12-13 08:44:15 -060010https://github.com/libffi/libffi/issues/607. Now that
11clang supports the LDC and SDC instructions, this mitigation
12has been reverted.
13
Patrick Williams2390b1b2022-11-03 13:47:49 -050014Upstream-Status: Submitted [https://github.com/libffi/libffi/pull/747]
Andrew Geissler09209ee2020-12-13 08:44:15 -060015Signed-off-by: Brett Warren <brett.warren@arm.com>
16---
17 src/arm/sysv.S | 33 ---------------------------------
18 1 file changed, 33 deletions(-)
19
20diff --git a/src/arm/sysv.S b/src/arm/sysv.S
Andrew Geissler5f350902021-07-23 13:09:54 -040021index fb36213..e4272a1 100644
Andrew Geissler09209ee2020-12-13 08:44:15 -060022--- a/src/arm/sysv.S
23+++ b/src/arm/sysv.S
Andrew Geissler5f350902021-07-23 13:09:54 -040024@@ -142,13 +142,8 @@ ARM_FUNC_START(ffi_call_VFP)
Andrew Geissler09209ee2020-12-13 08:44:15 -060025
26 cmp r3, #3 @ load only d0 if possible
Andrew Geissler5f350902021-07-23 13:09:54 -040027 ite le
Andrew Geissler09209ee2020-12-13 08:44:15 -060028-#ifdef __clang__
Andrew Geissler5f350902021-07-23 13:09:54 -040029- vldrle d0, [r0]
30- vldmgt r0, {d0-d7}
Andrew Geissler09209ee2020-12-13 08:44:15 -060031-#else
Andrew Geissler5f350902021-07-23 13:09:54 -040032 ldcle p11, cr0, [r0] @ vldrle d0, [r0]
33 ldcgt p11, cr0, [r0], {16} @ vldmgt r0, {d0-d7}
Andrew Geissler09209ee2020-12-13 08:44:15 -060034-#endif
35 add r0, r0, #64 @ discard the vfp register args
36 /* FALLTHRU */
37 ARM_FUNC_END(ffi_call_VFP)
Andrew Geissler5f350902021-07-23 13:09:54 -040038@@ -193,25 +188,13 @@ ARM_FUNC_START(ffi_call_SYSV)
39 #endif
Andrew Geissler09209ee2020-12-13 08:44:15 -060040 0:
41 E(ARM_TYPE_VFP_S)
42-#ifdef __clang__
43- vstr s0, [r2]
44-#else
45 stc p10, cr0, [r2] @ vstr s0, [r2]
46-#endif
47 pop {fp,pc}
48 E(ARM_TYPE_VFP_D)
49-#ifdef __clang__
50- vstr d0, [r2]
51-#else
52 stc p11, cr0, [r2] @ vstr d0, [r2]
53-#endif
54 pop {fp,pc}
55 E(ARM_TYPE_VFP_N)
56-#ifdef __clang__
57- vstm r2, {d0-d3}
58-#else
59 stc p11, cr0, [r2], {8} @ vstm r2, {d0-d3}
60-#endif
61 pop {fp,pc}
62 E(ARM_TYPE_INT64)
63 str r1, [r2, #4]
Andrew Geissler5f350902021-07-23 13:09:54 -040064@@ -320,11 +303,7 @@ ARM_FUNC_START(ffi_closure_VFP)
Andrew Geissler09209ee2020-12-13 08:44:15 -060065 add ip, sp, #16
66 sub sp, sp, #64+32 @ allocate frame
67 cfi_adjust_cfa_offset(64+32)
68-#ifdef __clang__
69- vstm sp, {d0-d7}
70-#else
71 stc p11, cr0, [sp], {16} @ vstm sp, {d0-d7}
72-#endif
73 stmdb sp!, {ip,lr}
74
75 /* See above. */
Andrew Geissler5f350902021-07-23 13:09:54 -040076@@ -358,25 +337,13 @@ ARM_FUNC_START_LOCAL(ffi_closure_ret)
Andrew Geissler09209ee2020-12-13 08:44:15 -060077 cfi_rel_offset(lr, 4)
78 0:
79 E(ARM_TYPE_VFP_S)
80-#ifdef __clang__
81- vldr s0, [r2]
82-#else
83 ldc p10, cr0, [r2] @ vldr s0, [r2]
84-#endif
Andrew Geissler5f350902021-07-23 13:09:54 -040085 b call_epilogue
Andrew Geissler09209ee2020-12-13 08:44:15 -060086 E(ARM_TYPE_VFP_D)
87-#ifdef __clang__
88- vldr d0, [r2]
89-#else
90 ldc p11, cr0, [r2] @ vldr d0, [r2]
91-#endif
Andrew Geissler5f350902021-07-23 13:09:54 -040092 b call_epilogue
Andrew Geissler09209ee2020-12-13 08:44:15 -060093 E(ARM_TYPE_VFP_N)
94-#ifdef __clang__
95- vldm r2, {d0-d3}
96-#else
97 ldc p11, cr0, [r2], {8} @ vldm r2, {d0-d3}
98-#endif
Andrew Geissler5f350902021-07-23 13:09:54 -040099 b call_epilogue
Andrew Geissler09209ee2020-12-13 08:44:15 -0600100 E(ARM_TYPE_INT64)
101 ldr r1, [r2, #4]
102--
Andrew Geissler5f350902021-07-23 13:09:54 -04001032.25.1
Andrew Geissler09209ee2020-12-13 08:44:15 -0600104