blob: 26b685a5807ca565d67150d3d655aca77d3bc981 [file] [log] [blame]
Brad Bishop26bdd442019-08-16 17:08:17 -04001From 149cf4619622d27641a2886cd8bf38a49ad88f87 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Mon, 19 Feb 2018 18:06:16 +0530
4Subject: [PATCH 37/54] [Patch,Microblaze]: update in constraints for bitfield
5 insert and extract instructions.
6
7---
8 gcc/config/microblaze/microblaze.md | 43 ++++++-------------------------------
9 1 file changed, 7 insertions(+), 36 deletions(-)
10
11diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
12index 8072ffc..9bb87ec 100644
13--- a/gcc/config/microblaze/microblaze.md
14+++ b/gcc/config/microblaze/microblaze.md
15@@ -2476,33 +2476,17 @@
16 DONE;
17 }")
18
19-(define_expand "extvsi"
20+(define_expand "extzvsi"
21 [(set (match_operand:SI 0 "register_operand" "r")
22 (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
23 (match_operand:SI 2 "immediate_operand" "I")
24 (match_operand:SI 3 "immediate_operand" "I")))]
25 "TARGET_HAS_BITFIELD"
26-"
27-{
28- unsigned HOST_WIDE_INT len = UINTVAL (operands[2]);
29- unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]);
30-
31- if ((len == 0) || (pos + len > 32) )
32- FAIL;
33-
34- ;;if (!register_operand (operands[1], VOIDmode))
35- ;; FAIL;
36- if (operands[0] == operands[1])
37- FAIL;
38- if (GET_CODE (operands[1]) == ASHIFT)
39- FAIL;
40-;; operands[2] = GEN_INT(INTVAL(operands[2])+1 );
41- emit_insn (gen_extv_32 (operands[0], operands[1],
42- operands[2], operands[3]));
43- DONE;
44-}")
45+""
46+)
47
48-(define_insn "extv_32"
49+
50+(define_insn "extzv_32"
51 [(set (match_operand:SI 0 "register_operand" "=r")
52 (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
53 (match_operand:SI 2 "immediate_operand" "I")
54@@ -2519,21 +2503,8 @@
55 (match_operand:SI 2 "immediate_operand" "I"))
56 (match_operand:SI 3 "register_operand" "r"))]
57 "TARGET_HAS_BITFIELD"
58- "
59-{
60- unsigned HOST_WIDE_INT len = UINTVAL (operands[1]);
61- unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]);
62-
63- if (len <= 0 || pos + len > 32)
64- FAIL;
65-
66- ;;if (!register_operand (operands[0], VOIDmode))
67- ;; FAIL;
68-
69- emit_insn (gen_insv_32 (operands[0], operands[1],
70- operands[2], operands[3]));
71- DONE;
72-}")
73+""
74+)
75
76 (define_insn "insv_32"
77 [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
78--
792.7.4
80