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gerrit.openbmc.org / openbmc / openbmc / 26bdd44576f25d63bf32632369b0cbdd94c93d7a / . / meta-xilinx / meta-xilinx-bsp / recipes-microblaze / gcc / gcc-8 / 0046-Fixed-below-issues.patch
blob: 22bb5b2f9c1963f3a4d8434b11b1214c1dc9607b [file] [log] [blame]
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame^]1From 48f9f9a1c6809b14e7cfdd2343df92c0de18d730 Mon Sep 17 00:00:00 2001
2From: Nagaraju Mekala <nmekala@xilix.com>
3Date: Fri, 28 Sep 2018 11:59:12 +0530
4Subject: [PATCH 46/54] Fixed below issues: - Floating point print issues in
5 64bit mode - Dejagnu Jump related issues - Added dbl instruction
6
7---
8 gcc/config/microblaze/microblaze.c | 12 ++++-
9 gcc/config/microblaze/microblaze.h | 7 +++
10 gcc/config/microblaze/microblaze.md | 89 ++++++++++++++++++++++++++++++-------
11 libgcc/config/microblaze/crti.S | 24 +++++++++-
12 libgcc/config/microblaze/crtn.S | 13 ++++++
13 5 files changed, 127 insertions(+), 18 deletions(-)
14
15diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
16index 6b6ca61..33d183e 100644
17--- a/gcc/config/microblaze/microblaze.c
18+++ b/gcc/config/microblaze/microblaze.c
19@@ -2536,7 +2536,12 @@ print_operand (FILE * file, rtx op, int letter)
20 if (code == CONST_DOUBLE)
21 {
22 if (GET_MODE (op) == DFmode)
23- REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
24+ {
25+ if (TARGET_MB_64)
26+ REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
27+ else
28+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val);
29+ }
30 else
31 {
32 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l);
33@@ -3874,7 +3879,10 @@ microblaze_expand_divide (rtx operands[])
34 gen_rtx_PLUS (QImode, regt1, div_table_rtx));
35
36 insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx));
37- jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
38+ if (TARGET_MB_64)
39+ jump = emit_jump_insn_after (gen_jump_64 (div_end_label), insn);
40+ else
41+ jump = emit_jump_insn_after (gen_jump (div_end_label), insn);
42 JUMP_LABEL (jump) = div_end_label;
43 LABEL_NUSES (div_end_label) = 1;
44 emit_barrier ();
45diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
46index 1e60513..e34f549 100644
47--- a/gcc/config/microblaze/microblaze.h
48+++ b/gcc/config/microblaze/microblaze.h
49@@ -892,10 +892,17 @@ do { \
50 /* We do this to save a few 10s of code space that would be taken up
51 by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
52 definition in crtstuff.c. */
53+#ifdef __arch64__
54+#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
55+ asm ( SECTION_OP "\n" \
56+ "\tbrealid r15, " #FUNC "\n\t nop\n" \
57+ TEXT_SECTION_ASM_OP);
58+#else
59 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
60 asm ( SECTION_OP "\n" \
61 "\tbrlid r15, " #FUNC "\n\t nop\n" \
62 TEXT_SECTION_ASM_OP);
63+#endif
64
65 /* We need to group -lm as well, since some Newlib math functions
66 reference __errno! */
67diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
68index 3a6943b..2669a28 100644
69--- a/gcc/config/microblaze/microblaze.md
70+++ b/gcc/config/microblaze/microblaze.md
71@@ -525,6 +525,15 @@
72 (set_attr "mode" "SF")
73 (set_attr "length" "4")])
74
75+(define_insn "floatdidf2"
76+ [(set (match_operand:DF 0 "register_operand" "=d")
77+ (float:DF (match_operand:DI 1 "register_operand" "d")))]
78+ "TARGET_MB_64"
79+ "dbl\t%0,%1"
80+ [(set_attr "type" "fcvt")
81+ (set_attr "mode" "DF")
82+ (set_attr "length" "4")])
83+
84 (define_insn "fix_truncsfsi2"
85 [(set (match_operand:SI 0 "register_operand" "=d")
86 (fix:SI (match_operand:SF 1 "register_operand" "d")))]
87@@ -1298,7 +1307,7 @@
88 (define_insn "movdi_long_int"
89 [(set (match_operand:DI 0 "nonimmediate_operand" "=d")
90 (match_operand:DI 1 "general_operand" "i"))]
91- ""
92+ "TARGET_MB_64"
93 "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la";
94 [(set_attr "type" "no_delay_arith")
95 (set_attr "mode" "DI")
96@@ -1581,7 +1590,7 @@
97 return "ll%i1\t%0,%1";
98 case 3:
99 {
100- return "addlik\t%0,r0,%h1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #Xfer Lo";
101+ return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo";
102 }
103 case 5:
104 return "sl%i0\t%1,%0";
105@@ -2371,9 +2380,9 @@ else
106
107 (define_insn "long_branch_compare"
108 [(set (pc)
109- (if_then_else (match_operator 0 "cmp_op"
110- [(match_operand 1 "register_operand" "d")
111- (match_operand 2 "register_operand" "d")
112+ (if_then_else (match_operator:DI 0 "cmp_op"
113+ [(match_operand:DI 1 "register_operand" "d")
114+ (match_operand:DI 2 "register_operand" "d")
115 ])
116 (label_ref (match_operand 3))
117 (pc)))
118@@ -2495,6 +2504,20 @@ else
119 ;;----------------------------------------------------------------
120 ;; Unconditional branches
121 ;;----------------------------------------------------------------
122+(define_insn "jump_64"
123+ [(set (pc)
124+ (label_ref (match_operand 0 "" "")))]
125+ "TARGET_MB_64"
126+ {
127+ if (GET_CODE (operands[0]) == REG)
128+ return "brea%?\t%0";
129+ else
130+ return "breai%?\t%l0";
131+ }
132+ [(set_attr "type" "jump")
133+ (set_attr "mode" "none")
134+ (set_attr "length" "4")])
135+
136 (define_insn "jump"
137 [(set (pc)
138 (label_ref (match_operand 0 "" "")))]
139@@ -2538,19 +2561,28 @@ else
140 (use (label_ref (match_operand 1 "" "")))]
141 ""
142 {
143- //gcc_assert (GET_MODE (operands[0]) == Pmode);
144-
145+ gcc_assert (GET_MODE (operands[0]) == Pmode);
146+
147 if (!flag_pic)
148- emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
149- else
150- emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
151+ {
152+ if (!TARGET_MB_64)
153+ emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
154+ else
155+ emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1]));
156+ }
157+ else {
158+ if (!TARGET_MB_64)
159+ emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
160+ else
161+ emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1]));
162+ }
163 DONE;
164 }
165 )
166
167 (define_insn "tablejump_internal1"
168 [(set (pc)
169- (match_operand 0 "register_operand" "d"))
170+ (match_operand:SI 0 "register_operand" "d"))
171 (use (label_ref (match_operand 1 "" "")))]
172 ""
173 "bra%?\t%0 "
174@@ -2558,11 +2590,21 @@ else
175 (set_attr "mode" "none")
176 (set_attr "length" "4")])
177
178+(define_insn "tablejump_internal2"
179+ [(set (pc)
180+ (match_operand:DI 0 "register_operand" "d"))
181+ (use (label_ref (match_operand 1 "" "")))]
182+ "TARGET_MB_64"
183+ "bra%?\t%0 "
184+ [(set_attr "type" "jump")
185+ (set_attr "mode" "none")
186+ (set_attr "length" "4")])
187+
188 (define_expand "tablejump_internal3"
189 [(parallel [(set (pc)
190- (plus (match_operand 0 "register_operand" "d")
191- (label_ref (match_operand:SI 1 "" ""))))
192- (use (label_ref (match_dup 1)))])]
193+ (plus:SI (match_operand:SI 0 "register_operand" "d")
194+ (label_ref:SI (match_operand:SI 1 "" ""))))
195+ (use (label_ref:SI (match_dup 1)))])]
196 ""
197 ""
198 )
199@@ -2593,6 +2635,23 @@ else
200 ""
201 )
202
203+(define_insn ""
204+ [(set (pc)
205+ (plus:DI (match_operand:DI 0 "register_operand" "d")
206+ (label_ref:DI (match_operand 1 "" ""))))
207+ (use (label_ref:DI (match_dup 1)))]
208+ "TARGET_MB_64 && NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0
209+ && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC
210+ && flag_pic"
211+ {
212+ output_asm_insn ("addlk\t%0,%0,r20",operands);
213+ return "bra%?\t%0";
214+}
215+ [(set_attr "type" "jump")
216+ (set_attr "mode" "none")
217+ (set_attr "length" "4")])
218+
219+
220 ;;----------------------------------------------------------------
221 ;; Function prologue/epilogue and stack allocation
222 ;;----------------------------------------------------------------
223@@ -3097,7 +3156,7 @@ else
224 ;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference
225 ;; between "mfs" and "addik" instructions.
226 (define_insn "set_got"
227- [(set (match_operand:SI 0 "register_operand" "=r")
228+ [(set (match_operand 0 "register_operand" "=r")
229 (unspec:SI [(const_int 0)] UNSPEC_SET_GOT))]
230 ""
231 "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8"
232diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S
233index 3386520..3d4cde2 100644
234--- a/libgcc/config/microblaze/crti.S
235+++ b/libgcc/config/microblaze/crti.S
236@@ -33,11 +33,32 @@
237 .section .init, "ax"
238 .global __init
239
240+#ifdef __arch64__
241 .weak _stack
242- .set _stack, 0xffffffff
243+ .set _stack, 0xffffffffffffffff
244 .weak _stack_end
245 .set _stack_end, 0
246
247+ .align 3
248+__init:
249+ addlik r1, r1, -32
250+ sl r15, r0, r1
251+ addlik r11, r0, _stack
252+ mts rshr, r11
253+ addlik r11, r0, _stack_end
254+ mts rslr, r11
255+
256+ .section .fini, "ax"
257+ .global __fini
258+ .align 3
259+__fini:
260+ addlik r1, r1, -32
261+ sl r15, r0, r1
262+#else
263+ .weak _stack
264+ .set _stack, 0xffffffff
265+ .weak _stack_end
266+ .set _stack_end, 0
267 .align 2
268 __init:
269 addik r1, r1, -16
270@@ -53,3 +74,4 @@ __init:
271 __fini:
272 addik r1, r1, -16
273 sw r15, r0, r1
274+#endif
275diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S
276index 04e73d7..c262ce0 100644
277--- a/libgcc/config/microblaze/crtn.S
278+++ b/libgcc/config/microblaze/crtn.S
279@@ -29,7 +29,19 @@
280 .section .note.GNU-stack,"",%progbits
281 .previous
282 #endif
283+#ifdef __arch64__
284+ .section .init, "ax"
285+ ll r15, r0, r1
286+ addlik r1, r1, 32
287+ rtsd r15, 8
288+ nop
289
290+ .section .fini, "ax"
291+ ll r15, r0, r1
292+ addlik r1, r1, 32
293+ rtsd r15, 8
294+ nop
295+#else
296 .section .init, "ax"
297 lw r15, r0, r1
298 rtsd r15, 8
299@@ -39,3 +51,4 @@
300 lw r15, r0, r1
301 rtsd r15, 8
302 addik r1, r1, 16
303+#endif
304--
3052.7.4
306