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gerrit.openbmc.org / openbmc / openbmc / 26bdd44576f25d63bf32632369b0cbdd94c93d7a / . / meta-xilinx / meta-xilinx-bsp / recipes-microblaze / gcc / gcc-8 / 0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch
blob: 1548faada15c532abc610ef1f05a27c186c8fbcb [file] [log] [blame]
Brad Bishop26bdd442019-08-16 17:08:17 -0400[diff] [blame^]1From 80919b0f43b275e70521e4f85cd28bcd0ece3b80 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Wed, 17 Apr 2019 12:36:16 +0530
4Subject: [PATCH 60/61] [Patch,MicroBlaze]: fixed typos in mul,div and mod
5 assembly files.
6
7---
8 libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++++++++----
9 libgcc/config/microblaze/modsi3.S | 40 +++++++++++++++++++++++---
10 libgcc/config/microblaze/mulsi3.S | 33 +++++++++++++++++++++-
11 libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++----
12 libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++---
13 5 files changed, 212 insertions(+), 20 deletions(-)
14
15diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
16index 7e7d875..cfb4c05 100644
17--- a/libgcc/config/microblaze/divsi3.S
18+++ b/libgcc/config/microblaze/divsi3.S
19@@ -46,7 +46,7 @@
20 __divsi3:
21 .frame r1,0,r15
22
23- ADDIK r1,r1,-32
24+ ADDLIK r1,r1,-32
25 SLI r28,r1,0
26 SLI r29,r1,8
27 SLI r30,r1,16
28@@ -61,13 +61,23 @@ __divsi3:
29 SWI r30,r1,8
30 SWI r31,r1,12
31 #endif
32- BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
33- BEQI r5,$LaResult_Is_Zero # Result is Zero
34- BGEID r5,$LaR5_Pos
35+#ifdef __arch64__
36+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
37+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
38+ BEAGEID r5,$LaR5_Pos
39+#else
40+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
41+ BEQI r5,$LaResult_Is_Zero # Result is Zero
42+ BGEID r5,$LaR5_Pos
43+#endif
44 XOR r28,r5,r6 # Get the sign of the result
45 RSUBI r5,r5,0 # Make r5 positive
46 $LaR5_Pos:
47- BGEI r6,$LaR6_Pos
48+#ifdef __arch64__
49+ BEAGEI r6,$LaR6_Pos
50+#else
51+ BGEI r6,$LaR6_Pos
52+#endif
53 RSUBI r6,r6,0 # Make r6 positive
54 $LaR6_Pos:
55 ADDIK r30,r0,0 # Clear mod
56@@ -76,26 +86,51 @@ $LaR6_Pos:
57
58 # First part try to find the first '1' in the r5
59 $LaDIV0:
60- BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
61+#ifdef __arch64__
62+ BEALTI r5,$LaDIV2 # This traps r5 == 0x80000000
63+#else
64+ BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
65+#endif
66 $LaDIV1:
67 ADD r5,r5,r5 # left shift logical r5
68+#ifdef __arch64__
69+ BEAGTID r5,$LaDIV1
70+#else
71 BGTID r5,$LaDIV1
72+#endif
73 ADDIK r29,r29,-1
74 $LaDIV2:
75 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
76 ADDC r30,r30,r30 # Move that bit into the Mod register
77 RSUB r31,r6,r30 # Try to subtract (r30 a r6)
78+#ifdef __arch64__
79+ BEALTI r31,$LaMOD_TOO_SMALL
80+#else
81 BLTI r31,$LaMOD_TOO_SMALL
82+#endif
83 OR r30,r0,r31 # Move the r31 to mod since the result was positive
84 ADDIK r3,r3,1
85 $LaMOD_TOO_SMALL:
86 ADDIK r29,r29,-1
87+#ifdef __arch64__
88+ BEAEQi r29,$LaLOOP_END
89+#else
90 BEQi r29,$LaLOOP_END
91+#endif
92 ADD r3,r3,r3 # Shift in the '1' into div
93+#ifdef __arch64__
94+ BREAI $LaDIV2 # Div2
95+#else
96 BRI $LaDIV2 # Div2
97+#endif
98 $LaLOOP_END:
99+#ifdef __arch64__
100+ BEAGEI r28,$LaRETURN_HERE
101+ BREAID $LaRETURN_HERE
102+#else
103 BGEI r28,$LaRETURN_HERE
104 BRID $LaRETURN_HERE
105+#endif
106 RSUBI r3,r3,0 # Negate the result
107 $LaDiv_By_Zero:
108 $LaResult_Is_Zero:
109diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
110index 46ff34a..49618dd 100644
111--- a/libgcc/config/microblaze/modsi3.S
112+++ b/libgcc/config/microblaze/modsi3.S
113@@ -62,40 +62,72 @@ __modsi3:
114 swi r31,r1,12
115 #endif
116
117+#ifdef __arch64__
118+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
119+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
120+ BEAGEId r5,$LaR5_Pos
121+#else
122 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
123 BEQI r5,$LaResult_Is_Zero # Result is Zero
124 BGEId r5,$LaR5_Pos
125+#endif
126 ADD r28,r5,r0 # Get the sign of the result [ Depends only on the first arg]
127 RSUBI r5,r5,0 # Make r5 positive
128 $LaR5_Pos:
129- BGEI r6,$LaR6_Pos
130+#ifdef __arch64__
131+ BEAGEI r6,$LaR6_Pos
132+#else
133+ BGEI r6,$LaR6_Pos
134+#endif
135 RSUBI r6,r6,0 # Make r6 positive
136 $LaR6_Pos:
137 ADDIK r3,r0,0 # Clear mod
138 ADDIK r30,r0,0 # clear div
139- BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
140+#ifdef __arch64__
141+ BEALTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
142 # the first bit search.
143+#else
144+ BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
145+ # the first bit search.
146+#endif
147 ADDIK r29,r0,32 # Initialize the loop count
148 # First part try to find the first '1' in the r5
149 $LaDIV1:
150 ADD r5,r5,r5 # left shift logical r5
151- BGEID r5,$LaDIV1 #
152+#ifdef __arch64__
153+ BEAGEID r5,$LaDIV1 #
154+#else
155+ BGEID r5,$LaDIV1 #
156+#endif
157 ADDIK r29,r29,-1
158 $LaDIV2:
159 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
160 ADDC r3,r3,r3 # Move that bit into the Mod register
161 rSUB r31,r6,r3 # Try to subtract (r30 a r6)
162+#ifdef __arch64__
163+ BEALTi r31,$LaMOD_TOO_SMALL
164+#else
165 BLTi r31,$LaMOD_TOO_SMALL
166+#endif
167 OR r3,r0,r31 # Move the r31 to mod since the result was positive
168 ADDIK r30,r30,1
169 $LaMOD_TOO_SMALL:
170 ADDIK r29,r29,-1
171+#ifdef __arch64__
172+ BEAEQi r29,$LaLOOP_END
173+ ADD r30,r30,r30 # Shift in the '1' into div
174+ BREAI $LaDIV2 # Div2
175+$LaLOOP_END:
176+ BEAGEI r28,$LaRETURN_HERE
177+ BREAId $LaRETURN_HERE
178+#else
179 BEQi r29,$LaLOOP_END
180 ADD r30,r30,r30 # Shift in the '1' into div
181 BRI $LaDIV2 # Div2
182 $LaLOOP_END:
183 BGEI r28,$LaRETURN_HERE
184 BRId $LaRETURN_HERE
185+#endif
186 rsubi r3,r3,0 # Negate the result
187 $LaDiv_By_Zero:
188 $LaResult_Is_Zero:
189@@ -108,7 +140,7 @@ $LaRETURN_HERE:
190 lli r29,r1,8
191 lli r30,r1,16
192 lli r31,r1,24
193- addik r1,r1,32
194+ addlik r1,r1,32
195 rtsd r15,8
196 nop
197 #else
198diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
199index 31a73c2..39951be 100644
200--- a/libgcc/config/microblaze/mulsi3.S
201+++ b/libgcc/config/microblaze/mulsi3.S
202@@ -43,7 +43,37 @@
203 .type __mulsi3,@function
204 #ifdef __arch64__
205 .align 3
206-#endif
207+__mulsi3:
208+ .frame r1,0,r15
209+ add r3,r0,r0
210+ BEAEQI r5,$L_Result_Is_Zero # Multiply by Zero
211+ BEAEQI r6,$L_Result_Is_Zero # Multiply by Zero
212+ BEAGEId r5,$L_R5_Pos
213+ XOR r4,r5,r6 # Get the sign of the result
214+ RSUBI r5,r5,0 # Make r5 positive
215+$L_R5_Pos:
216+ BEAGEI r6,$L_R6_Pos
217+ RSUBI r6,r6,0 # Make r6 positive
218+$L_R6_Pos:
219+ breai $L1
220+$L2:
221+ add r5,r5,r5
222+$L1:
223+ srl r6,r6
224+ addc r7,r0,r0
225+ beaeqi r7,$L2
226+ beaneid r6,$L2
227+ add r3,r3,r5
228+ bealti r4,$L_NegateResult
229+ rtsd r15,8
230+ nop
231+$L_NegateResult:
232+ rtsd r15,8
233+ rsub r3,r3,r0
234+$L_Result_Is_Zero:
235+ rtsd r15,8
236+ addi r3,r0,0
237+#else
238 __mulsi3:
239 .frame r1,0,r15
240 add r3,r0,r0
241@@ -74,5 +104,6 @@ $L_NegateResult:
242 $L_Result_Is_Zero:
243 rtsd r15,8
244 addi r3,r0,0
245+#endif
246 .end __mulsi3
247 .size __mulsi3, . - __mulsi3
248diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
249index 94adb6a..d4fe285 100644
250--- a/libgcc/config/microblaze/udivsi3.S
251+++ b/libgcc/config/microblaze/udivsi3.S
252@@ -59,52 +59,96 @@ __udivsi3:
253 SWI r30,r1,4
254 SWI r31,r1,8
255 #endif
256+#ifdef __arch64__
257+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
258+ BEAEQID r5,$LaResult_Is_Zero # Result is Zero
259+#else
260 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
261 BEQID r5,$LaResult_Is_Zero # Result is Zero
262+#endif
263 ADDIK r30,r0,0 # Clear mod
264 ADDIK r29,r0,32 # Initialize the loop count
265
266 # Check if r6 and r5 are equal # if yes, return 1
267 RSUB r18,r5,r6
268+#ifdef __arch64__
269+ BEAEQID r18,$LaRETURN_HERE
270+#else
271 BEQID r18,$LaRETURN_HERE
272+#endif
273 ADDIK r3,r0,1
274
275 # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
276 XOR r18,r5,r6
277- BGEID r18,16
278+#ifdef __arch64__
279+ BEAGEID r18,16
280+#else
281+ BGEID r18,16
282+#endif
283 ADD r3,r0,r0 # We would anyways clear r3
284+#ifdef __arch64__
285+ BEALTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
286+ BREAI $LCheckr6
287+ RSUB r18,r6,r5 # MICROBLAZEcmp
288+ BEALTI r18,$LaRETURN_HERE
289+#else
290 BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
291 BRI $LCheckr6
292 RSUB r18,r6,r5 # MICROBLAZEcmp
293 BLTI r18,$LaRETURN_HERE
294-
295+#endif
296 # If r6 [bit 31] is set, then return result as 1
297 $LCheckr6:
298- BGTI r6,$LaDIV0
299- BRID $LaRETURN_HERE
300+#ifdef __arch64__
301+ BEAGTI r6,$LaDIV0
302+ BREAID $LaRETURN_HERE
303+#else
304+ BGTI r6,$LaDIV0
305+ BRID $LaRETURN_HERE
306+#endif
307 ADDIK r3,r0,1
308
309 # First part try to find the first '1' in the r5
310 $LaDIV0:
311+#ifdef __arch64__
312+ BEALTI r5,$LaDIV2
313+#else
314 BLTI r5,$LaDIV2
315+#endif
316 $LaDIV1:
317 ADD r5,r5,r5 # left shift logical r5
318+#ifdef __arch64__
319+ BEAGTID r5,$LaDIV1
320+#else
321 BGTID r5,$LaDIV1
322+#endif
323 ADDIK r29,r29,-1
324 $LaDIV2:
325 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
326 ADDC r30,r30,r30 # Move that bit into the Mod register
327 RSUB r31,r6,r30 # Try to subtract (r30 a r6)
328+#ifdef __arch64__
329+ BEALTI r31,$LaMOD_TOO_SMALL
330+#else
331 BLTI r31,$LaMOD_TOO_SMALL
332+#endif
333 OR r30,r0,r31 # Move the r31 to mod since the result was positive
334 ADDIK r3,r3,1
335 $LaMOD_TOO_SMALL:
336 ADDIK r29,r29,-1
337+#ifdef __arch64__
338+ BEAEQi r29,$LaLOOP_END
339+ ADD r3,r3,r3 # Shift in the '1' into div
340+ BREAI $LaDIV2 # Div2
341+$LaLOOP_END:
342+ BREAI $LaRETURN_HERE
343+#else
344 BEQi r29,$LaLOOP_END
345 ADD r3,r3,r3 # Shift in the '1' into div
346 BRI $LaDIV2 # Div2
347 $LaLOOP_END:
348 BRI $LaRETURN_HERE
349+#endif
350 $LaDiv_By_Zero:
351 $LaResult_Is_Zero:
352 OR r3,r0,r0 # set result to 0
353@@ -115,7 +159,7 @@ $LaRETURN_HERE:
354 LLI r29,r1,0
355 LLI r30,r1,8
356 LLI r31,r1,16
357- ADDIK r1,r1,24
358+ ADDLIK r1,r1,24
359 RTSD r15,8
360 NOP
361 #else
362diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
363index 9bf65c3..3bd5d48 100644
364--- a/libgcc/config/microblaze/umodsi3.S
365+++ b/libgcc/config/microblaze/umodsi3.S
366@@ -46,7 +46,7 @@
367 __umodsi3:
368 .frame r1,0,r15
369
370- addik r1,r1,-24
371+ addlik r1,r1,-24
372 sli r29,r1,0
373 sli r30,r1,8
374 sli r31,r1,16
375@@ -59,27 +59,77 @@ __umodsi3:
376 swi r30,r1,4
377 swi r31,r1,8
378 #endif
379+#ifdef __arch64__
380+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
381+ BEAEQId r5,$LaResult_Is_Zero # Result is Zero
382+#else
383 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
384 BEQId r5,$LaResult_Is_Zero # Result is Zero
385+#endif
386 ADDIK r3,r0,0 # Clear div
387 ADDIK r30,r0,0 # clear mod
388 ADDIK r29,r0,32 # Initialize the loop count
389
390 # Check if r6 and r5 are equal # if yes, return 0
391 rsub r18,r5,r6
392- beqi r18,$LaRETURN_HERE
393
394+#ifdef __arch64__
395+ beaeqi r18,$LaRETURN_HERE
396+#else
397+ beqi r18,$LaRETURN_HERE
398+#endif
399 # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5
400 xor r18,r5,r6
401+#ifdef __arch64__
402+ beageid r18,16
403+ addik r3,r5,0
404+ bealti r6,$LaRETURN_HERE
405+ breai $LCheckr6
406+ rsub r18,r5,r6 # MICROBLAZEcmp
407+ beagti r18,$LaRETURN_HERE
408+#else
409 bgeid r18,16
410 addik r3,r5,0
411 blti r6,$LaRETURN_HERE
412 bri $LCheckr6
413 rsub r18,r5,r6 # MICROBLAZEcmp
414 bgti r18,$LaRETURN_HERE
415-
416+#endif
417 # If r6 [bit 31] is set, then return result as r5-r6
418 $LCheckr6:
419+#ifdef __arch64__
420+ beagtid r6,$LaDIV0
421+ addik r3,r0,0
422+ addik r18,r0,0x7fffffff
423+ and r5,r5,r18
424+ and r6,r6,r18
425+ breaid $LaRETURN_HERE
426+ rsub r3,r6,r5
427+# First part: try to find the first '1' in the r5
428+$LaDIV0:
429+ BEALTI r5,$LaDIV2
430+$LaDIV1:
431+ ADD r5,r5,r5 # left shift logical r5
432+ BEAGEID r5,$LaDIV1 #
433+ ADDIK r29,r29,-1
434+$LaDIV2:
435+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
436+ ADDC r3,r3,r3 # Move that bit into the Mod register
437+ rSUB r31,r6,r3 # Try to subtract (r3 a r6)
438+ BEALTi r31,$LaMOD_TOO_SMALL
439+ OR r3,r0,r31 # Move the r31 to mod since the result was positive
440+ ADDIK r30,r30,1
441+$LaMOD_TOO_SMALL:
442+ ADDIK r29,r29,-1
443+ BEAEQi r29,$LaLOOP_END
444+ ADD r30,r30,r30 # Shift in the '1' into div
445+ BREAI $LaDIV2 # Div2
446+$LaLOOP_END:
447+ BREAI $LaRETURN_HERE
448+$LaDiv_By_Zero:
449+$LaResult_Is_Zero:
450+ or r3,r0,r0 # set result to 0
451+#else
452 bgtid r6,$LaDIV0
453 addik r3,r0,0
454 addik r18,r0,0x7fffffff
455@@ -111,7 +161,7 @@ $LaLOOP_END:
456 $LaDiv_By_Zero:
457 $LaResult_Is_Zero:
458 or r3,r0,r0 # set result to 0
459-
460+#endif
461 #ifdef __arch64__
462 $LaRETURN_HERE:
463 # Restore values of CSRs and that of r3 and the divisor and the dividend
464--
4652.7.4
466