Brad Bishop | 286d45c | 2018-10-02 15:21:57 -0400 | [diff] [blame^] | 1 | From c32df2ec3d269d19b631a17cea2b6d19bbb98c27 Mon Sep 17 00:00:00 2001 |
| 2 | From: Mahesh Bodapati <mbodapat@xilinx.com> |
| 3 | Date: Sat, 26 Aug 2017 19:21:27 -0700 |
| 4 | Subject: [PATCH] Add MicroBlaze ashrsi_3_with_size_opt |
| 5 | |
| 6 | Added ashrsi3_with_size_opt Added ashrsi3_with_size_opt pattern to |
| 7 | optimize the sra instructions when the -Os optimization is used. |
| 8 | lshrsi3_with_size_opt is being removed as it has conflicts with unsigned |
| 9 | int variables |
| 10 | |
| 11 | Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> |
| 12 | Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> |
| 13 | Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> |
| 14 | Upstream-Status: Pending |
| 15 | --- |
| 16 | gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ |
| 17 | 1 file changed, 21 insertions(+) |
| 18 | |
| 19 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md |
| 20 | index 59d629b559..8c0a97e032 100644 |
| 21 | --- a/gcc/config/microblaze/microblaze.md |
| 22 | +++ b/gcc/config/microblaze/microblaze.md |
| 23 | @@ -1505,6 +1505,27 @@ |
| 24 | (set_attr "length" "4,4")] |
| 25 | ) |
| 26 | |
| 27 | +(define_insn "*ashrsi3_with_size_opt" |
| 28 | + [(set (match_operand:SI 0 "register_operand" "=&d") |
| 29 | + (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") |
| 30 | + (match_operand:SI 2 "immediate_operand" "I")))] |
| 31 | + "(INTVAL (operands[2]) > 5 && optimize_size)" |
| 32 | + { |
| 33 | + operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); |
| 34 | + |
| 35 | + output_asm_insn ("ori\t%3,r0,%2", operands); |
| 36 | + if (REGNO (operands[0]) != REGNO (operands[1])) |
| 37 | + output_asm_insn ("addk\t%0,%1,r0", operands); |
| 38 | + |
| 39 | + output_asm_insn ("addik\t%3,%3,-1", operands); |
| 40 | + output_asm_insn ("bneid\t%3,.-4", operands); |
| 41 | + return "sra\t%0,%0"; |
| 42 | + } |
| 43 | + [(set_attr "type" "arith") |
| 44 | + (set_attr "mode" "SI") |
| 45 | + (set_attr "length" "20")] |
| 46 | +) |
| 47 | + |
| 48 | (define_insn "*ashrsi_inline" |
| 49 | [(set (match_operand:SI 0 "register_operand" "=&d") |
| 50 | (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") |
| 51 | -- |
| 52 | 2.14.2 |
| 53 | |