blob: 3f66bed55a5902c601f6a08ea0306780b3dfa3da [file] [log] [blame]
Brad Bishopbec4ebc2022-08-03 09:55:16 -04001# Corstone1000 64-bit machines specific TFA support
2
3COMPATIBLE_MACHINE = "(corstone1000)"
4
5FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:"
Andrew Geissler2edf0642023-09-11 08:24:07 -04006SRC_URI:append = " \
Brad Bishopbec4ebc2022-08-03 09:55:16 -04007 file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \
Andrew Geissler2edf0642023-09-11 08:24:07 -04008 file://0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch \
9 file://0003-psci-SMCCC_ARCH_FEATURES-discovery-through-PSCI_FEATURES.patch \
10 file://0004-fix-corstone1000-add-cpuhelper-to-makefile.patch \
11 "
Patrick Williams520786c2023-06-25 16:20:36 -050012
Brad Bishopbec4ebc2022-08-03 09:55:16 -040013TFA_DEBUG = "1"
14TFA_UBOOT ?= "1"
15TFA_MBEDTLS = "1"
16TFA_BUILD_TARGET = "bl2 bl31 fip"
17
18# Enabling Secure-EL1 Payload Dispatcher (SPD)
19TFA_SPD = "spmd"
20# Cortex-A35 supports Armv8.0-A (no S-EL2 execution state).
21# So, the SPD SPMC component should run at the S-EL1 execution state
22TFA_SPMD_SPM_AT_SEL2 = "0"
23
24# BL2 loads BL32 (optee). So, optee needs to be built first:
25DEPENDS += "optee-os"
26
27EXTRA_OEMAKE:append = " \
28 ARCH=aarch64 \
29 TARGET_PLATFORM=${TFA_TARGET_PLATFORM} \
30 ENABLE_STACK_PROTECTOR=strong \
31 ENABLE_PIE=1 \
Andrew Geissler2edf0642023-09-11 08:24:07 -040032 RESET_TO_BL2=1 \
Brad Bishopbec4ebc2022-08-03 09:55:16 -040033 CREATE_KEYS=1 \
34 GENERATE_COT=1 \
35 TRUSTED_BOARD_BOOT=1 \
Andrew Geissler2daf84b2023-03-31 09:57:23 -050036 ARM_GPT_SUPPORT=1 \
37 PSA_FWU_SUPPORT=1 \
38 NR_OF_IMAGES_IN_FW_BANK=4 \
Brad Bishopbec4ebc2022-08-03 09:55:16 -040039 COT=tbbr \
40 ARM_ROTPK_LOCATION=devel_rsa \
41 ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \
42 BL32=${RECIPE_SYSROOT}/lib/firmware/tee-pager_v2.bin \
43 LOG_LEVEL=50 \
44 "