Brad Bishop | 0011132 | 2018-04-01 22:23:53 -0400 | [diff] [blame] | 1 | From 22fcc126fad61a8e9ddaaabbc8036644273642dc Mon Sep 17 00:00:00 2001 |
| 2 | From: ktkachov <ktkachov@138bc75d-0d04-0410-961f-82ee72b054a4> |
| 3 | Date: Thu, 9 Nov 2017 14:34:28 +0000 |
| 4 | Subject: [PATCH] enable FL_LPAE flag for armv7ve cores |
| 5 | |
| 6 | The following commit added the FL_LPAE flag to FL_FOR_ARCH7VE, but |
| 7 | neglected to also add it to the armv7ve compatible cores defined in |
| 8 | arm-cores.def. |
| 9 | |
| 10 | https://github.com/gcc-mirror/gcc/commit/af2d9b9e58e8be576c53d94f30c48c68146b0c98 |
| 11 | |
| 12 | The result is that gcc 6.4 now refuses to allow -march=armv7ve and |
| 13 | -mcpu=XXX to be used together, even when -mcpu is set to an armv7ve |
| 14 | compatible core: |
| 15 | |
| 16 | arm-linux-gnueabi-gcc -march=armv7ve -mcpu=cortex-a7 -Werror ... |
| 17 | error: switch -mcpu=cortex-a7 conflicts with -march=armv7ve switch [-Werror] |
| 18 | |
| 19 | Fix by defining flags for armv7ve compatible cores directly from |
| 20 | FL_FOR_ARCH7VE, rather than re-creating the armv7ve flags |
| 21 | independently by combining FL_FOR_ARCH7A with the armv7ve specific |
| 22 | FL_THUMB_DIV and FL_ARM_DIV flags. |
| 23 | |
| 24 | Upstream-Status: Backport |
| 25 | |
| 26 | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@254584 138bc75d-0d04-0410-961f-82ee72b054a4 |
| 27 | |
| 28 | Signed-off-by: Andre McCurdy <armccurdy@gmail.com> |
| 29 | --- |
| 30 | gcc/config/arm/arm-cores.def | 12 ++++++------ |
| 31 | 1 file changed, 6 insertions(+), 6 deletions(-) |
| 32 | |
| 33 | diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def |
| 34 | index 829b839..ca37e6f 100644 |
| 35 | --- a/gcc/config/arm/arm-cores.def |
| 36 | +++ b/gcc/config/arm/arm-cores.def |
| 37 | @@ -145,12 +145,12 @@ ARM_CORE("cortex-m0plus.small-multiply",cortexm0plussmallmultiply, cortexm0plus, |
| 38 | /* V7 Architecture Processors */ |
| 39 | ARM_CORE("generic-armv7-a", genericv7a, genericv7a, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex) |
| 40 | ARM_CORE("cortex-a5", cortexa5, cortexa5, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a5) |
| 41 | -ARM_CORE("cortex-a7", cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a7) |
| 42 | +ARM_CORE("cortex-a7", cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a7) |
| 43 | ARM_CORE("cortex-a8", cortexa8, cortexa8, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a8) |
| 44 | ARM_CORE("cortex-a9", cortexa9, cortexa9, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a9) |
| 45 | -ARM_CORE("cortex-a12", cortexa12, cortexa17, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12) |
| 46 | -ARM_CORE("cortex-a15", cortexa15, cortexa15, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a15) |
| 47 | -ARM_CORE("cortex-a17", cortexa17, cortexa17, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12) |
| 48 | +ARM_CORE("cortex-a12", cortexa12, cortexa17, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12) |
| 49 | +ARM_CORE("cortex-a15", cortexa15, cortexa15, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a15) |
| 50 | +ARM_CORE("cortex-a17", cortexa17, cortexa17, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12) |
| 51 | ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex) |
| 52 | ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex) |
| 53 | ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARM_DIV | FL_FOR_ARCH7R), cortex) |
| 54 | @@ -162,8 +162,8 @@ ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | |
| 55 | ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), marvell_pj4) |
| 56 | |
| 57 | /* V7 big.LITTLE implementations */ |
| 58 | -ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a15) |
| 59 | -ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12) |
| 60 | +ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a15) |
| 61 | +ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7, 7A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12) |
| 62 | |
| 63 | /* V8 Architecture Processors */ |
| 64 | ARM_CORE("cortex-a32", cortexa32, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35) |
| 65 | -- |
| 66 | 1.9.1 |
| 67 | |