blob: d0a05c2462e5a6f01bd5c327ab1180374e06ef6e [file] [log] [blame]
Brad Bishopbec4ebc2022-08-03 09:55:16 -04001From 5dbb6c4267b1e46ed08359be363d8bc9b6a79397 Mon Sep 17 00:00:00 2001
2From: Ryan Harkin <ryan.harkin@linaro.org>
3Date: Wed, 16 Nov 2016 14:43:02 +0000
4Subject: [PATCH] ARM: vexpress: enable GICv3
5
6Upstream-Status: Pending
7
8ARMv8 targets such as ARM's FVP Cortex-A32 model can run the 32-bit
9ARMv7 kernel. And these targets often contain GICv3.
10
11Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
12Signed-off-by: Jon Medhurst <tixy@linaro.org>
13---
14 arch/arm/mach-vexpress/Kconfig | 1 +
15 1 file changed, 1 insertion(+)
16
17diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
18index 7c728ebc0b33..ed579382d41f 100644
19--- a/arch/arm/mach-vexpress/Kconfig
20+++ b/arch/arm/mach-vexpress/Kconfig
21@@ -4,6 +4,7 @@ menuconfig ARCH_VEXPRESS
22 select ARCH_SUPPORTS_BIG_ENDIAN
23 select ARM_AMBA
24 select ARM_GIC
25+ select ARM_GIC_V3
26 select ARM_GLOBAL_TIMER
27 select ARM_TIMER_SP804
28 select COMMON_CLK_VERSATILE
29--
302.17.1
31